ACPI: Do not try to set up acpi processor stuff on cores exceeding maxcpus=
[zen-stable.git] / arch / arm / mach-stmp378x / include / mach / regs-timrot.h
blobb5527957c67f4d682e25bcbd9384568290da538e
1 /*
2 * stmp378x: TIMROT register definitions
4 * Copyright (c) 2008 Freescale Semiconductor
5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef _MACH_REGS_TIMROT
22 #define _MACH_REGS_TIMROT
24 #define REGS_TIMROT_BASE (STMP3XXX_REGS_BASE + 0x68000)
25 #define REGS_TIMROT_PHYS 0x80068000
26 #define REGS_TIMROT_SIZE 0x2000
28 #define HW_TIMROT_ROTCTRL 0x0
29 #define BM_TIMROT_ROTCTRL_SELECT_A 0x00000007
30 #define BP_TIMROT_ROTCTRL_SELECT_A 0
31 #define BM_TIMROT_ROTCTRL_SELECT_B 0x00000070
32 #define BP_TIMROT_ROTCTRL_SELECT_B 4
33 #define BM_TIMROT_ROTCTRL_POLARITY_A 0x00000100
34 #define BM_TIMROT_ROTCTRL_POLARITY_B 0x00000200
35 #define BM_TIMROT_ROTCTRL_OVERSAMPLE 0x00000C00
36 #define BP_TIMROT_ROTCTRL_OVERSAMPLE 10
37 #define BM_TIMROT_ROTCTRL_RELATIVE 0x00001000
38 #define BM_TIMROT_ROTCTRL_DIVIDER 0x003F0000
39 #define BP_TIMROT_ROTCTRL_DIVIDER 16
40 #define BM_TIMROT_ROTCTRL_ROTARY_PRESENT 0x20000000
41 #define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000
42 #define BM_TIMROT_ROTCTRL_SFTRST 0x80000000
44 #define HW_TIMROT_ROTCOUNT 0x10
45 #define BM_TIMROT_ROTCOUNT_UPDOWN 0x0000FFFF
46 #define BP_TIMROT_ROTCOUNT_UPDOWN 0
48 #define HW_TIMROT_TIMCTRL0 (0x20 + 0 * 0x20)
49 #define HW_TIMROT_TIMCTRL1 (0x20 + 1 * 0x20)
50 #define HW_TIMROT_TIMCTRL2 (0x20 + 2 * 0x20)
52 #define HW_TIMROT_TIMCTRLn 0x20
53 #define BM_TIMROT_TIMCTRLn_SELECT 0x0000000F
54 #define BP_TIMROT_TIMCTRLn_SELECT 0
55 #define BM_TIMROT_TIMCTRLn_PRESCALE 0x00000030
56 #define BP_TIMROT_TIMCTRLn_PRESCALE 4
57 #define BM_TIMROT_TIMCTRLn_RELOAD 0x00000040
58 #define BM_TIMROT_TIMCTRLn_UPDATE 0x00000080
59 #define BM_TIMROT_TIMCTRLn_IRQ_EN 0x00004000
60 #define BM_TIMROT_TIMCTRLn_IRQ 0x00008000
62 #define HW_TIMROT_TIMCOUNT0 (0x30 + 0 * 0x20)
63 #define HW_TIMROT_TIMCOUNT1 (0x30 + 1 * 0x20)
64 #define HW_TIMROT_TIMCOUNT2 (0x30 + 2 * 0x20)
66 #define HW_TIMROT_TIMCOUNTn 0x30
68 #endif