arch/arm/plat-mxc/include/mach/iomux-v1.h

   1 /*
   2  * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
   3  * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19 #ifndef __MACH_IOMUX_V1_H__
  20 #define __MACH_IOMUX_V1_H__
  21
  22 /*
  23 *  GPIO Module and I/O Multiplexer
  24 *  x = 0..3 for reg_A, reg_B, reg_C, reg_D
  25 */
  26 #define MXC_DDIR(x)     (0x00 + ((x) << 8))
  27 #define MXC_OCR1(x)     (0x04 + ((x) << 8))
  28 #define MXC_OCR2(x)     (0x08 + ((x) << 8))
  29 #define MXC_ICONFA1(x)  (0x0c + ((x) << 8))
  30 #define MXC_ICONFA2(x)  (0x10 + ((x) << 8))
  31 #define MXC_ICONFB1(x)  (0x14 + ((x) << 8))
  32 #define MXC_ICONFB2(x)  (0x18 + ((x) << 8))
  33 #define MXC_DR(x)       (0x1c + ((x) << 8))
  34 #define MXC_GIUS(x)     (0x20 + ((x) << 8))
  35 #define MXC_SSR(x)      (0x24 + ((x) << 8))
  36 #define MXC_ICR1(x)     (0x28 + ((x) << 8))
  37 #define MXC_ICR2(x)     (0x2c + ((x) << 8))
  38 #define MXC_IMR(x)      (0x30 + ((x) << 8))
  39 #define MXC_ISR(x)      (0x34 + ((x) << 8))
  40 #define MXC_GPR(x)      (0x38 + ((x) << 8))
  41 #define MXC_SWR(x)      (0x3c + ((x) << 8))
  42 #define MXC_PUEN(x)     (0x40 + ((x) << 8))
  43
  44 #define MX1_NUM_GPIO_PORT       4
  45 #define MX21_NUM_GPIO_PORT      6
  46 #define MX27_NUM_GPIO_PORT      6
  47
  48 #define GPIO_PIN_MASK 0x1f
  49
  50 #define GPIO_PORT_SHIFT 5
  51 #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
  52
  53 #define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
  54 #define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
  55 #define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
  56 #define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
  57 #define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
  58 #define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
  59
  60 #define GPIO_OUT        (1 << 8)
  61 #define GPIO_IN         (0 << 8)
  62 #define GPIO_PUEN       (1 << 9)
  63
  64 #define GPIO_PF         (1 << 10)
  65 #define GPIO_AF         (1 << 11)
  66
  67 #define GPIO_OCR_SHIFT 12
  68 #define GPIO_OCR_MASK   (3 << GPIO_OCR_SHIFT)
  69 #define GPIO_AIN        (0 << GPIO_OCR_SHIFT)
  70 #define GPIO_BIN        (1 << GPIO_OCR_SHIFT)
  71 #define GPIO_CIN        (2 << GPIO_OCR_SHIFT)
  72 #define GPIO_GPIO       (3 << GPIO_OCR_SHIFT)
  73
  74 #define GPIO_AOUT_SHIFT 14
  75 #define GPIO_AOUT_MASK  (3 << GPIO_AOUT_SHIFT)
  76 #define GPIO_AOUT       (0 << GPIO_AOUT_SHIFT)
  77 #define GPIO_AOUT_ISR   (1 << GPIO_AOUT_SHIFT)
  78 #define GPIO_AOUT_0     (2 << GPIO_AOUT_SHIFT)
  79 #define GPIO_AOUT_1     (3 << GPIO_AOUT_SHIFT)
  80
  81 #define GPIO_BOUT_SHIFT 16
  82 #define GPIO_BOUT_MASK  (3 << GPIO_BOUT_SHIFT)
  83 #define GPIO_BOUT       (0 << GPIO_BOUT_SHIFT)
  84 #define GPIO_BOUT_ISR   (1 << GPIO_BOUT_SHIFT)
  85 #define GPIO_BOUT_0     (2 << GPIO_BOUT_SHIFT)
  86 #define GPIO_BOUT_1     (3 << GPIO_BOUT_SHIFT)
  87
  88 /* decode irq number to use with IMR(x), ISR(x) and friends */
  89 #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
  90
  91 #define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
  92 #define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
  93 #define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
  94 #define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
  95 #define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
  96 #define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
  97
  98 extern int mxc_gpio_mode(int gpio_mode);
  99 extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 100                 const char *label);
 101 extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
 102
 103 #endif /* __MACH_IOMUX_V1_H__ */