sound/soc/tegra/tegra_das.h

   1 /*
   2  * tegra_das.h - Definitions for Tegra DAS driver
   3  *
   4  * Author: Stephen Warren <swarren@nvidia.com>
   5  * Copyright (C) 2010 - NVIDIA, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19  * 02110-1301 USA
  20  *
  21  */
  22
  23 #ifndef __TEGRA_DAS_H__
  24 #define __TEGRA_DAS_H__
  25
  26 /* Register TEGRA_DAS_DAP_CTRL_SEL */
  27 #define TEGRA_DAS_DAP_CTRL_SEL                          0x00
  28 #define TEGRA_DAS_DAP_CTRL_SEL_COUNT                    5
  29 #define TEGRA_DAS_DAP_CTRL_SEL_STRIDE                   4
  30 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P             31
  31 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_MS_SEL_S             1
  32 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P       30
  33 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_S       1
  34 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P       29
  35 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_S       1
  36 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P           0
  37 #define TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_S           5
  38
  39 /* Values for field TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL */
  40 #define TEGRA_DAS_DAP_SEL_DAC1  0
  41 #define TEGRA_DAS_DAP_SEL_DAC2  1
  42 #define TEGRA_DAS_DAP_SEL_DAC3  2
  43 #define TEGRA_DAS_DAP_SEL_DAP1  16
  44 #define TEGRA_DAS_DAP_SEL_DAP2  17
  45 #define TEGRA_DAS_DAP_SEL_DAP3  18
  46 #define TEGRA_DAS_DAP_SEL_DAP4  19
  47 #define TEGRA_DAS_DAP_SEL_DAP5  20
  48
  49 /* Register TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL */
  50 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL                        0x40
  51 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_COUNT                  3
  52 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE                 4
  53 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P       28
  54 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_S       4
  55 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P       24
  56 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_S       4
  57 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P          0
  58 #define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_S          4
  59
  60 /*
  61  * Values for:
  62  * TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL
  63  * TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL
  64  * TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL
  65  */
  66 #define TEGRA_DAS_DAC_SEL_DAP1  0
  67 #define TEGRA_DAS_DAC_SEL_DAP2  1
  68 #define TEGRA_DAS_DAC_SEL_DAP3  2
  69 #define TEGRA_DAS_DAC_SEL_DAP4  3
  70 #define TEGRA_DAS_DAC_SEL_DAP5  4
  71
  72 /*
  73  * Names/IDs of the DACs/DAPs.
  74  */
  75
  76 #define TEGRA_DAS_DAP_ID_1 0
  77 #define TEGRA_DAS_DAP_ID_2 1
  78 #define TEGRA_DAS_DAP_ID_3 2
  79 #define TEGRA_DAS_DAP_ID_4 3
  80 #define TEGRA_DAS_DAP_ID_5 4
  81
  82 #define TEGRA_DAS_DAC_ID_1 0
  83 #define TEGRA_DAS_DAC_ID_2 1
  84 #define TEGRA_DAS_DAC_ID_3 2
  85
  86 struct tegra_das {
  87         struct device *dev;
  88         void __iomem *regs;
  89         struct dentry *debug;
  90 };
  91
  92 /*
  93  * Terminology:
  94  * DAS: Digital audio switch (HW module controlled by this driver)
  95  * DAP: Digital audio port (port/pins on Tegra device)
  96  * DAC: Digital audio controller (e.g. I2S or AC97 controller elsewhere)
  97  *
  98  * The Tegra DAS is a mux/cross-bar which can connect each DAP to a specific
  99  * DAC, or another DAP. When DAPs are connected, one must be the master and
 100  * one the slave. Each DAC allows selection of a specific DAP for input, to
 101  * cater for the case where N DAPs are connected to 1 DAC for broadcast
 102  * output.
 103  *
 104  * This driver is dumb; no attempt is made to ensure that a valid routing
 105  * configuration is programmed.
 106  */
 107
 108 /*
 109  * Connect a DAP to to a DAC
 110  * dap_id: DAP to connect: TEGRA_DAS_DAP_ID_*
 111  * dac_sel: DAC to connect to: TEGRA_DAS_DAP_SEL_DAC*
 112  */
 113 extern int tegra_das_connect_dap_to_dac(int dap_id, int dac_sel);
 114
 115 /*
 116  * Connect a DAP to to another DAP
 117  * dap_id: DAP to connect: TEGRA_DAS_DAP_ID_*
 118  * other_dap_sel: DAP to connect to: TEGRA_DAS_DAP_SEL_DAP*
 119  * master: Is this DAP the master (1) or slave (0)
 120  * sdata1rx: Is this DAP's SDATA1 pin RX (1) or TX (0)
 121  * sdata2rx: Is this DAP's SDATA2 pin RX (1) or TX (0)
 122  */
 123 extern int tegra_das_connect_dap_to_dap(int dap_id, int other_dap_sel,
 124                                         int master, int sdata1rx,
 125                                         int sdata2rx);
 126
 127 /*
 128  * Connect a DAC's input to a DAP
 129  * (DAC outputs are selected by the DAP)
 130  * dac_id: DAC ID to connect: TEGRA_DAS_DAC_ID_*
 131  * dap_sel: DAP to receive input from: TEGRA_DAS_DAC_SEL_DAP*
 132  */
 133 extern int tegra_das_connect_dac_to_dap(int dac_id, int dap_sel);
 134
 135 #endif