arch/powerpc/include/asm/ptrace.h

   1 #ifndef _ASM_POWERPC_PTRACE_H
   2 #define _ASM_POWERPC_PTRACE_H
   3
   4 /*
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  * This struct defines the way the registers are stored on the
   8  * kernel stack during a system call or other kernel entry.
   9  *
  10  * this should only contain volatile regs
  11  * since we can keep non-volatile in the thread_struct
  12  * should set this up when only volatiles are saved
  13  * by intr code.
  14  *
  15  * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
  16  * that the overall structure is a multiple of 16 bytes in length.
  17  *
  18  * Note that the offsets of the fields in this struct correspond with
  19  * the PT_* values below.  This simplifies arch/powerpc/kernel/ptrace.c.
  20  *
  21  * This program is free software; you can redistribute it and/or
  22  * modify it under the terms of the GNU General Public License
  23  * as published by the Free Software Foundation; either version
  24  * 2 of the License, or (at your option) any later version.
  25  */
  26
  27 #include <linux/types.h>
  28
  29 #ifndef __ASSEMBLY__
  30
  31 struct pt_regs {
  32         unsigned long gpr[32];
  33         unsigned long nip;
  34         unsigned long msr;
  35         unsigned long orig_gpr3;        /* Used for restarting system calls */
  36         unsigned long ctr;
  37         unsigned long link;
  38         unsigned long xer;
  39         unsigned long ccr;
  40 #ifdef __powerpc64__
  41         unsigned long softe;            /* Soft enabled/disabled */
  42 #else
  43         unsigned long mq;               /* 601 only (not used at present) */
  44                                         /* Used on APUS to hold IPL value. */
  45 #endif
  46         unsigned long trap;             /* Reason for being here */
  47         /* N.B. for critical exceptions on 4xx, the dar and dsisr
  48            fields are overloaded to hold srr0 and srr1. */
  49         unsigned long dar;              /* Fault registers */
  50         unsigned long dsisr;            /* on 4xx/Book-E used for ESR */
  51         unsigned long result;           /* Result of a system call */
  52 };
  53
  54 #endif /* __ASSEMBLY__ */
  55
  56 #ifdef __KERNEL__
  57
  58 #ifdef __powerpc64__
  59
  60 #define STACK_FRAME_OVERHEAD    112     /* size of minimum stack frame */
  61 #define STACK_FRAME_LR_SAVE     2       /* Location of LR in stack frame */
  62 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
  63 #define STACK_INT_FRAME_SIZE    (sizeof(struct pt_regs) + \
  64                                         STACK_FRAME_OVERHEAD + 288)
  65 #define STACK_FRAME_MARKER      12
  66
  67 /* Size of dummy stack frame allocated when calling signal handler. */
  68 #define __SIGNAL_FRAMESIZE      128
  69 #define __SIGNAL_FRAMESIZE32    64
  70
  71 #else /* __powerpc64__ */
  72
  73 #define STACK_FRAME_OVERHEAD    16      /* size of minimum stack frame */
  74 #define STACK_FRAME_LR_SAVE     1       /* Location of LR in stack frame */
  75 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
  76 #define STACK_INT_FRAME_SIZE    (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
  77 #define STACK_FRAME_MARKER      2
  78
  79 /* Size of stack frame allocated when calling signal handler. */
  80 #define __SIGNAL_FRAMESIZE      64
  81
  82 #endif /* __powerpc64__ */
  83
  84 #ifndef __ASSEMBLY__
  85
  86 #define instruction_pointer(regs) ((regs)->nip)
  87 #define user_stack_pointer(regs) ((regs)->gpr[1])
  88 #define kernel_stack_pointer(regs) ((regs)->gpr[1])
  89 #define regs_return_value(regs) ((regs)->gpr[3])
  90
  91 #ifdef CONFIG_SMP
  92 extern unsigned long profile_pc(struct pt_regs *regs);
  93 #else
  94 #define profile_pc(regs) instruction_pointer(regs)
  95 #endif
  96
  97 #ifdef __powerpc64__
  98 #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
  99 #else
 100 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
 101 #endif
 102
 103 #define force_successful_syscall_return()   \
 104         do { \
 105                 set_thread_flag(TIF_NOERROR); \
 106         } while(0)
 107
 108 struct task_struct;
 109 extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
 110 extern int ptrace_put_reg(struct task_struct *task, int regno,
 111                           unsigned long data);
 112
 113 /*
 114  * We use the least-significant bit of the trap field to indicate
 115  * whether we have saved the full set of registers, or only a
 116  * partial set.  A 1 there means the partial set.
 117  * On 4xx we use the next bit to indicate whether the exception
 118  * is a critical exception (1 means it is).
 119  */
 120 #define FULL_REGS(regs)         (((regs)->trap & 1) == 0)
 121 #ifndef __powerpc64__
 122 #define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) != 0)
 123 #define IS_MCHECK_EXC(regs)     (((regs)->trap & 4) != 0)
 124 #define IS_DEBUG_EXC(regs)      (((regs)->trap & 8) != 0)
 125 #endif /* ! __powerpc64__ */
 126 #define TRAP(regs)              ((regs)->trap & ~0xF)
 127 #ifdef __powerpc64__
 128 #define CHECK_FULL_REGS(regs)   BUG_ON(regs->trap & 1)
 129 #else
 130 #define CHECK_FULL_REGS(regs)                                                 \
 131 do {                                                                          \
 132         if ((regs)->trap & 1)                                                 \
 133                 printk(KERN_CRIT "%s: partial register set\n", __func__); \
 134 } while (0)
 135 #endif /* __powerpc64__ */
 136
 137 #define arch_has_single_step()  (1)
 138 #define arch_has_block_step()   (!cpu_has_feature(CPU_FTR_601))
 139 #define ARCH_HAS_USER_SINGLE_STEP_INFO
 140
 141 /*
 142  * kprobe-based event tracer support
 143  */
 144
 145 #include <linux/stddef.h>
 146 #include <linux/thread_info.h>
 147 extern int regs_query_register_offset(const char *name);
 148 extern const char *regs_query_register_name(unsigned int offset);
 149 #define MAX_REG_OFFSET (offsetof(struct pt_regs, dsisr))
 150
 151 /**
 152  * regs_get_register() - get register value from its offset
 153  * @regs:          pt_regs from which register value is gotten
 154  * @offset:    offset number of the register.
 155  *
 156  * regs_get_register returns the value of a register whose offset from @regs.
 157  * The @offset is the offset of the register in struct pt_regs.
 158  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
 159  */
 160 static inline unsigned long regs_get_register(struct pt_regs *regs,
 161                                                 unsigned int offset)
 162 {
 163         if (unlikely(offset > MAX_REG_OFFSET))
 164                 return 0;
 165         return *(unsigned long *)((unsigned long)regs + offset);
 166 }
 167
 168 /**
 169  * regs_within_kernel_stack() - check the address in the stack
 170  * @regs:      pt_regs which contains kernel stack pointer.
 171  * @addr:      address which is checked.
 172  *
 173  * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
 174  * If @addr is within the kernel stack, it returns true. If not, returns false.
 175  */
 176
 177 static inline bool regs_within_kernel_stack(struct pt_regs *regs,
 178                                                 unsigned long addr)
 179 {
 180         return ((addr & ~(THREAD_SIZE - 1))  ==
 181                 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
 182 }
 183
 184 /**
 185  * regs_get_kernel_stack_nth() - get Nth entry of the stack
 186  * @regs:       pt_regs which contains kernel stack pointer.
 187  * @n:          stack entry number.
 188  *
 189  * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
 190  * is specified by @regs. If the @n th entry is NOT in the kernel stack,
 191  * this returns 0.
 192  */
 193 static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
 194                                                       unsigned int n)
 195 {
 196         unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
 197         addr += n;
 198         if (regs_within_kernel_stack(regs, (unsigned long)addr))
 199                 return *addr;
 200         else
 201                 return 0;
 202 }
 203
 204 #endif /* __ASSEMBLY__ */
 205
 206 #endif /* __KERNEL__ */
 207
 208 /*
 209  * Offsets used by 'ptrace' system call interface.
 210  * These can't be changed without breaking binary compatibility
 211  * with MkLinux, etc.
 212  */
 213 #define PT_R0   0
 214 #define PT_R1   1
 215 #define PT_R2   2
 216 #define PT_R3   3
 217 #define PT_R4   4
 218 #define PT_R5   5
 219 #define PT_R6   6
 220 #define PT_R7   7
 221 #define PT_R8   8
 222 #define PT_R9   9
 223 #define PT_R10  10
 224 #define PT_R11  11
 225 #define PT_R12  12
 226 #define PT_R13  13
 227 #define PT_R14  14
 228 #define PT_R15  15
 229 #define PT_R16  16
 230 #define PT_R17  17
 231 #define PT_R18  18
 232 #define PT_R19  19
 233 #define PT_R20  20
 234 #define PT_R21  21
 235 #define PT_R22  22
 236 #define PT_R23  23
 237 #define PT_R24  24
 238 #define PT_R25  25
 239 #define PT_R26  26
 240 #define PT_R27  27
 241 #define PT_R28  28
 242 #define PT_R29  29
 243 #define PT_R30  30
 244 #define PT_R31  31
 245
 246 #define PT_NIP  32
 247 #define PT_MSR  33
 248 #define PT_ORIG_R3 34
 249 #define PT_CTR  35
 250 #define PT_LNK  36
 251 #define PT_XER  37
 252 #define PT_CCR  38
 253 #ifndef __powerpc64__
 254 #define PT_MQ   39
 255 #else
 256 #define PT_SOFTE 39
 257 #endif
 258 #define PT_TRAP 40
 259 #define PT_DAR  41
 260 #define PT_DSISR 42
 261 #define PT_RESULT 43
 262 #define PT_REGS_COUNT 44
 263
 264 #define PT_FPR0 48      /* each FP reg occupies 2 slots in this space */
 265
 266 #ifndef __powerpc64__
 267
 268 #define PT_FPR31 (PT_FPR0 + 2*31)
 269 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
 270
 271 #else /* __powerpc64__ */
 272
 273 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
 274
 275 #ifdef __KERNEL__
 276 #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
 277 #endif
 278
 279 #define PT_VR0 82       /* each Vector reg occupies 2 slots in 64-bit */
 280 #define PT_VSCR (PT_VR0 + 32*2 + 1)
 281 #define PT_VRSAVE (PT_VR0 + 33*2)
 282
 283 #ifdef __KERNEL__
 284 #define PT_VR0_32 164   /* each Vector reg occupies 4 slots in 32-bit */
 285 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
 286 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
 287 #endif
 288
 289 /*
 290  * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
 291  */
 292 #define PT_VSR0 150     /* each VSR reg occupies 2 slots in 64-bit */
 293 #define PT_VSR31 (PT_VSR0 + 2*31)
 294 #ifdef __KERNEL__
 295 #define PT_VSR0_32 300  /* each VSR reg occupies 4 slots in 32-bit */
 296 #endif
 297 #endif /* __powerpc64__ */
 298
 299 /*
 300  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 301  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 302  * corresponding vector registers.  Quadword 32 contains the vscr as the
 303  * last word (offset 12) within that quadword.  Quadword 33 contains the
 304  * vrsave as the first word (offset 0) within the quadword.
 305  *
 306  * This definition of the VMX state is compatible with the current PPC32
 307  * ptrace interface.  This allows signal handling and ptrace to use the same
 308  * structures.  This also simplifies the implementation of a bi-arch
 309  * (combined (32- and 64-bit) gdb.
 310  */
 311 #define PTRACE_GETVRREGS        18
 312 #define PTRACE_SETVRREGS        19
 313
 314 /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
 315  * spefscr, in one go */
 316 #define PTRACE_GETEVRREGS       20
 317 #define PTRACE_SETEVRREGS       21
 318
 319 /* Get the first 32 128bit VSX registers */
 320 #define PTRACE_GETVSRREGS       27
 321 #define PTRACE_SETVSRREGS       28
 322
 323 /*
 324  * Get or set a debug register. The first 16 are DABR registers and the
 325  * second 16 are IABR registers.
 326  */
 327 #define PTRACE_GET_DEBUGREG     25
 328 #define PTRACE_SET_DEBUGREG     26
 329
 330 /* (new) PTRACE requests using the same numbers as x86 and the same
 331  * argument ordering. Additionally, they support more registers too
 332  */
 333 #define PTRACE_GETREGS            12
 334 #define PTRACE_SETREGS            13
 335 #define PTRACE_GETFPREGS          14
 336 #define PTRACE_SETFPREGS          15
 337 #define PTRACE_GETREGS64          22
 338 #define PTRACE_SETREGS64          23
 339
 340 /* (old) PTRACE requests with inverted arguments */
 341 #define PPC_PTRACE_GETREGS      0x99    /* Get GPRs 0 - 31 */
 342 #define PPC_PTRACE_SETREGS      0x98    /* Set GPRs 0 - 31 */
 343 #define PPC_PTRACE_GETFPREGS    0x97    /* Get FPRs 0 - 31 */
 344 #define PPC_PTRACE_SETFPREGS    0x96    /* Set FPRs 0 - 31 */
 345
 346 /* Calls to trace a 64bit program from a 32bit program */
 347 #define PPC_PTRACE_PEEKTEXT_3264 0x95
 348 #define PPC_PTRACE_PEEKDATA_3264 0x94
 349 #define PPC_PTRACE_POKETEXT_3264 0x93
 350 #define PPC_PTRACE_POKEDATA_3264 0x92
 351 #define PPC_PTRACE_PEEKUSR_3264  0x91
 352 #define PPC_PTRACE_POKEUSR_3264  0x90
 353
 354 #define PTRACE_SINGLEBLOCK      0x100   /* resume execution until next branch */
 355
 356 #define PPC_PTRACE_GETHWDBGINFO 0x89
 357 #define PPC_PTRACE_SETHWDEBUG   0x88
 358 #define PPC_PTRACE_DELHWDEBUG   0x87
 359
 360 #ifndef __ASSEMBLY__
 361
 362 struct ppc_debug_info {
 363         __u32 version;                  /* Only version 1 exists to date */
 364         __u32 num_instruction_bps;
 365         __u32 num_data_bps;
 366         __u32 num_condition_regs;
 367         __u32 data_bp_alignment;
 368         __u32 sizeof_condition;         /* size of the DVC register */
 369         __u64 features;
 370 };
 371
 372 #endif /* __ASSEMBLY__ */
 373
 374 /*
 375  * features will have bits indication whether there is support for:
 376  */
 377 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE         0x0000000000000001
 378 #define PPC_DEBUG_FEATURE_INSN_BP_MASK          0x0000000000000002
 379 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE         0x0000000000000004
 380 #define PPC_DEBUG_FEATURE_DATA_BP_MASK          0x0000000000000008
 381
 382 #ifndef __ASSEMBLY__
 383
 384 struct ppc_hw_breakpoint {
 385         __u32 version;          /* currently, version must be 1 */
 386         __u32 trigger_type;     /* only some combinations allowed */
 387         __u32 addr_mode;        /* address match mode */
 388         __u32 condition_mode;   /* break/watchpoint condition flags */
 389         __u64 addr;             /* break/watchpoint address */
 390         __u64 addr2;            /* range end or mask */
 391         __u64 condition_value;  /* contents of the DVC register */
 392 };
 393
 394 #endif /* __ASSEMBLY__ */
 395
 396 /*
 397  * Trigger Type
 398  */
 399 #define PPC_BREAKPOINT_TRIGGER_EXECUTE  0x00000001
 400 #define PPC_BREAKPOINT_TRIGGER_READ     0x00000002
 401 #define PPC_BREAKPOINT_TRIGGER_WRITE    0x00000004
 402 #define PPC_BREAKPOINT_TRIGGER_RW       \
 403         (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
 404
 405 /*
 406  * Address Mode
 407  */
 408 #define PPC_BREAKPOINT_MODE_EXACT               0x00000000
 409 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE     0x00000001
 410 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE     0x00000002
 411 #define PPC_BREAKPOINT_MODE_MASK                0x00000003
 412
 413 /*
 414  * Condition Mode
 415  */
 416 #define PPC_BREAKPOINT_CONDITION_MODE   0x00000003
 417 #define PPC_BREAKPOINT_CONDITION_NONE   0x00000000
 418 #define PPC_BREAKPOINT_CONDITION_AND    0x00000001
 419 #define PPC_BREAKPOINT_CONDITION_EXACT  PPC_BREAKPOINT_CONDITION_AND
 420 #define PPC_BREAKPOINT_CONDITION_OR     0x00000002
 421 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
 422 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
 423 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT       16
 424 #define PPC_BREAKPOINT_CONDITION_BE(n)  \
 425         (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
 426
 427 #endif /* _ASM_POWERPC_PTRACE_H */