?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge tag 'v3.3.3' into 3.3/master
[zen-stable.git] / drivers / tty / mxser.c
blob8998d527232ade4b33f51c8ba234c16122cbe1b1
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/bitops.h>
41 #include <linux/slab.h>
42 #include <linux/ratelimit.h>
43
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/uaccess.h>
48
49 #include "mxser.h"
50
51 #define MXSER_VERSION "2.0.5" /* 1.14 */
52 #define MXSERMAJOR 174
53
54 #define MXSER_BOARDS 4 /* Max. boards */
55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57 #define MXSER_ISR_PASS_LIMIT 100
58
59 /*CheckIsMoxaMust return value*/
60 #define MOXA_OTHER_UART 0x00
61 #define MOXA_MUST_MU150_HWID 0x01
62 #define MOXA_MUST_MU860_HWID 0x02
63
64 #define WAKEUP_CHARS 256
65
66 #define UART_MCR_AFE 0x20
67 #define UART_LSR_SPECIAL 0x1E
68
69 #define PCI_DEVICE_ID_POS104UL 0x1044
70 #define PCI_DEVICE_ID_CB108 0x1080
71 #define PCI_DEVICE_ID_CP102UF 0x1023
72 #define PCI_DEVICE_ID_CP112UL 0x1120
73 #define PCI_DEVICE_ID_CB114 0x1142
74 #define PCI_DEVICE_ID_CP114UL 0x1143
75 #define PCI_DEVICE_ID_CB134I 0x1341
76 #define PCI_DEVICE_ID_CP138U 0x1380
77
78
79 #define C168_ASIC_ID 1
80 #define C104_ASIC_ID 2
81 #define C102_ASIC_ID 0xB
82 #define CI132_ASIC_ID 4
83 #define CI134_ASIC_ID 3
84 #define CI104J_ASIC_ID 5
85
86 #define MXSER_HIGHBAUD 1
87 #define MXSER_HAS2 2
88
89 /* This is only for PCI */
90 static const struct {
91 int type;
92 int tx_fifo;
93 int rx_fifo;
94 int xmit_fifo_size;
95 int rx_high_water;
96 int rx_trigger;
97 int rx_low_water;
98 long max_baud;
99 } Gpci_uart_info[] = {
100 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
101 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
102 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
103 };
104 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
105
106 struct mxser_cardinfo {
107 char *name;
108 unsigned int nports;
109 unsigned int flags;
110 };
111
112 static const struct mxser_cardinfo mxser_cards[] = {
113 /* 0*/ { "C168 series", 8, },
114 { "C104 series", 4, },
115 { "CI-104J series", 4, },
116 { "C168H/PCI series", 8, },
117 { "C104H/PCI series", 4, },
118 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
119 { "CI-132 series", 4, MXSER_HAS2 },
120 { "CI-134 series", 4, },
121 { "CP-132 series", 2, },
122 { "CP-114 series", 4, },
123 /*10*/ { "CT-114 series", 4, },
124 { "CP-102 series", 2, MXSER_HIGHBAUD },
125 { "CP-104U series", 4, },
126 { "CP-168U series", 8, },
127 { "CP-132U series", 2, },
128 /*15*/ { "CP-134U series", 4, },
129 { "CP-104JU series", 4, },
130 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
131 { "CP-118U series", 8, },
132 { "CP-102UL series", 2, },
133 /*20*/ { "CP-102U series", 2, },
134 { "CP-118EL series", 8, },
135 { "CP-168EL series", 8, },
136 { "CP-104EL series", 4, },
137 { "CB-108 series", 8, },
138 /*25*/ { "CB-114 series", 4, },
139 { "CB-134I series", 4, },
140 { "CP-138U series", 8, },
141 { "POS-104UL series", 4, },
142 { "CP-114UL series", 4, },
143 /*30*/ { "CP-102UF series", 2, },
144 { "CP-112UL series", 2, },
145 };
146
147 /* driver_data correspond to the lines in the structure above
148 see also ISA probe function before you change something */
149 static struct pci_device_id mxser_pcibrds[] = {
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
176 { }
177 };
178 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
179
180 static unsigned long ioaddr[MXSER_BOARDS];
181 static int ttymajor = MXSERMAJOR;
182
183 /* Variables for insmod */
184
185 MODULE_AUTHOR("Casper Yang");
186 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
187 module_param_array(ioaddr, ulong, NULL, 0);
188 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
189 module_param(ttymajor, int, 0);
190 MODULE_LICENSE("GPL");
191
192 struct mxser_log {
193 int tick;
194 unsigned long rxcnt[MXSER_PORTS];
195 unsigned long txcnt[MXSER_PORTS];
196 };
197
198 struct mxser_mon {
199 unsigned long rxcnt;
200 unsigned long txcnt;
201 unsigned long up_rxcnt;
202 unsigned long up_txcnt;
203 int modem_status;
204 unsigned char hold_reason;
205 };
206
207 struct mxser_mon_ext {
208 unsigned long rx_cnt[32];
209 unsigned long tx_cnt[32];
210 unsigned long up_rxcnt[32];
211 unsigned long up_txcnt[32];
212 int modem_status[32];
213
214 long baudrate[32];
215 int databits[32];
216 int stopbits[32];
217 int parity[32];
218 int flowctrl[32];
219 int fifo[32];
220 int iftype[32];
221 };
222
223 struct mxser_board;
224
225 struct mxser_port {
226 struct tty_port port;
227 struct mxser_board *board;
228
229 unsigned long ioaddr;
230 unsigned long opmode_ioaddr;
231 int max_baud;
232
233 int rx_high_water;
234 int rx_trigger; /* Rx fifo trigger level */
235 int rx_low_water;
236 int baud_base; /* max. speed */
237 int type; /* UART type */
238
239 int x_char; /* xon/xoff character */
240 int IER; /* Interrupt Enable Register */
241 int MCR; /* Modem control register */
242
243 unsigned char stop_rx;
244 unsigned char ldisc_stop_rx;
245
246 int custom_divisor;
247 unsigned char err_shadow;
248
249 struct async_icount icount; /* kernel counters for 4 input interrupts */
250 int timeout;
251
252 int read_status_mask;
253 int ignore_status_mask;
254 int xmit_fifo_size;
255 int xmit_head;
256 int xmit_tail;
257 int xmit_cnt;
258
259 struct ktermios normal_termios;
260
261 struct mxser_mon mon_data;
262
263 spinlock_t slock;
264 };
265
266 struct mxser_board {
267 unsigned int idx;
268 int irq;
269 const struct mxser_cardinfo *info;
270 unsigned long vector;
271 unsigned long vector_mask;
272
273 int chip_flag;
274 int uart_type;
275
276 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
277 };
278
279 struct mxser_mstatus {
280 tcflag_t cflag;
281 int cts;
282 int dsr;
283 int ri;
284 int dcd;
285 };
286
287 static struct mxser_board mxser_boards[MXSER_BOARDS];
288 static struct tty_driver *mxvar_sdriver;
289 static struct mxser_log mxvar_log;
290 static int mxser_set_baud_method[MXSER_PORTS + 1];
291
292 static void mxser_enable_must_enchance_mode(unsigned long baseio)
293 {
294 u8 oldlcr;
295 u8 efr;
296
297 oldlcr = inb(baseio + UART_LCR);
298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
299
300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
301 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
302
303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
304 outb(oldlcr, baseio + UART_LCR);
305 }
306
307 #ifdef CONFIG_PCI
308 static void mxser_disable_must_enchance_mode(unsigned long baseio)
309 {
310 u8 oldlcr;
311 u8 efr;
312
313 oldlcr = inb(baseio + UART_LCR);
314 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
315
316 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
317 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
318
319 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
320 outb(oldlcr, baseio + UART_LCR);
321 }
322 #endif
323
324 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
325 {
326 u8 oldlcr;
327 u8 efr;
328
329 oldlcr = inb(baseio + UART_LCR);
330 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
331
332 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
333 efr &= ~MOXA_MUST_EFR_BANK_MASK;
334 efr |= MOXA_MUST_EFR_BANK0;
335
336 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
337 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
338 outb(oldlcr, baseio + UART_LCR);
339 }
340
341 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
342 {
343 u8 oldlcr;
344 u8 efr;
345
346 oldlcr = inb(baseio + UART_LCR);
347 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
348
349 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
350 efr &= ~MOXA_MUST_EFR_BANK_MASK;
351 efr |= MOXA_MUST_EFR_BANK0;
352
353 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
354 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
355 outb(oldlcr, baseio + UART_LCR);
356 }
357
358 static void mxser_set_must_fifo_value(struct mxser_port *info)
359 {
360 u8 oldlcr;
361 u8 efr;
362
363 oldlcr = inb(info->ioaddr + UART_LCR);
364 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
365
366 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
367 efr &= ~MOXA_MUST_EFR_BANK_MASK;
368 efr |= MOXA_MUST_EFR_BANK1;
369
370 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
371 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
372 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
373 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
374 outb(oldlcr, info->ioaddr + UART_LCR);
375 }
376
377 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
378 {
379 u8 oldlcr;
380 u8 efr;
381
382 oldlcr = inb(baseio + UART_LCR);
383 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
384
385 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
386 efr &= ~MOXA_MUST_EFR_BANK_MASK;
387 efr |= MOXA_MUST_EFR_BANK2;
388
389 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
390 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
391 outb(oldlcr, baseio + UART_LCR);
392 }
393
394 #ifdef CONFIG_PCI
395 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
396 {
397 u8 oldlcr;
398 u8 efr;
399
400 oldlcr = inb(baseio + UART_LCR);
401 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
402
403 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
404 efr &= ~MOXA_MUST_EFR_BANK_MASK;
405 efr |= MOXA_MUST_EFR_BANK2;
406
407 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
408 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
409 outb(oldlcr, baseio + UART_LCR);
410 }
411 #endif
412
413 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
414 {
415 u8 oldlcr;
416 u8 efr;
417
418 oldlcr = inb(baseio + UART_LCR);
419 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
420
421 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
422 efr &= ~MOXA_MUST_EFR_SF_MASK;
423
424 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
425 outb(oldlcr, baseio + UART_LCR);
426 }
427
428 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
429 {
430 u8 oldlcr;
431 u8 efr;
432
433 oldlcr = inb(baseio + UART_LCR);
434 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
435
436 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
437 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
438 efr |= MOXA_MUST_EFR_SF_TX1;
439
440 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
441 outb(oldlcr, baseio + UART_LCR);
442 }
443
444 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
445 {
446 u8 oldlcr;
447 u8 efr;
448
449 oldlcr = inb(baseio + UART_LCR);
450 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
451
452 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
453 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
454
455 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
456 outb(oldlcr, baseio + UART_LCR);
457 }
458
459 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
460 {
461 u8 oldlcr;
462 u8 efr;
463
464 oldlcr = inb(baseio + UART_LCR);
465 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
466
467 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
468 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
469 efr |= MOXA_MUST_EFR_SF_RX1;
470
471 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
472 outb(oldlcr, baseio + UART_LCR);
473 }
474
475 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
476 {
477 u8 oldlcr;
478 u8 efr;
479
480 oldlcr = inb(baseio + UART_LCR);
481 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
482
483 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
484 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
485
486 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
487 outb(oldlcr, baseio + UART_LCR);
488 }
489
490 #ifdef CONFIG_PCI
491 static int __devinit CheckIsMoxaMust(unsigned long io)
492 {
493 u8 oldmcr, hwid;
494 int i;
495
496 outb(0, io + UART_LCR);
497 mxser_disable_must_enchance_mode(io);
498 oldmcr = inb(io + UART_MCR);
499 outb(0, io + UART_MCR);
500 mxser_set_must_xon1_value(io, 0x11);
501 if ((hwid = inb(io + UART_MCR)) != 0) {
502 outb(oldmcr, io + UART_MCR);
503 return MOXA_OTHER_UART;
504 }
505
506 mxser_get_must_hardware_id(io, &hwid);
507 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
508 if (hwid == Gpci_uart_info[i].type)
509 return (int)hwid;
510 }
511 return MOXA_OTHER_UART;
512 }
513 #endif
514
515 static void process_txrx_fifo(struct mxser_port *info)
516 {
517 int i;
518
519 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
520 info->rx_trigger = 1;
521 info->rx_high_water = 1;
522 info->rx_low_water = 1;
523 info->xmit_fifo_size = 1;
524 } else
525 for (i = 0; i < UART_INFO_NUM; i++)
526 if (info->board->chip_flag == Gpci_uart_info[i].type) {
527 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
528 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
529 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
530 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
531 break;
532 }
533 }
534
535 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
536 {
537 static unsigned char mxser_msr[MXSER_PORTS + 1];
538 unsigned char status = 0;
539
540 status = inb(baseaddr + UART_MSR);
541
542 mxser_msr[port] &= 0x0F;
543 mxser_msr[port] |= status;
544 status = mxser_msr[port];
545 if (mode)
546 mxser_msr[port] = 0;
547
548 return status;
549 }
550
551 static int mxser_carrier_raised(struct tty_port *port)
552 {
553 struct mxser_port *mp = container_of(port, struct mxser_port, port);
554 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
555 }
556
557 static void mxser_dtr_rts(struct tty_port *port, int on)
558 {
559 struct mxser_port *mp = container_of(port, struct mxser_port, port);
560 unsigned long flags;
561
562 spin_lock_irqsave(&mp->slock, flags);
563 if (on)
564 outb(inb(mp->ioaddr + UART_MCR) |
565 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
566 else
567 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
568 mp->ioaddr + UART_MCR);
569 spin_unlock_irqrestore(&mp->slock, flags);
570 }
571
572 static int mxser_set_baud(struct tty_struct *tty, long newspd)
573 {
574 struct mxser_port *info = tty->driver_data;
575 int quot = 0, baud;
576 unsigned char cval;
577
578 if (!info->ioaddr)
579 return -1;
580
581 if (newspd > info->max_baud)
582 return -1;
583
584 if (newspd == 134) {
585 quot = 2 * info->baud_base / 269;
586 tty_encode_baud_rate(tty, 134, 134);
587 } else if (newspd) {
588 quot = info->baud_base / newspd;
589 if (quot == 0)
590 quot = 1;
591 baud = info->baud_base/quot;
592 tty_encode_baud_rate(tty, baud, baud);
593 } else {
594 quot = 0;
595 }
596
597 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
598 info->timeout += HZ / 50; /* Add .02 seconds of slop */
599
600 if (quot) {
601 info->MCR |= UART_MCR_DTR;
602 outb(info->MCR, info->ioaddr + UART_MCR);
603 } else {
604 info->MCR &= ~UART_MCR_DTR;
605 outb(info->MCR, info->ioaddr + UART_MCR);
606 return 0;
607 }
608
609 cval = inb(info->ioaddr + UART_LCR);
610
611 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
612
613 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
614 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
615 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
616
617 #ifdef BOTHER
618 if (C_BAUD(tty) == BOTHER) {
619 quot = info->baud_base % newspd;
620 quot *= 8;
621 if (quot % newspd > newspd / 2) {
622 quot /= newspd;
623 quot++;
624 } else
625 quot /= newspd;
626
627 mxser_set_must_enum_value(info->ioaddr, quot);
628 } else
629 #endif
630 mxser_set_must_enum_value(info->ioaddr, 0);
631
632 return 0;
633 }
634
635 /*
636 * This routine is called to set the UART divisor registers to match
637 * the specified baud rate for a serial port.
638 */
639 static int mxser_change_speed(struct tty_struct *tty,
640 struct ktermios *old_termios)
641 {
642 struct mxser_port *info = tty->driver_data;
643 unsigned cflag, cval, fcr;
644 int ret = 0;
645 unsigned char status;
646
647 cflag = tty->termios->c_cflag;
648 if (!info->ioaddr)
649 return ret;
650
651 if (mxser_set_baud_method[tty->index] == 0)
652 mxser_set_baud(tty, tty_get_baud_rate(tty));
653
654 /* byte size and parity */
655 switch (cflag & CSIZE) {
656 case CS5:
657 cval = 0x00;
658 break;
659 case CS6:
660 cval = 0x01;
661 break;
662 case CS7:
663 cval = 0x02;
664 break;
665 case CS8:
666 cval = 0x03;
667 break;
668 default:
669 cval = 0x00;
670 break; /* too keep GCC shut... */
671 }
672 if (cflag & CSTOPB)
673 cval |= 0x04;
674 if (cflag & PARENB)
675 cval |= UART_LCR_PARITY;
676 if (!(cflag & PARODD))
677 cval |= UART_LCR_EPAR;
678 if (cflag & CMSPAR)
679 cval |= UART_LCR_SPAR;
680
681 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
682 if (info->board->chip_flag) {
683 fcr = UART_FCR_ENABLE_FIFO;
684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
685 mxser_set_must_fifo_value(info);
686 } else
687 fcr = 0;
688 } else {
689 fcr = UART_FCR_ENABLE_FIFO;
690 if (info->board->chip_flag) {
691 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
692 mxser_set_must_fifo_value(info);
693 } else {
694 switch (info->rx_trigger) {
695 case 1:
696 fcr |= UART_FCR_TRIGGER_1;
697 break;
698 case 4:
699 fcr |= UART_FCR_TRIGGER_4;
700 break;
701 case 8:
702 fcr |= UART_FCR_TRIGGER_8;
703 break;
704 default:
705 fcr |= UART_FCR_TRIGGER_14;
706 break;
707 }
708 }
709 }
710
711 /* CTS flow control flag and modem status interrupts */
712 info->IER &= ~UART_IER_MSI;
713 info->MCR &= ~UART_MCR_AFE;
714 if (cflag & CRTSCTS) {
715 info->port.flags |= ASYNC_CTS_FLOW;
716 info->IER |= UART_IER_MSI;
717 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
718 info->MCR |= UART_MCR_AFE;
719 } else {
720 status = inb(info->ioaddr + UART_MSR);
721 if (tty->hw_stopped) {
722 if (status & UART_MSR_CTS) {
723 tty->hw_stopped = 0;
724 if (info->type != PORT_16550A &&
725 !info->board->chip_flag) {
726 outb(info->IER & ~UART_IER_THRI,
727 info->ioaddr +
728 UART_IER);
729 info->IER |= UART_IER_THRI;
730 outb(info->IER, info->ioaddr +
731 UART_IER);
732 }
733 tty_wakeup(tty);
734 }
735 } else {
736 if (!(status & UART_MSR_CTS)) {
737 tty->hw_stopped = 1;
738 if ((info->type != PORT_16550A) &&
739 (!info->board->chip_flag)) {
740 info->IER &= ~UART_IER_THRI;
741 outb(info->IER, info->ioaddr +
742 UART_IER);
743 }
744 }
745 }
746 }
747 } else {
748 info->port.flags &= ~ASYNC_CTS_FLOW;
749 }
750 outb(info->MCR, info->ioaddr + UART_MCR);
751 if (cflag & CLOCAL) {
752 info->port.flags &= ~ASYNC_CHECK_CD;
753 } else {
754 info->port.flags |= ASYNC_CHECK_CD;
755 info->IER |= UART_IER_MSI;
756 }
757 outb(info->IER, info->ioaddr + UART_IER);
758
759 /*
760 * Set up parity check flag
761 */
762 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
763 if (I_INPCK(tty))
764 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
765 if (I_BRKINT(tty) || I_PARMRK(tty))
766 info->read_status_mask |= UART_LSR_BI;
767
768 info->ignore_status_mask = 0;
769
770 if (I_IGNBRK(tty)) {
771 info->ignore_status_mask |= UART_LSR_BI;
772 info->read_status_mask |= UART_LSR_BI;
773 /*
774 * If we're ignore parity and break indicators, ignore
775 * overruns too. (For real raw support).
776 */
777 if (I_IGNPAR(tty)) {
778 info->ignore_status_mask |=
779 UART_LSR_OE |
780 UART_LSR_PE |
781 UART_LSR_FE;
782 info->read_status_mask |=
783 UART_LSR_OE |
784 UART_LSR_PE |
785 UART_LSR_FE;
786 }
787 }
788 if (info->board->chip_flag) {
789 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
790 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
791 if (I_IXON(tty)) {
792 mxser_enable_must_rx_software_flow_control(
793 info->ioaddr);
794 } else {
795 mxser_disable_must_rx_software_flow_control(
796 info->ioaddr);
797 }
798 if (I_IXOFF(tty)) {
799 mxser_enable_must_tx_software_flow_control(
800 info->ioaddr);
801 } else {
802 mxser_disable_must_tx_software_flow_control(
803 info->ioaddr);
804 }
805 }
806
807
808 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
809 outb(cval, info->ioaddr + UART_LCR);
810
811 return ret;
812 }
813
814 static void mxser_check_modem_status(struct tty_struct *tty,
815 struct mxser_port *port, int status)
816 {
817 /* update input line counters */
818 if (status & UART_MSR_TERI)
819 port->icount.rng++;
820 if (status & UART_MSR_DDSR)
821 port->icount.dsr++;
822 if (status & UART_MSR_DDCD)
823 port->icount.dcd++;
824 if (status & UART_MSR_DCTS)
825 port->icount.cts++;
826 port->mon_data.modem_status = status;
827 wake_up_interruptible(&port->port.delta_msr_wait);
828
829 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
830 if (status & UART_MSR_DCD)
831 wake_up_interruptible(&port->port.open_wait);
832 }
833
834 if (port->port.flags & ASYNC_CTS_FLOW) {
835 if (tty->hw_stopped) {
836 if (status & UART_MSR_CTS) {
837 tty->hw_stopped = 0;
838
839 if ((port->type != PORT_16550A) &&
840 (!port->board->chip_flag)) {
841 outb(port->IER & ~UART_IER_THRI,
842 port->ioaddr + UART_IER);
843 port->IER |= UART_IER_THRI;
844 outb(port->IER, port->ioaddr +
845 UART_IER);
846 }
847 tty_wakeup(tty);
848 }
849 } else {
850 if (!(status & UART_MSR_CTS)) {
851 tty->hw_stopped = 1;
852 if (port->type != PORT_16550A &&
853 !port->board->chip_flag) {
854 port->IER &= ~UART_IER_THRI;
855 outb(port->IER, port->ioaddr +
856 UART_IER);
857 }
858 }
859 }
860 }
861 }
862
863 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
864 {
865 struct mxser_port *info = container_of(port, struct mxser_port, port);
866 unsigned long page;
867 unsigned long flags;
868
869 page = __get_free_page(GFP_KERNEL);
870 if (!page)
871 return -ENOMEM;
872
873 spin_lock_irqsave(&info->slock, flags);
874
875 if (!info->ioaddr || !info->type) {
876 set_bit(TTY_IO_ERROR, &tty->flags);
877 free_page(page);
878 spin_unlock_irqrestore(&info->slock, flags);
879 return 0;
880 }
881 info->port.xmit_buf = (unsigned char *) page;
882
883 /*
884 * Clear the FIFO buffers and disable them
885 * (they will be reenabled in mxser_change_speed())
886 */
887 if (info->board->chip_flag)
888 outb((UART_FCR_CLEAR_RCVR |
889 UART_FCR_CLEAR_XMIT |
890 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
891 else
892 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
893 info->ioaddr + UART_FCR);
894
895 /*
896 * At this point there's no way the LSR could still be 0xFF;
897 * if it is, then bail out, because there's likely no UART
898 * here.
899 */
900 if (inb(info->ioaddr + UART_LSR) == 0xff) {
901 spin_unlock_irqrestore(&info->slock, flags);
902 if (capable(CAP_SYS_ADMIN)) {
903 set_bit(TTY_IO_ERROR, &tty->flags);
904 return 0;
905 } else
906 return -ENODEV;
907 }
908
909 /*
910 * Clear the interrupt registers.
911 */
912 (void) inb(info->ioaddr + UART_LSR);
913 (void) inb(info->ioaddr + UART_RX);
914 (void) inb(info->ioaddr + UART_IIR);
915 (void) inb(info->ioaddr + UART_MSR);
916
917 /*
918 * Now, initialize the UART
919 */
920 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
921 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
922 outb(info->MCR, info->ioaddr + UART_MCR);
923
924 /*
925 * Finally, enable interrupts
926 */
927 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
928
929 if (info->board->chip_flag)
930 info->IER |= MOXA_MUST_IER_EGDAI;
931 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
932
933 /*
934 * And clear the interrupt registers again for luck.
935 */
936 (void) inb(info->ioaddr + UART_LSR);
937 (void) inb(info->ioaddr + UART_RX);
938 (void) inb(info->ioaddr + UART_IIR);
939 (void) inb(info->ioaddr + UART_MSR);
940
941 clear_bit(TTY_IO_ERROR, &tty->flags);
942 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
943
944 /*
945 * and set the speed of the serial port
946 */
947 mxser_change_speed(tty, NULL);
948 spin_unlock_irqrestore(&info->slock, flags);
949
950 return 0;
951 }
952
953 /*
954 * This routine will shutdown a serial port
955 */
956 static void mxser_shutdown_port(struct tty_port *port)
957 {
958 struct mxser_port *info = container_of(port, struct mxser_port, port);
959 unsigned long flags;
960
961 spin_lock_irqsave(&info->slock, flags);
962
963 /*
964 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
965 * here so the queue might never be waken up
966 */
967 wake_up_interruptible(&info->port.delta_msr_wait);
968
969 /*
970 * Free the xmit buffer, if necessary
971 */
972 if (info->port.xmit_buf) {
973 free_page((unsigned long) info->port.xmit_buf);
974 info->port.xmit_buf = NULL;
975 }
976
977 info->IER = 0;
978 outb(0x00, info->ioaddr + UART_IER);
979
980 /* clear Rx/Tx FIFO's */
981 if (info->board->chip_flag)
982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
983 MOXA_MUST_FCR_GDA_MODE_ENABLE,
984 info->ioaddr + UART_FCR);
985 else
986 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
987 info->ioaddr + UART_FCR);
988
989 /* read data port to reset things */
990 (void) inb(info->ioaddr + UART_RX);
991
992
993 if (info->board->chip_flag)
994 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
995
996 spin_unlock_irqrestore(&info->slock, flags);
997 }
998
999 /*
1000 * This routine is called whenever a serial port is opened. It
1001 * enables interrupts for a serial port, linking in its async structure into
1002 * the IRQ chain. It also performs the serial-specific
1003 * initialization for the tty structure.
1004 */
1005 static int mxser_open(struct tty_struct *tty, struct file *filp)
1006 {
1007 struct mxser_port *info;
1008 int line;
1009
1010 line = tty->index;
1011 if (line == MXSER_PORTS)
1012 return 0;
1013 if (line < 0 || line > MXSER_PORTS)
1014 return -ENODEV;
1015 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1016 if (!info->ioaddr)
1017 return -ENODEV;
1018
1019 tty->driver_data = info;
1020 return tty_port_open(&info->port, tty, filp);
1021 }
1022
1023 static void mxser_flush_buffer(struct tty_struct *tty)
1024 {
1025 struct mxser_port *info = tty->driver_data;
1026 char fcr;
1027 unsigned long flags;
1028
1029
1030 spin_lock_irqsave(&info->slock, flags);
1031 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1032
1033 fcr = inb(info->ioaddr + UART_FCR);
1034 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1035 info->ioaddr + UART_FCR);
1036 outb(fcr, info->ioaddr + UART_FCR);
1037
1038 spin_unlock_irqrestore(&info->slock, flags);
1039
1040 tty_wakeup(tty);
1041 }
1042
1043
1044 static void mxser_close_port(struct tty_port *port)
1045 {
1046 struct mxser_port *info = container_of(port, struct mxser_port, port);
1047 unsigned long timeout;
1048 /*
1049 * At this point we stop accepting input. To do this, we
1050 * disable the receive line status interrupts, and tell the
1051 * interrupt driver to stop checking the data ready bit in the
1052 * line status register.
1053 */
1054 info->IER &= ~UART_IER_RLSI;
1055 if (info->board->chip_flag)
1056 info->IER &= ~MOXA_MUST_RECV_ISR;
1057
1058 outb(info->IER, info->ioaddr + UART_IER);
1059 /*
1060 * Before we drop DTR, make sure the UART transmitter
1061 * has completely drained; this is especially
1062 * important if there is a transmit FIFO!
1063 */
1064 timeout = jiffies + HZ;
1065 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1066 schedule_timeout_interruptible(5);
1067 if (time_after(jiffies, timeout))
1068 break;
1069 }
1070 }
1071
1072 /*
1073 * This routine is called when the serial port gets closed. First, we
1074 * wait for the last remaining data to be sent. Then, we unlink its
1075 * async structure from the interrupt chain if necessary, and we free
1076 * that IRQ if nothing is left in the chain.
1077 */
1078 static void mxser_close(struct tty_struct *tty, struct file *filp)
1079 {
1080 struct mxser_port *info = tty->driver_data;
1081 struct tty_port *port = &info->port;
1082
1083 if (tty->index == MXSER_PORTS || info == NULL)
1084 return;
1085 if (tty_port_close_start(port, tty, filp) == 0)
1086 return;
1087 mutex_lock(&port->mutex);
1088 mxser_close_port(port);
1089 mxser_flush_buffer(tty);
1090 mxser_shutdown_port(port);
1091 clear_bit(ASYNCB_INITIALIZED, &port->flags);
1092 mutex_unlock(&port->mutex);
1093 /* Right now the tty_port set is done outside of the close_end helper
1094 as we don't yet have everyone using refcounts */
1095 tty_port_close_end(port, tty);
1096 tty_port_tty_set(port, NULL);
1097 }
1098
1099 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1100 {
1101 int c, total = 0;
1102 struct mxser_port *info = tty->driver_data;
1103 unsigned long flags;
1104
1105 if (!info->port.xmit_buf)
1106 return 0;
1107
1108 while (1) {
1109 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1110 SERIAL_XMIT_SIZE - info->xmit_head));
1111 if (c <= 0)
1112 break;
1113
1114 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1115 spin_lock_irqsave(&info->slock, flags);
1116 info->xmit_head = (info->xmit_head + c) &
1117 (SERIAL_XMIT_SIZE - 1);
1118 info->xmit_cnt += c;
1119 spin_unlock_irqrestore(&info->slock, flags);
1120
1121 buf += c;
1122 count -= c;
1123 total += c;
1124 }
1125
1126 if (info->xmit_cnt && !tty->stopped) {
1127 if (!tty->hw_stopped ||
1128 (info->type == PORT_16550A) ||
1129 (info->board->chip_flag)) {
1130 spin_lock_irqsave(&info->slock, flags);
1131 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1132 UART_IER);
1133 info->IER |= UART_IER_THRI;
1134 outb(info->IER, info->ioaddr + UART_IER);
1135 spin_unlock_irqrestore(&info->slock, flags);
1136 }
1137 }
1138 return total;
1139 }
1140
1141 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1142 {
1143 struct mxser_port *info = tty->driver_data;
1144 unsigned long flags;
1145
1146 if (!info->port.xmit_buf)
1147 return 0;
1148
1149 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1150 return 0;
1151
1152 spin_lock_irqsave(&info->slock, flags);
1153 info->port.xmit_buf[info->xmit_head++] = ch;
1154 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1155 info->xmit_cnt++;
1156 spin_unlock_irqrestore(&info->slock, flags);
1157 if (!tty->stopped) {
1158 if (!tty->hw_stopped ||
1159 (info->type == PORT_16550A) ||
1160 info->board->chip_flag) {
1161 spin_lock_irqsave(&info->slock, flags);
1162 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1163 info->IER |= UART_IER_THRI;
1164 outb(info->IER, info->ioaddr + UART_IER);
1165 spin_unlock_irqrestore(&info->slock, flags);
1166 }
1167 }
1168 return 1;
1169 }
1170
1171
1172 static void mxser_flush_chars(struct tty_struct *tty)
1173 {
1174 struct mxser_port *info = tty->driver_data;
1175 unsigned long flags;
1176
1177 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1178 (tty->hw_stopped && info->type != PORT_16550A &&
1179 !info->board->chip_flag))
1180 return;
1181
1182 spin_lock_irqsave(&info->slock, flags);
1183
1184 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1185 info->IER |= UART_IER_THRI;
1186 outb(info->IER, info->ioaddr + UART_IER);
1187
1188 spin_unlock_irqrestore(&info->slock, flags);
1189 }
1190
1191 static int mxser_write_room(struct tty_struct *tty)
1192 {
1193 struct mxser_port *info = tty->driver_data;
1194 int ret;
1195
1196 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1197 return ret < 0 ? 0 : ret;
1198 }
1199
1200 static int mxser_chars_in_buffer(struct tty_struct *tty)
1201 {
1202 struct mxser_port *info = tty->driver_data;
1203 return info->xmit_cnt;
1204 }
1205
1206 /*
1207 * ------------------------------------------------------------
1208 * friends of mxser_ioctl()
1209 * ------------------------------------------------------------
1210 */
1211 static int mxser_get_serial_info(struct tty_struct *tty,
1212 struct serial_struct __user *retinfo)
1213 {
1214 struct mxser_port *info = tty->driver_data;
1215 struct serial_struct tmp = {
1216 .type = info->type,
1217 .line = tty->index,
1218 .port = info->ioaddr,
1219 .irq = info->board->irq,
1220 .flags = info->port.flags,
1221 .baud_base = info->baud_base,
1222 .close_delay = info->port.close_delay,
1223 .closing_wait = info->port.closing_wait,
1224 .custom_divisor = info->custom_divisor,
1225 .hub6 = 0
1226 };
1227 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1228 return -EFAULT;
1229 return 0;
1230 }
1231
1232 static int mxser_set_serial_info(struct tty_struct *tty,
1233 struct serial_struct __user *new_info)
1234 {
1235 struct mxser_port *info = tty->driver_data;
1236 struct tty_port *port = &info->port;
1237 struct serial_struct new_serial;
1238 speed_t baud;
1239 unsigned long sl_flags;
1240 unsigned int flags;
1241 int retval = 0;
1242
1243 if (!new_info || !info->ioaddr)
1244 return -ENODEV;
1245 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1246 return -EFAULT;
1247
1248 if (new_serial.irq != info->board->irq ||
1249 new_serial.port != info->ioaddr)
1250 return -EINVAL;
1251
1252 flags = port->flags & ASYNC_SPD_MASK;
1253
1254 if (!capable(CAP_SYS_ADMIN)) {
1255 if ((new_serial.baud_base != info->baud_base) ||
1256 (new_serial.close_delay != info->port.close_delay) ||
1257 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1258 return -EPERM;
1259 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1260 (new_serial.flags & ASYNC_USR_MASK));
1261 } else {
1262 /*
1263 * OK, past this point, all the error checking has been done.
1264 * At this point, we start making changes.....
1265 */
1266 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1267 (new_serial.flags & ASYNC_FLAGS));
1268 port->close_delay = new_serial.close_delay * HZ / 100;
1269 port->closing_wait = new_serial.closing_wait * HZ / 100;
1270 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1271 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1272 (new_serial.baud_base != info->baud_base ||
1273 new_serial.custom_divisor !=
1274 info->custom_divisor)) {
1275 if (new_serial.custom_divisor == 0)
1276 return -EINVAL;
1277 baud = new_serial.baud_base / new_serial.custom_divisor;
1278 tty_encode_baud_rate(tty, baud, baud);
1279 }
1280 }
1281
1282 info->type = new_serial.type;
1283
1284 process_txrx_fifo(info);
1285
1286 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1287 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1288 spin_lock_irqsave(&info->slock, sl_flags);
1289 mxser_change_speed(tty, NULL);
1290 spin_unlock_irqrestore(&info->slock, sl_flags);
1291 }
1292 } else {
1293 retval = mxser_activate(port, tty);
1294 if (retval == 0)
1295 set_bit(ASYNCB_INITIALIZED, &port->flags);
1296 }
1297 return retval;
1298 }
1299
1300 /*
1301 * mxser_get_lsr_info - get line status register info
1302 *
1303 * Purpose: Let user call ioctl() to get info when the UART physically
1304 * is emptied. On bus types like RS485, the transmitter must
1305 * release the bus after transmitting. This must be done when
1306 * the transmit shift register is empty, not be done when the
1307 * transmit holding register is empty. This functionality
1308 * allows an RS485 driver to be written in user space.
1309 */
1310 static int mxser_get_lsr_info(struct mxser_port *info,
1311 unsigned int __user *value)
1312 {
1313 unsigned char status;
1314 unsigned int result;
1315 unsigned long flags;
1316
1317 spin_lock_irqsave(&info->slock, flags);
1318 status = inb(info->ioaddr + UART_LSR);
1319 spin_unlock_irqrestore(&info->slock, flags);
1320 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1321 return put_user(result, value);
1322 }
1323
1324 static int mxser_tiocmget(struct tty_struct *tty)
1325 {
1326 struct mxser_port *info = tty->driver_data;
1327 unsigned char control, status;
1328 unsigned long flags;
1329
1330
1331 if (tty->index == MXSER_PORTS)
1332 return -ENOIOCTLCMD;
1333 if (test_bit(TTY_IO_ERROR, &tty->flags))
1334 return -EIO;
1335
1336 control = info->MCR;
1337
1338 spin_lock_irqsave(&info->slock, flags);
1339 status = inb(info->ioaddr + UART_MSR);
1340 if (status & UART_MSR_ANY_DELTA)
1341 mxser_check_modem_status(tty, info, status);
1342 spin_unlock_irqrestore(&info->slock, flags);
1343 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1344 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1345 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1346 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1347 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1348 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1349 }
1350
1351 static int mxser_tiocmset(struct tty_struct *tty,
1352 unsigned int set, unsigned int clear)
1353 {
1354 struct mxser_port *info = tty->driver_data;
1355 unsigned long flags;
1356
1357
1358 if (tty->index == MXSER_PORTS)
1359 return -ENOIOCTLCMD;
1360 if (test_bit(TTY_IO_ERROR, &tty->flags))
1361 return -EIO;
1362
1363 spin_lock_irqsave(&info->slock, flags);
1364
1365 if (set & TIOCM_RTS)
1366 info->MCR |= UART_MCR_RTS;
1367 if (set & TIOCM_DTR)
1368 info->MCR |= UART_MCR_DTR;
1369
1370 if (clear & TIOCM_RTS)
1371 info->MCR &= ~UART_MCR_RTS;
1372 if (clear & TIOCM_DTR)
1373 info->MCR &= ~UART_MCR_DTR;
1374
1375 outb(info->MCR, info->ioaddr + UART_MCR);
1376 spin_unlock_irqrestore(&info->slock, flags);
1377 return 0;
1378 }
1379
1380 static int __init mxser_program_mode(int port)
1381 {
1382 int id, i, j, n;
1383
1384 outb(0, port);
1385 outb(0, port);
1386 outb(0, port);
1387 (void)inb(port);
1388 (void)inb(port);
1389 outb(0, port);
1390 (void)inb(port);
1391
1392 id = inb(port + 1) & 0x1F;
1393 if ((id != C168_ASIC_ID) &&
1394 (id != C104_ASIC_ID) &&
1395 (id != C102_ASIC_ID) &&
1396 (id != CI132_ASIC_ID) &&
1397 (id != CI134_ASIC_ID) &&
1398 (id != CI104J_ASIC_ID))
1399 return -1;
1400 for (i = 0, j = 0; i < 4; i++) {
1401 n = inb(port + 2);
1402 if (n == 'M') {
1403 j = 1;
1404 } else if ((j == 1) && (n == 1)) {
1405 j = 2;
1406 break;
1407 } else
1408 j = 0;
1409 }
1410 if (j != 2)
1411 id = -2;
1412 return id;
1413 }
1414
1415 static void __init mxser_normal_mode(int port)
1416 {
1417 int i, n;
1418
1419 outb(0xA5, port + 1);
1420 outb(0x80, port + 3);
1421 outb(12, port + 0); /* 9600 bps */
1422 outb(0, port + 1);
1423 outb(0x03, port + 3); /* 8 data bits */
1424 outb(0x13, port + 4); /* loop back mode */
1425 for (i = 0; i < 16; i++) {
1426 n = inb(port + 5);
1427 if ((n & 0x61) == 0x60)
1428 break;
1429 if ((n & 1) == 1)
1430 (void)inb(port);
1431 }
1432 outb(0x00, port + 4);
1433 }
1434
1435 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1436 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1437 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1438 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1439 #define EN_CCMD 0x000 /* Chip's command register */
1440 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1441 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1442 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1443 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1444 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1445 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1446 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1447 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1448 static int __init mxser_read_register(int port, unsigned short *regs)
1449 {
1450 int i, k, value, id;
1451 unsigned int j;
1452
1453 id = mxser_program_mode(port);
1454 if (id < 0)
1455 return id;
1456 for (i = 0; i < 14; i++) {
1457 k = (i & 0x3F) | 0x180;
1458 for (j = 0x100; j > 0; j >>= 1) {
1459 outb(CHIP_CS, port);
1460 if (k & j) {
1461 outb(CHIP_CS | CHIP_DO, port);
1462 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1463 } else {
1464 outb(CHIP_CS, port);
1465 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1466 }
1467 }
1468 (void)inb(port);
1469 value = 0;
1470 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1471 outb(CHIP_CS, port);
1472 outb(CHIP_CS | CHIP_SK, port);
1473 if (inb(port) & CHIP_DI)
1474 value |= j;
1475 }
1476 regs[i] = value;
1477 outb(0, port);
1478 }
1479 mxser_normal_mode(port);
1480 return id;
1481 }
1482
1483 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1484 {
1485 struct mxser_port *ip;
1486 struct tty_port *port;
1487 struct tty_struct *tty;
1488 int result, status;
1489 unsigned int i, j;
1490 int ret = 0;
1491
1492 switch (cmd) {
1493 case MOXA_GET_MAJOR:
1494 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1495 "%x (GET_MAJOR), fix your userspace\n",
1496 current->comm, cmd);
1497 return put_user(ttymajor, (int __user *)argp);
1498
1499 case MOXA_CHKPORTENABLE:
1500 result = 0;
1501 for (i = 0; i < MXSER_BOARDS; i++)
1502 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1503 if (mxser_boards[i].ports[j].ioaddr)
1504 result |= (1 << i);
1505 return put_user(result, (unsigned long __user *)argp);
1506 case MOXA_GETDATACOUNT:
1507 /* The receive side is locked by port->slock but it isn't
1508 clear that an exact snapshot is worth copying here */
1509 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1510 ret = -EFAULT;
1511 return ret;
1512 case MOXA_GETMSTATUS: {
1513 struct mxser_mstatus ms, __user *msu = argp;
1514 for (i = 0; i < MXSER_BOARDS; i++)
1515 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1516 ip = &mxser_boards[i].ports[j];
1517 port = &ip->port;
1518 memset(&ms, 0, sizeof(ms));
1519
1520 mutex_lock(&port->mutex);
1521 if (!ip->ioaddr)
1522 goto copy;
1523
1524 tty = tty_port_tty_get(port);
1525
1526 if (!tty || !tty->termios)
1527 ms.cflag = ip->normal_termios.c_cflag;
1528 else
1529 ms.cflag = tty->termios->c_cflag;
1530 tty_kref_put(tty);
1531 spin_lock_irq(&ip->slock);
1532 status = inb(ip->ioaddr + UART_MSR);
1533 spin_unlock_irq(&ip->slock);
1534 if (status & UART_MSR_DCD)
1535 ms.dcd = 1;
1536 if (status & UART_MSR_DSR)
1537 ms.dsr = 1;
1538 if (status & UART_MSR_CTS)
1539 ms.cts = 1;
1540 copy:
1541 mutex_unlock(&port->mutex);
1542 if (copy_to_user(msu, &ms, sizeof(ms)))
1543 return -EFAULT;
1544 msu++;
1545 }
1546 return 0;
1547 }
1548 case MOXA_ASPP_MON_EXT: {
1549 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1550 unsigned int cflag, iflag, p;
1551 u8 opmode;
1552
1553 me = kzalloc(sizeof(*me), GFP_KERNEL);
1554 if (!me)
1555 return -ENOMEM;
1556
1557 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1558 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1559 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1560 i = MXSER_BOARDS;
1561 break;
1562 }
1563 ip = &mxser_boards[i].ports[j];
1564 port = &ip->port;
1565
1566 mutex_lock(&port->mutex);
1567 if (!ip->ioaddr) {
1568 mutex_unlock(&port->mutex);
1569 continue;
1570 }
1571
1572 spin_lock_irq(&ip->slock);
1573 status = mxser_get_msr(ip->ioaddr, 0, p);
1574
1575 if (status & UART_MSR_TERI)
1576 ip->icount.rng++;
1577 if (status & UART_MSR_DDSR)
1578 ip->icount.dsr++;
1579 if (status & UART_MSR_DDCD)
1580 ip->icount.dcd++;
1581 if (status & UART_MSR_DCTS)
1582 ip->icount.cts++;
1583
1584 ip->mon_data.modem_status = status;
1585 me->rx_cnt[p] = ip->mon_data.rxcnt;
1586 me->tx_cnt[p] = ip->mon_data.txcnt;
1587 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1588 me->up_txcnt[p] = ip->mon_data.up_txcnt;
1589 me->modem_status[p] =
1590 ip->mon_data.modem_status;
1591 spin_unlock_irq(&ip->slock);
1592
1593 tty = tty_port_tty_get(&ip->port);
1594
1595 if (!tty || !tty->termios) {
1596 cflag = ip->normal_termios.c_cflag;
1597 iflag = ip->normal_termios.c_iflag;
1598 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1599 } else {
1600 cflag = tty->termios->c_cflag;
1601 iflag = tty->termios->c_iflag;
1602 me->baudrate[p] = tty_get_baud_rate(tty);
1603 }
1604 tty_kref_put(tty);
1605
1606 me->databits[p] = cflag & CSIZE;
1607 me->stopbits[p] = cflag & CSTOPB;
1608 me->parity[p] = cflag & (PARENB | PARODD |
1609 CMSPAR);
1610
1611 if (cflag & CRTSCTS)
1612 me->flowctrl[p] |= 0x03;
1613
1614 if (iflag & (IXON | IXOFF))
1615 me->flowctrl[p] |= 0x0C;
1616
1617 if (ip->type == PORT_16550A)
1618 me->fifo[p] = 1;
1619
1620 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1621 opmode &= OP_MODE_MASK;
1622 me->iftype[p] = opmode;
1623 mutex_unlock(&port->mutex);
1624 }
1625 }
1626 if (copy_to_user(argp, me, sizeof(*me)))
1627 ret = -EFAULT;
1628 kfree(me);
1629 return ret;
1630 }
1631 default:
1632 return -ENOIOCTLCMD;
1633 }
1634 return 0;
1635 }
1636
1637 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1638 struct async_icount *cprev)
1639 {
1640 struct async_icount cnow;
1641 unsigned long flags;
1642 int ret;
1643
1644 spin_lock_irqsave(&info->slock, flags);
1645 cnow = info->icount; /* atomic copy */
1646 spin_unlock_irqrestore(&info->slock, flags);
1647
1648 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1649 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1650 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1651 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1652
1653 *cprev = cnow;
1654
1655 return ret;
1656 }
1657
1658 static int mxser_ioctl(struct tty_struct *tty,
1659 unsigned int cmd, unsigned long arg)
1660 {
1661 struct mxser_port *info = tty->driver_data;
1662 struct tty_port *port = &info->port;
1663 struct async_icount cnow;
1664 unsigned long flags;
1665 void __user *argp = (void __user *)arg;
1666 int retval;
1667
1668 if (tty->index == MXSER_PORTS)
1669 return mxser_ioctl_special(cmd, argp);
1670
1671 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1672 int p;
1673 unsigned long opmode;
1674 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1675 int shiftbit;
1676 unsigned char val, mask;
1677
1678 p = tty->index % 4;
1679 if (cmd == MOXA_SET_OP_MODE) {
1680 if (get_user(opmode, (int __user *) argp))
1681 return -EFAULT;
1682 if (opmode != RS232_MODE &&
1683 opmode != RS485_2WIRE_MODE &&
1684 opmode != RS422_MODE &&
1685 opmode != RS485_4WIRE_MODE)
1686 return -EFAULT;
1687 mask = ModeMask[p];
1688 shiftbit = p * 2;
1689 spin_lock_irq(&info->slock);
1690 val = inb(info->opmode_ioaddr);
1691 val &= mask;
1692 val |= (opmode << shiftbit);
1693 outb(val, info->opmode_ioaddr);
1694 spin_unlock_irq(&info->slock);
1695 } else {
1696 shiftbit = p * 2;
1697 spin_lock_irq(&info->slock);
1698 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1699 spin_unlock_irq(&info->slock);
1700 opmode &= OP_MODE_MASK;
1701 if (put_user(opmode, (int __user *)argp))
1702 return -EFAULT;
1703 }
1704 return 0;
1705 }
1706
1707 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1708 test_bit(TTY_IO_ERROR, &tty->flags))
1709 return -EIO;
1710
1711 switch (cmd) {
1712 case TIOCGSERIAL:
1713 mutex_lock(&port->mutex);
1714 retval = mxser_get_serial_info(tty, argp);
1715 mutex_unlock(&port->mutex);
1716 return retval;
1717 case TIOCSSERIAL:
1718 mutex_lock(&port->mutex);
1719 retval = mxser_set_serial_info(tty, argp);
1720 mutex_unlock(&port->mutex);
1721 return retval;
1722 case TIOCSERGETLSR: /* Get line status register */
1723 return mxser_get_lsr_info(info, argp);
1724 /*
1725 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1726 * - mask passed in arg for lines of interest
1727 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1728 * Caller should use TIOCGICOUNT to see which one it was
1729 */
1730 case TIOCMIWAIT:
1731 spin_lock_irqsave(&info->slock, flags);
1732 cnow = info->icount; /* note the counters on entry */
1733 spin_unlock_irqrestore(&info->slock, flags);
1734
1735 return wait_event_interruptible(info->port.delta_msr_wait,
1736 mxser_cflags_changed(info, arg, &cnow));
1737 case MOXA_HighSpeedOn:
1738 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1739 case MOXA_SDS_RSTICOUNTER:
1740 spin_lock_irq(&info->slock);
1741 info->mon_data.rxcnt = 0;
1742 info->mon_data.txcnt = 0;
1743 spin_unlock_irq(&info->slock);
1744 return 0;
1745
1746 case MOXA_ASPP_OQUEUE:{
1747 int len, lsr;
1748
1749 len = mxser_chars_in_buffer(tty);
1750 spin_lock_irq(&info->slock);
1751 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1752 spin_unlock_irq(&info->slock);
1753 len += (lsr ? 0 : 1);
1754
1755 return put_user(len, (int __user *)argp);
1756 }
1757 case MOXA_ASPP_MON: {
1758 int mcr, status;
1759
1760 spin_lock_irq(&info->slock);
1761 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1762 mxser_check_modem_status(tty, info, status);
1763
1764 mcr = inb(info->ioaddr + UART_MCR);
1765 spin_unlock_irq(&info->slock);
1766
1767 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1768 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1769 else
1770 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1771
1772 if (mcr & MOXA_MUST_MCR_TX_XON)
1773 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1774 else
1775 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1776
1777 if (tty->hw_stopped)
1778 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1779 else
1780 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1781
1782 if (copy_to_user(argp, &info->mon_data,
1783 sizeof(struct mxser_mon)))
1784 return -EFAULT;
1785
1786 return 0;
1787 }
1788 case MOXA_ASPP_LSTATUS: {
1789 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1790 return -EFAULT;
1791
1792 info->err_shadow = 0;
1793 return 0;
1794 }
1795 case MOXA_SET_BAUD_METHOD: {
1796 int method;
1797
1798 if (get_user(method, (int __user *)argp))
1799 return -EFAULT;
1800 mxser_set_baud_method[tty->index] = method;
1801 return put_user(method, (int __user *)argp);
1802 }
1803 default:
1804 return -ENOIOCTLCMD;
1805 }
1806 return 0;
1807 }
1808
1809 /*
1810 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1811 * Return: write counters to the user passed counter struct
1812 * NB: both 1->0 and 0->1 transitions are counted except for
1813 * RI where only 0->1 is counted.
1814 */
1815
1816 static int mxser_get_icount(struct tty_struct *tty,
1817 struct serial_icounter_struct *icount)
1818
1819 {
1820 struct mxser_port *info = tty->driver_data;
1821 struct async_icount cnow;
1822 unsigned long flags;
1823
1824 spin_lock_irqsave(&info->slock, flags);
1825 cnow = info->icount;
1826 spin_unlock_irqrestore(&info->slock, flags);
1827
1828 icount->frame = cnow.frame;
1829 icount->brk = cnow.brk;
1830 icount->overrun = cnow.overrun;
1831 icount->buf_overrun = cnow.buf_overrun;
1832 icount->parity = cnow.parity;
1833 icount->rx = cnow.rx;
1834 icount->tx = cnow.tx;
1835 icount->cts = cnow.cts;
1836 icount->dsr = cnow.dsr;
1837 icount->rng = cnow.rng;
1838 icount->dcd = cnow.dcd;
1839 return 0;
1840 }
1841
1842 static void mxser_stoprx(struct tty_struct *tty)
1843 {
1844 struct mxser_port *info = tty->driver_data;
1845
1846 info->ldisc_stop_rx = 1;
1847 if (I_IXOFF(tty)) {
1848 if (info->board->chip_flag) {
1849 info->IER &= ~MOXA_MUST_RECV_ISR;
1850 outb(info->IER, info->ioaddr + UART_IER);
1851 } else {
1852 info->x_char = STOP_CHAR(tty);
1853 outb(0, info->ioaddr + UART_IER);
1854 info->IER |= UART_IER_THRI;
1855 outb(info->IER, info->ioaddr + UART_IER);
1856 }
1857 }
1858
1859 if (tty->termios->c_cflag & CRTSCTS) {
1860 info->MCR &= ~UART_MCR_RTS;
1861 outb(info->MCR, info->ioaddr + UART_MCR);
1862 }
1863 }
1864
1865 /*
1866 * This routine is called by the upper-layer tty layer to signal that
1867 * incoming characters should be throttled.
1868 */
1869 static void mxser_throttle(struct tty_struct *tty)
1870 {
1871 mxser_stoprx(tty);
1872 }
1873
1874 static void mxser_unthrottle(struct tty_struct *tty)
1875 {
1876 struct mxser_port *info = tty->driver_data;
1877
1878 /* startrx */
1879 info->ldisc_stop_rx = 0;
1880 if (I_IXOFF(tty)) {
1881 if (info->x_char)
1882 info->x_char = 0;
1883 else {
1884 if (info->board->chip_flag) {
1885 info->IER |= MOXA_MUST_RECV_ISR;
1886 outb(info->IER, info->ioaddr + UART_IER);
1887 } else {
1888 info->x_char = START_CHAR(tty);
1889 outb(0, info->ioaddr + UART_IER);
1890 info->IER |= UART_IER_THRI;
1891 outb(info->IER, info->ioaddr + UART_IER);
1892 }
1893 }
1894 }
1895
1896 if (tty->termios->c_cflag & CRTSCTS) {
1897 info->MCR |= UART_MCR_RTS;
1898 outb(info->MCR, info->ioaddr + UART_MCR);
1899 }
1900 }
1901
1902 /*
1903 * mxser_stop() and mxser_start()
1904 *
1905 * This routines are called before setting or resetting tty->stopped.
1906 * They enable or disable transmitter interrupts, as necessary.
1907 */
1908 static void mxser_stop(struct tty_struct *tty)
1909 {
1910 struct mxser_port *info = tty->driver_data;
1911 unsigned long flags;
1912
1913 spin_lock_irqsave(&info->slock, flags);
1914 if (info->IER & UART_IER_THRI) {
1915 info->IER &= ~UART_IER_THRI;
1916 outb(info->IER, info->ioaddr + UART_IER);
1917 }
1918 spin_unlock_irqrestore(&info->slock, flags);
1919 }
1920
1921 static void mxser_start(struct tty_struct *tty)
1922 {
1923 struct mxser_port *info = tty->driver_data;
1924 unsigned long flags;
1925
1926 spin_lock_irqsave(&info->slock, flags);
1927 if (info->xmit_cnt && info->port.xmit_buf) {
1928 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1929 info->IER |= UART_IER_THRI;
1930 outb(info->IER, info->ioaddr + UART_IER);
1931 }
1932 spin_unlock_irqrestore(&info->slock, flags);
1933 }
1934
1935 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1936 {
1937 struct mxser_port *info = tty->driver_data;
1938 unsigned long flags;
1939
1940 spin_lock_irqsave(&info->slock, flags);
1941 mxser_change_speed(tty, old_termios);
1942 spin_unlock_irqrestore(&info->slock, flags);
1943
1944 if ((old_termios->c_cflag & CRTSCTS) &&
1945 !(tty->termios->c_cflag & CRTSCTS)) {
1946 tty->hw_stopped = 0;
1947 mxser_start(tty);
1948 }
1949
1950 /* Handle sw stopped */
1951 if ((old_termios->c_iflag & IXON) &&
1952 !(tty->termios->c_iflag & IXON)) {
1953 tty->stopped = 0;
1954
1955 if (info->board->chip_flag) {
1956 spin_lock_irqsave(&info->slock, flags);
1957 mxser_disable_must_rx_software_flow_control(
1958 info->ioaddr);
1959 spin_unlock_irqrestore(&info->slock, flags);
1960 }
1961
1962 mxser_start(tty);
1963 }
1964 }
1965
1966 /*
1967 * mxser_wait_until_sent() --- wait until the transmitter is empty
1968 */
1969 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1970 {
1971 struct mxser_port *info = tty->driver_data;
1972 unsigned long orig_jiffies, char_time;
1973 unsigned long flags;
1974 int lsr;
1975
1976 if (info->type == PORT_UNKNOWN)
1977 return;
1978
1979 if (info->xmit_fifo_size == 0)
1980 return; /* Just in case.... */
1981
1982 orig_jiffies = jiffies;
1983 /*
1984 * Set the check interval to be 1/5 of the estimated time to
1985 * send a single character, and make it at least 1. The check
1986 * interval should also be less than the timeout.
1987 *
1988 * Note: we have to use pretty tight timings here to satisfy
1989 * the NIST-PCTS.
1990 */
1991 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1992 char_time = char_time / 5;
1993 if (char_time == 0)
1994 char_time = 1;
1995 if (timeout && timeout < char_time)
1996 char_time = timeout;
1997 /*
1998 * If the transmitter hasn't cleared in twice the approximate
1999 * amount of time to send the entire FIFO, it probably won't
2000 * ever clear. This assumes the UART isn't doing flow
2001 * control, which is currently the case. Hence, if it ever
2002 * takes longer than info->timeout, this is probably due to a
2003 * UART bug of some kind. So, we clamp the timeout parameter at
2004 * 2*info->timeout.
2005 */
2006 if (!timeout || timeout > 2 * info->timeout)
2007 timeout = 2 * info->timeout;
2008
2009 spin_lock_irqsave(&info->slock, flags);
2010 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2011 spin_unlock_irqrestore(&info->slock, flags);
2012 schedule_timeout_interruptible(char_time);
2013 spin_lock_irqsave(&info->slock, flags);
2014 if (signal_pending(current))
2015 break;
2016 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2017 break;
2018 }
2019 spin_unlock_irqrestore(&info->slock, flags);
2020 set_current_state(TASK_RUNNING);
2021 }
2022
2023 /*
2024 * This routine is called by tty_hangup() when a hangup is signaled.
2025 */
2026 static void mxser_hangup(struct tty_struct *tty)
2027 {
2028 struct mxser_port *info = tty->driver_data;
2029
2030 mxser_flush_buffer(tty);
2031 tty_port_hangup(&info->port);
2032 }
2033
2034 /*
2035 * mxser_rs_break() --- routine which turns the break handling on or off
2036 */
2037 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2038 {
2039 struct mxser_port *info = tty->driver_data;
2040 unsigned long flags;
2041
2042 spin_lock_irqsave(&info->slock, flags);
2043 if (break_state == -1)
2044 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2045 info->ioaddr + UART_LCR);
2046 else
2047 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2048 info->ioaddr + UART_LCR);
2049 spin_unlock_irqrestore(&info->slock, flags);
2050 return 0;
2051 }
2052
2053 static void mxser_receive_chars(struct tty_struct *tty,
2054 struct mxser_port *port, int *status)
2055 {
2056 unsigned char ch, gdl;
2057 int ignored = 0;
2058 int cnt = 0;
2059 int recv_room;
2060 int max = 256;
2061
2062 recv_room = tty->receive_room;
2063 if (recv_room == 0 && !port->ldisc_stop_rx)
2064 mxser_stoprx(tty);
2065 if (port->board->chip_flag != MOXA_OTHER_UART) {
2066
2067 if (*status & UART_LSR_SPECIAL)
2068 goto intr_old;
2069 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2070 (*status & MOXA_MUST_LSR_RERR))
2071 goto intr_old;
2072 if (*status & MOXA_MUST_LSR_RERR)
2073 goto intr_old;
2074
2075 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2076
2077 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2078 gdl &= MOXA_MUST_GDL_MASK;
2079 if (gdl >= recv_room) {
2080 if (!port->ldisc_stop_rx)
2081 mxser_stoprx(tty);
2082 }
2083 while (gdl--) {
2084 ch = inb(port->ioaddr + UART_RX);
2085 tty_insert_flip_char(tty, ch, 0);
2086 cnt++;
2087 }
2088 goto end_intr;
2089 }
2090 intr_old:
2091
2092 do {
2093 if (max-- < 0)
2094 break;
2095
2096 ch = inb(port->ioaddr + UART_RX);
2097 if (port->board->chip_flag && (*status & UART_LSR_OE))
2098 outb(0x23, port->ioaddr + UART_FCR);
2099 *status &= port->read_status_mask;
2100 if (*status & port->ignore_status_mask) {
2101 if (++ignored > 100)
2102 break;
2103 } else {
2104 char flag = 0;
2105 if (*status & UART_LSR_SPECIAL) {
2106 if (*status & UART_LSR_BI) {
2107 flag = TTY_BREAK;
2108 port->icount.brk++;
2109
2110 if (port->port.flags & ASYNC_SAK)
2111 do_SAK(tty);
2112 } else if (*status & UART_LSR_PE) {
2113 flag = TTY_PARITY;
2114 port->icount.parity++;
2115 } else if (*status & UART_LSR_FE) {
2116 flag = TTY_FRAME;
2117 port->icount.frame++;
2118 } else if (*status & UART_LSR_OE) {
2119 flag = TTY_OVERRUN;
2120 port->icount.overrun++;
2121 } else
2122 flag = TTY_BREAK;
2123 }
2124 tty_insert_flip_char(tty, ch, flag);
2125 cnt++;
2126 if (cnt >= recv_room) {
2127 if (!port->ldisc_stop_rx)
2128 mxser_stoprx(tty);
2129 break;
2130 }
2131
2132 }
2133
2134 if (port->board->chip_flag)
2135 break;
2136
2137 *status = inb(port->ioaddr + UART_LSR);
2138 } while (*status & UART_LSR_DR);
2139
2140 end_intr:
2141 mxvar_log.rxcnt[tty->index] += cnt;
2142 port->mon_data.rxcnt += cnt;
2143 port->mon_data.up_rxcnt += cnt;
2144
2145 /*
2146 * We are called from an interrupt context with &port->slock
2147 * being held. Drop it temporarily in order to prevent
2148 * recursive locking.
2149 */
2150 spin_unlock(&port->slock);
2151 tty_flip_buffer_push(tty);
2152 spin_lock(&port->slock);
2153 }
2154
2155 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2156 {
2157 int count, cnt;
2158
2159 if (port->x_char) {
2160 outb(port->x_char, port->ioaddr + UART_TX);
2161 port->x_char = 0;
2162 mxvar_log.txcnt[tty->index]++;
2163 port->mon_data.txcnt++;
2164 port->mon_data.up_txcnt++;
2165 port->icount.tx++;
2166 return;
2167 }
2168
2169 if (port->port.xmit_buf == NULL)
2170 return;
2171
2172 if (port->xmit_cnt <= 0 || tty->stopped ||
2173 (tty->hw_stopped &&
2174 (port->type != PORT_16550A) &&
2175 (!port->board->chip_flag))) {
2176 port->IER &= ~UART_IER_THRI;
2177 outb(port->IER, port->ioaddr + UART_IER);
2178 return;
2179 }
2180
2181 cnt = port->xmit_cnt;
2182 count = port->xmit_fifo_size;
2183 do {
2184 outb(port->port.xmit_buf[port->xmit_tail++],
2185 port->ioaddr + UART_TX);
2186 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2187 if (--port->xmit_cnt <= 0)
2188 break;
2189 } while (--count > 0);
2190 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2191
2192 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2193 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2194 port->icount.tx += (cnt - port->xmit_cnt);
2195
2196 if (port->xmit_cnt < WAKEUP_CHARS)
2197 tty_wakeup(tty);
2198
2199 if (port->xmit_cnt <= 0) {
2200 port->IER &= ~UART_IER_THRI;
2201 outb(port->IER, port->ioaddr + UART_IER);
2202 }
2203 }
2204
2205 /*
2206 * This is the serial driver's generic interrupt routine
2207 */
2208 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2209 {
2210 int status, iir, i;
2211 struct mxser_board *brd = NULL;
2212 struct mxser_port *port;
2213 int max, irqbits, bits, msr;
2214 unsigned int int_cnt, pass_counter = 0;
2215 int handled = IRQ_NONE;
2216 struct tty_struct *tty;
2217
2218 for (i = 0; i < MXSER_BOARDS; i++)
2219 if (dev_id == &mxser_boards[i]) {
2220 brd = dev_id;
2221 break;
2222 }
2223
2224 if (i == MXSER_BOARDS)
2225 goto irq_stop;
2226 if (brd == NULL)
2227 goto irq_stop;
2228 max = brd->info->nports;
2229 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2230 irqbits = inb(brd->vector) & brd->vector_mask;
2231 if (irqbits == brd->vector_mask)
2232 break;
2233
2234 handled = IRQ_HANDLED;
2235 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2236 if (irqbits == brd->vector_mask)
2237 break;
2238 if (bits & irqbits)
2239 continue;
2240 port = &brd->ports[i];
2241
2242 int_cnt = 0;
2243 spin_lock(&port->slock);
2244 do {
2245 iir = inb(port->ioaddr + UART_IIR);
2246 if (iir & UART_IIR_NO_INT)
2247 break;
2248 iir &= MOXA_MUST_IIR_MASK;
2249 tty = tty_port_tty_get(&port->port);
2250 if (!tty ||
2251 (port->port.flags & ASYNC_CLOSING) ||
2252 !(port->port.flags &
2253 ASYNC_INITIALIZED)) {
2254 status = inb(port->ioaddr + UART_LSR);
2255 outb(0x27, port->ioaddr + UART_FCR);
2256 inb(port->ioaddr + UART_MSR);
2257 tty_kref_put(tty);
2258 break;
2259 }
2260
2261 status = inb(port->ioaddr + UART_LSR);
2262
2263 if (status & UART_LSR_PE)
2264 port->err_shadow |= NPPI_NOTIFY_PARITY;
2265 if (status & UART_LSR_FE)
2266 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2267 if (status & UART_LSR_OE)
2268 port->err_shadow |=
2269 NPPI_NOTIFY_HW_OVERRUN;
2270 if (status & UART_LSR_BI)
2271 port->err_shadow |= NPPI_NOTIFY_BREAK;
2272
2273 if (port->board->chip_flag) {
2274 if (iir == MOXA_MUST_IIR_GDA ||
2275 iir == MOXA_MUST_IIR_RDA ||
2276 iir == MOXA_MUST_IIR_RTO ||
2277 iir == MOXA_MUST_IIR_LSR)
2278 mxser_receive_chars(tty, port,
2279 &status);
2280
2281 } else {
2282 status &= port->read_status_mask;
2283 if (status & UART_LSR_DR)
2284 mxser_receive_chars(tty, port,
2285 &status);
2286 }
2287 msr = inb(port->ioaddr + UART_MSR);
2288 if (msr & UART_MSR_ANY_DELTA)
2289 mxser_check_modem_status(tty, port, msr);
2290
2291 if (port->board->chip_flag) {
2292 if (iir == 0x02 && (status &
2293 UART_LSR_THRE))
2294 mxser_transmit_chars(tty, port);
2295 } else {
2296 if (status & UART_LSR_THRE)
2297 mxser_transmit_chars(tty, port);
2298 }
2299 tty_kref_put(tty);
2300 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2301 spin_unlock(&port->slock);
2302 }
2303 }
2304
2305 irq_stop:
2306 return handled;
2307 }
2308
2309 static const struct tty_operations mxser_ops = {
2310 .open = mxser_open,
2311 .close = mxser_close,
2312 .write = mxser_write,
2313 .put_char = mxser_put_char,
2314 .flush_chars = mxser_flush_chars,
2315 .write_room = mxser_write_room,
2316 .chars_in_buffer = mxser_chars_in_buffer,
2317 .flush_buffer = mxser_flush_buffer,
2318 .ioctl = mxser_ioctl,
2319 .throttle = mxser_throttle,
2320 .unthrottle = mxser_unthrottle,
2321 .set_termios = mxser_set_termios,
2322 .stop = mxser_stop,
2323 .start = mxser_start,
2324 .hangup = mxser_hangup,
2325 .break_ctl = mxser_rs_break,
2326 .wait_until_sent = mxser_wait_until_sent,
2327 .tiocmget = mxser_tiocmget,
2328 .tiocmset = mxser_tiocmset,
2329 .get_icount = mxser_get_icount,
2330 };
2331
2332 struct tty_port_operations mxser_port_ops = {
2333 .carrier_raised = mxser_carrier_raised,
2334 .dtr_rts = mxser_dtr_rts,
2335 .activate = mxser_activate,
2336 .shutdown = mxser_shutdown_port,
2337 };
2338
2339 /*
2340 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2341 */
2342
2343 static void mxser_release_ISA_res(struct mxser_board *brd)
2344 {
2345 free_irq(brd->irq, brd);
2346 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2347 release_region(brd->vector, 1);
2348 }
2349
2350 static int __devinit mxser_initbrd(struct mxser_board *brd,
2351 struct pci_dev *pdev)
2352 {
2353 struct mxser_port *info;
2354 unsigned int i;
2355 int retval;
2356
2357 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2358 brd->ports[0].max_baud);
2359
2360 for (i = 0; i < brd->info->nports; i++) {
2361 info = &brd->ports[i];
2362 tty_port_init(&info->port);
2363 info->port.ops = &mxser_port_ops;
2364 info->board = brd;
2365 info->stop_rx = 0;
2366 info->ldisc_stop_rx = 0;
2367
2368 /* Enhance mode enabled here */
2369 if (brd->chip_flag != MOXA_OTHER_UART)
2370 mxser_enable_must_enchance_mode(info->ioaddr);
2371
2372 info->port.flags = ASYNC_SHARE_IRQ;
2373 info->type = brd->uart_type;
2374
2375 process_txrx_fifo(info);
2376
2377 info->custom_divisor = info->baud_base * 16;
2378 info->port.close_delay = 5 * HZ / 10;
2379 info->port.closing_wait = 30 * HZ;
2380 info->normal_termios = mxvar_sdriver->init_termios;
2381 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2382 info->err_shadow = 0;
2383 spin_lock_init(&info->slock);
2384
2385 /* before set INT ISR, disable all int */
2386 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2387 info->ioaddr + UART_IER);
2388 }
2389
2390 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2391 brd);
2392 if (retval)
2393 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2394 "conflict with another device.\n",
2395 brd->info->name, brd->irq);
2396
2397 return retval;
2398 }
2399
2400 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2401 {
2402 int id, i, bits;
2403 unsigned short regs[16], irq;
2404 unsigned char scratch, scratch2;
2405
2406 brd->chip_flag = MOXA_OTHER_UART;
2407
2408 id = mxser_read_register(cap, regs);
2409 switch (id) {
2410 case C168_ASIC_ID:
2411 brd->info = &mxser_cards[0];
2412 break;
2413 case C104_ASIC_ID:
2414 brd->info = &mxser_cards[1];
2415 break;
2416 case CI104J_ASIC_ID:
2417 brd->info = &mxser_cards[2];
2418 break;
2419 case C102_ASIC_ID:
2420 brd->info = &mxser_cards[5];
2421 break;
2422 case CI132_ASIC_ID:
2423 brd->info = &mxser_cards[6];
2424 break;
2425 case CI134_ASIC_ID:
2426 brd->info = &mxser_cards[7];
2427 break;
2428 default:
2429 return 0;
2430 }
2431
2432 irq = 0;
2433 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2434 Flag-hack checks if configuration should be read as 2-port here. */
2435 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2436 irq = regs[9] & 0xF000;
2437 irq = irq | (irq >> 4);
2438 if (irq != (regs[9] & 0xFF00))
2439 goto err_irqconflict;
2440 } else if (brd->info->nports == 4) {
2441 irq = regs[9] & 0xF000;
2442 irq = irq | (irq >> 4);
2443 irq = irq | (irq >> 8);
2444 if (irq != regs[9])
2445 goto err_irqconflict;
2446 } else if (brd->info->nports == 8) {
2447 irq = regs[9] & 0xF000;
2448 irq = irq | (irq >> 4);
2449 irq = irq | (irq >> 8);
2450 if ((irq != regs[9]) || (irq != regs[10]))
2451 goto err_irqconflict;
2452 }
2453
2454 if (!irq) {
2455 printk(KERN_ERR "mxser: interrupt number unset\n");
2456 return -EIO;
2457 }
2458 brd->irq = ((int)(irq & 0xF000) >> 12);
2459 for (i = 0; i < 8; i++)
2460 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2461 if ((regs[12] & 0x80) == 0) {
2462 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2463 return -EIO;
2464 }
2465 brd->vector = (int)regs[11]; /* interrupt vector */
2466 if (id == 1)
2467 brd->vector_mask = 0x00FF;
2468 else
2469 brd->vector_mask = 0x000F;
2470 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2471 if (regs[12] & bits) {
2472 brd->ports[i].baud_base = 921600;
2473 brd->ports[i].max_baud = 921600;
2474 } else {
2475 brd->ports[i].baud_base = 115200;
2476 brd->ports[i].max_baud = 115200;
2477 }
2478 }
2479 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2480 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2481 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2482 outb(scratch2, cap + UART_LCR);
2483 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2484 scratch = inb(cap + UART_IIR);
2485
2486 if (scratch & 0xC0)
2487 brd->uart_type = PORT_16550A;
2488 else
2489 brd->uart_type = PORT_16450;
2490 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2491 "mxser(IO)")) {
2492 printk(KERN_ERR "mxser: can't request ports I/O region: "
2493 "0x%.8lx-0x%.8lx\n",
2494 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2495 8 * brd->info->nports - 1);
2496 return -EIO;
2497 }
2498 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2499 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2500 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2501 "0x%.8lx-0x%.8lx\n",
2502 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2503 8 * brd->info->nports - 1);
2504 return -EIO;
2505 }
2506 return brd->info->nports;
2507
2508 err_irqconflict:
2509 printk(KERN_ERR "mxser: invalid interrupt number\n");
2510 return -EIO;
2511 }
2512
2513 static int __devinit mxser_probe(struct pci_dev *pdev,
2514 const struct pci_device_id *ent)
2515 {
2516 #ifdef CONFIG_PCI
2517 struct mxser_board *brd;
2518 unsigned int i, j;
2519 unsigned long ioaddress;
2520 int retval = -EINVAL;
2521
2522 for (i = 0; i < MXSER_BOARDS; i++)
2523 if (mxser_boards[i].info == NULL)
2524 break;
2525
2526 if (i >= MXSER_BOARDS) {
2527 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2528 "not configured\n", MXSER_BOARDS);
2529 goto err;
2530 }
2531
2532 brd = &mxser_boards[i];
2533 brd->idx = i * MXSER_PORTS_PER_BOARD;
2534 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2535 mxser_cards[ent->driver_data].name,
2536 pdev->bus->number, PCI_SLOT(pdev->devfn));
2537
2538 retval = pci_enable_device(pdev);
2539 if (retval) {
2540 dev_err(&pdev->dev, "PCI enable failed\n");
2541 goto err;
2542 }
2543
2544 /* io address */
2545 ioaddress = pci_resource_start(pdev, 2);
2546 retval = pci_request_region(pdev, 2, "mxser(IO)");
2547 if (retval)
2548 goto err_dis;
2549
2550 brd->info = &mxser_cards[ent->driver_data];
2551 for (i = 0; i < brd->info->nports; i++)
2552 brd->ports[i].ioaddr = ioaddress + 8 * i;
2553
2554 /* vector */
2555 ioaddress = pci_resource_start(pdev, 3);
2556 retval = pci_request_region(pdev, 3, "mxser(vector)");
2557 if (retval)
2558 goto err_zero;
2559 brd->vector = ioaddress;
2560
2561 /* irq */
2562 brd->irq = pdev->irq;
2563
2564 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2565 brd->uart_type = PORT_16550A;
2566 brd->vector_mask = 0;
2567
2568 for (i = 0; i < brd->info->nports; i++) {
2569 for (j = 0; j < UART_INFO_NUM; j++) {
2570 if (Gpci_uart_info[j].type == brd->chip_flag) {
2571 brd->ports[i].max_baud =
2572 Gpci_uart_info[j].max_baud;
2573
2574 /* exception....CP-102 */
2575 if (brd->info->flags & MXSER_HIGHBAUD)
2576 brd->ports[i].max_baud = 921600;
2577 break;
2578 }
2579 }
2580 }
2581
2582 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2583 for (i = 0; i < brd->info->nports; i++) {
2584 if (i < 4)
2585 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2586 else
2587 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2588 }
2589 outb(0, ioaddress + 4); /* default set to RS232 mode */
2590 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2591 }
2592
2593 for (i = 0; i < brd->info->nports; i++) {
2594 brd->vector_mask |= (1 << i);
2595 brd->ports[i].baud_base = 921600;
2596 }
2597
2598 /* mxser_initbrd will hook ISR. */
2599 retval = mxser_initbrd(brd, pdev);
2600 if (retval)
2601 goto err_rel3;
2602
2603 for (i = 0; i < brd->info->nports; i++)
2604 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2605
2606 pci_set_drvdata(pdev, brd);
2607
2608 return 0;
2609 err_rel3:
2610 pci_release_region(pdev, 3);
2611 err_zero:
2612 brd->info = NULL;
2613 pci_release_region(pdev, 2);
2614 err_dis:
2615 pci_disable_device(pdev);
2616 err:
2617 return retval;
2618 #else
2619 return -ENODEV;
2620 #endif
2621 }
2622
2623 static void __devexit mxser_remove(struct pci_dev *pdev)
2624 {
2625 #ifdef CONFIG_PCI
2626 struct mxser_board *brd = pci_get_drvdata(pdev);
2627 unsigned int i;
2628
2629 for (i = 0; i < brd->info->nports; i++)
2630 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2631
2632 free_irq(pdev->irq, brd);
2633 pci_release_region(pdev, 2);
2634 pci_release_region(pdev, 3);
2635 pci_disable_device(pdev);
2636 brd->info = NULL;
2637 #endif
2638 }
2639
2640 static struct pci_driver mxser_driver = {
2641 .name = "mxser",
2642 .id_table = mxser_pcibrds,
2643 .probe = mxser_probe,
2644 .remove = __devexit_p(mxser_remove)
2645 };
2646
2647 static int __init mxser_module_init(void)
2648 {
2649 struct mxser_board *brd;
2650 unsigned int b, i, m;
2651 int retval;
2652
2653 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2654 if (!mxvar_sdriver)
2655 return -ENOMEM;
2656
2657 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2658 MXSER_VERSION);
2659
2660 /* Initialize the tty_driver structure */
2661 mxvar_sdriver->owner = THIS_MODULE;
2662 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2663 mxvar_sdriver->name = "ttyMI";
2664 mxvar_sdriver->major = ttymajor;
2665 mxvar_sdriver->minor_start = 0;
2666 mxvar_sdriver->num = MXSER_PORTS + 1;
2667 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2668 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2669 mxvar_sdriver->init_termios = tty_std_termios;
2670 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2671 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2672 tty_set_operations(mxvar_sdriver, &mxser_ops);
2673
2674 retval = tty_register_driver(mxvar_sdriver);
2675 if (retval) {
2676 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2677 "tty driver !\n");
2678 goto err_put;
2679 }
2680
2681 /* Start finding ISA boards here */
2682 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2683 if (!ioaddr[b])
2684 continue;
2685
2686 brd = &mxser_boards[m];
2687 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2688 if (retval <= 0) {
2689 brd->info = NULL;
2690 continue;
2691 }
2692
2693 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2694 brd->info->name, ioaddr[b]);
2695
2696 /* mxser_initbrd will hook ISR. */
2697 if (mxser_initbrd(brd, NULL) < 0) {
2698 brd->info = NULL;
2699 continue;
2700 }
2701
2702 brd->idx = m * MXSER_PORTS_PER_BOARD;
2703 for (i = 0; i < brd->info->nports; i++)
2704 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2705
2706 m++;
2707 }
2708
2709 retval = pci_register_driver(&mxser_driver);
2710 if (retval) {
2711 printk(KERN_ERR "mxser: can't register pci driver\n");
2712 if (!m) {
2713 retval = -ENODEV;
2714 goto err_unr;
2715 } /* else: we have some ISA cards under control */
2716 }
2717
2718 return 0;
2719 err_unr:
2720 tty_unregister_driver(mxvar_sdriver);
2721 err_put:
2722 put_tty_driver(mxvar_sdriver);
2723 return retval;
2724 }
2725
2726 static void __exit mxser_module_exit(void)
2727 {
2728 unsigned int i, j;
2729
2730 pci_unregister_driver(&mxser_driver);
2731
2732 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2733 if (mxser_boards[i].info != NULL)
2734 for (j = 0; j < mxser_boards[i].info->nports; j++)
2735 tty_unregister_device(mxvar_sdriver,
2736 mxser_boards[i].idx + j);
2737 tty_unregister_driver(mxvar_sdriver);
2738 put_tty_driver(mxvar_sdriver);
2739
2740 for (i = 0; i < MXSER_BOARDS; i++)
2741 if (mxser_boards[i].info != NULL)
2742 mxser_release_ISA_res(&mxser_boards[i]);
2743 }
2744
2745 module_init(mxser_module_init);
2746 module_exit(mxser_module_exit);