?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
usb: gadget: m66592-udc: add pullup function
[zen-stable.git] / drivers / video / omap2 / dss / rfbi.c
blobc06fbe0bc6789bee3c32a796b1b9efdb4efc763d
1 /*
2 * linux/drivers/video/omap2/dss/rfbi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #define DSS_SUBSYS_NAME "RFBI"
24
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/vmalloc.h>
28 #include <linux/clk.h>
29 #include <linux/io.h>
30 #include <linux/delay.h>
31 #include <linux/kfifo.h>
32 #include <linux/ktime.h>
33 #include <linux/hrtimer.h>
34 #include <linux/seq_file.h>
35 #include <linux/semaphore.h>
36
37 #include <video/omapdss.h>
38 #include "dss.h"
39
40 struct rfbi_reg { u16 idx; };
41
42 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
43
44 #define RFBI_REVISION RFBI_REG(0x0000)
45 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
46 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
47 #define RFBI_CONTROL RFBI_REG(0x0040)
48 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
49 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
50 #define RFBI_CMD RFBI_REG(0x004c)
51 #define RFBI_PARAM RFBI_REG(0x0050)
52 #define RFBI_DATA RFBI_REG(0x0054)
53 #define RFBI_READ RFBI_REG(0x0058)
54 #define RFBI_STATUS RFBI_REG(0x005c)
55
56 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
57 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
58 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
59 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
60 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
61 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
62
63 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
64 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
65
66 #define REG_FLD_MOD(idx, val, start, end) \
67 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
68
69 enum omap_rfbi_cycleformat {
70 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
71 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
72 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
73 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
74 };
75
76 enum omap_rfbi_datatype {
77 OMAP_DSS_RFBI_DATATYPE_12 = 0,
78 OMAP_DSS_RFBI_DATATYPE_16 = 1,
79 OMAP_DSS_RFBI_DATATYPE_18 = 2,
80 OMAP_DSS_RFBI_DATATYPE_24 = 3,
81 };
82
83 enum omap_rfbi_parallelmode {
84 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
85 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
86 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
87 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
88 };
89
90 static int rfbi_convert_timings(struct rfbi_timings *t);
91 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
92
93 static struct {
94 struct platform_device *pdev;
95 void __iomem *base;
96
97 unsigned long l4_khz;
98
99 enum omap_rfbi_datatype datatype;
100 enum omap_rfbi_parallelmode parallelmode;
101
102 enum omap_rfbi_te_mode te_mode;
103 int te_enabled;
104
105 void (*framedone_callback)(void *data);
106 void *framedone_callback_data;
107
108 struct omap_dss_device *dssdev[2];
109
110 struct semaphore bus_lock;
111 } rfbi;
112
113 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
114 {
115 __raw_writel(val, rfbi.base + idx.idx);
116 }
117
118 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
119 {
120 return __raw_readl(rfbi.base + idx.idx);
121 }
122
123 static void rfbi_enable_clocks(bool enable)
124 {
125 if (enable)
126 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
127 else
128 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
129 }
130
131 void rfbi_bus_lock(void)
132 {
133 down(&rfbi.bus_lock);
134 }
135 EXPORT_SYMBOL(rfbi_bus_lock);
136
137 void rfbi_bus_unlock(void)
138 {
139 up(&rfbi.bus_lock);
140 }
141 EXPORT_SYMBOL(rfbi_bus_unlock);
142
143 void omap_rfbi_write_command(const void *buf, u32 len)
144 {
145 switch (rfbi.parallelmode) {
146 case OMAP_DSS_RFBI_PARALLELMODE_8:
147 {
148 const u8 *b = buf;
149 for (; len; len--)
150 rfbi_write_reg(RFBI_CMD, *b++);
151 break;
152 }
153
154 case OMAP_DSS_RFBI_PARALLELMODE_16:
155 {
156 const u16 *w = buf;
157 BUG_ON(len & 1);
158 for (; len; len -= 2)
159 rfbi_write_reg(RFBI_CMD, *w++);
160 break;
161 }
162
163 case OMAP_DSS_RFBI_PARALLELMODE_9:
164 case OMAP_DSS_RFBI_PARALLELMODE_12:
165 default:
166 BUG();
167 }
168 }
169 EXPORT_SYMBOL(omap_rfbi_write_command);
170
171 void omap_rfbi_read_data(void *buf, u32 len)
172 {
173 switch (rfbi.parallelmode) {
174 case OMAP_DSS_RFBI_PARALLELMODE_8:
175 {
176 u8 *b = buf;
177 for (; len; len--) {
178 rfbi_write_reg(RFBI_READ, 0);
179 *b++ = rfbi_read_reg(RFBI_READ);
180 }
181 break;
182 }
183
184 case OMAP_DSS_RFBI_PARALLELMODE_16:
185 {
186 u16 *w = buf;
187 BUG_ON(len & ~1);
188 for (; len; len -= 2) {
189 rfbi_write_reg(RFBI_READ, 0);
190 *w++ = rfbi_read_reg(RFBI_READ);
191 }
192 break;
193 }
194
195 case OMAP_DSS_RFBI_PARALLELMODE_9:
196 case OMAP_DSS_RFBI_PARALLELMODE_12:
197 default:
198 BUG();
199 }
200 }
201 EXPORT_SYMBOL(omap_rfbi_read_data);
202
203 void omap_rfbi_write_data(const void *buf, u32 len)
204 {
205 switch (rfbi.parallelmode) {
206 case OMAP_DSS_RFBI_PARALLELMODE_8:
207 {
208 const u8 *b = buf;
209 for (; len; len--)
210 rfbi_write_reg(RFBI_PARAM, *b++);
211 break;
212 }
213
214 case OMAP_DSS_RFBI_PARALLELMODE_16:
215 {
216 const u16 *w = buf;
217 BUG_ON(len & 1);
218 for (; len; len -= 2)
219 rfbi_write_reg(RFBI_PARAM, *w++);
220 break;
221 }
222
223 case OMAP_DSS_RFBI_PARALLELMODE_9:
224 case OMAP_DSS_RFBI_PARALLELMODE_12:
225 default:
226 BUG();
227
228 }
229 }
230 EXPORT_SYMBOL(omap_rfbi_write_data);
231
232 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
233 u16 x, u16 y,
234 u16 w, u16 h)
235 {
236 int start_offset = scr_width * y + x;
237 int horiz_offset = scr_width - w;
238 int i;
239
240 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
241 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
242 const u16 __iomem *pd = buf;
243 pd += start_offset;
244
245 for (; h; --h) {
246 for (i = 0; i < w; ++i) {
247 const u8 __iomem *b = (const u8 __iomem *)pd;
248 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
249 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
250 ++pd;
251 }
252 pd += horiz_offset;
253 }
254 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
255 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
256 const u32 __iomem *pd = buf;
257 pd += start_offset;
258
259 for (; h; --h) {
260 for (i = 0; i < w; ++i) {
261 const u8 __iomem *b = (const u8 __iomem *)pd;
262 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
263 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
264 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
265 ++pd;
266 }
267 pd += horiz_offset;
268 }
269 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
270 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
271 const u16 __iomem *pd = buf;
272 pd += start_offset;
273
274 for (; h; --h) {
275 for (i = 0; i < w; ++i) {
276 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
277 ++pd;
278 }
279 pd += horiz_offset;
280 }
281 } else {
282 BUG();
283 }
284 }
285 EXPORT_SYMBOL(omap_rfbi_write_pixels);
286
287 static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
288 u16 height, void (*callback)(void *data), void *data)
289 {
290 u32 l;
291
292 /*BUG_ON(callback == 0);*/
293 BUG_ON(rfbi.framedone_callback != NULL);
294
295 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
296
297 dispc_set_lcd_size(dssdev->manager->id, width, height);
298
299 dispc_enable_channel(dssdev->manager->id, true);
300
301 rfbi.framedone_callback = callback;
302 rfbi.framedone_callback_data = data;
303
304 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
305
306 l = rfbi_read_reg(RFBI_CONTROL);
307 l = FLD_MOD(l, 1, 0, 0); /* enable */
308 if (!rfbi.te_enabled)
309 l = FLD_MOD(l, 1, 4, 4); /* ITE */
310
311 rfbi_write_reg(RFBI_CONTROL, l);
312 }
313
314 static void framedone_callback(void *data, u32 mask)
315 {
316 void (*callback)(void *data);
317
318 DSSDBG("FRAMEDONE\n");
319
320 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
321
322 callback = rfbi.framedone_callback;
323 rfbi.framedone_callback = NULL;
324
325 if (callback != NULL)
326 callback(rfbi.framedone_callback_data);
327 }
328
329 #if 1 /* VERBOSE */
330 static void rfbi_print_timings(void)
331 {
332 u32 l;
333 u32 time;
334
335 l = rfbi_read_reg(RFBI_CONFIG(0));
336 time = 1000000000 / rfbi.l4_khz;
337 if (l & (1 << 4))
338 time *= 2;
339
340 DSSDBG("Tick time %u ps\n", time);
341 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
342 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
343 "REONTIME %d, REOFFTIME %d\n",
344 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
345 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
346
347 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
348 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
349 "ACCESSTIME %d\n",
350 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
351 (l >> 22) & 0x3f);
352 }
353 #else
354 static void rfbi_print_timings(void) {}
355 #endif
356
357
358
359
360 static u32 extif_clk_period;
361
362 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
363 {
364 int bus_tick = extif_clk_period * div;
365 return (ps + bus_tick - 1) / bus_tick * bus_tick;
366 }
367
368 static int calc_reg_timing(struct rfbi_timings *t, int div)
369 {
370 t->clk_div = div;
371
372 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
373
374 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
375 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
376 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
377
378 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
379 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
380 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
381
382 t->access_time = round_to_extif_ticks(t->access_time, div);
383 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
384 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
385
386 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
387 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
388 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
389 t->we_on_time, t->we_off_time, t->re_cycle_time,
390 t->we_cycle_time);
391 DSSDBG("[reg]rdaccess %d cspulse %d\n",
392 t->access_time, t->cs_pulse_width);
393
394 return rfbi_convert_timings(t);
395 }
396
397 static int calc_extif_timings(struct rfbi_timings *t)
398 {
399 u32 max_clk_div;
400 int div;
401
402 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
403 for (div = 1; div <= max_clk_div; div++) {
404 if (calc_reg_timing(t, div) == 0)
405 break;
406 }
407
408 if (div <= max_clk_div)
409 return 0;
410
411 DSSERR("can't setup timings\n");
412 return -1;
413 }
414
415
416 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
417 {
418 int r;
419
420 if (!t->converted) {
421 r = calc_extif_timings(t);
422 if (r < 0)
423 DSSERR("Failed to calc timings\n");
424 }
425
426 BUG_ON(!t->converted);
427
428 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
429 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
430
431 /* TIMEGRANULARITY */
432 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
433 (t->tim[2] ? 1 : 0), 4, 4);
434
435 rfbi_print_timings();
436 }
437
438 static int ps_to_rfbi_ticks(int time, int div)
439 {
440 unsigned long tick_ps;
441 int ret;
442
443 /* Calculate in picosecs to yield more exact results */
444 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
445
446 ret = (time + tick_ps - 1) / tick_ps;
447
448 return ret;
449 }
450
451 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
452 {
453 *clk_period = 1000000000 / rfbi.l4_khz;
454 *max_clk_div = 2;
455 }
456
457 static int rfbi_convert_timings(struct rfbi_timings *t)
458 {
459 u32 l;
460 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
461 int actim, recyc, wecyc;
462 int div = t->clk_div;
463
464 if (div <= 0 || div > 2)
465 return -1;
466
467 /* Make sure that after conversion it still holds that:
468 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
469 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
470 */
471 weon = ps_to_rfbi_ticks(t->we_on_time, div);
472 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
473 if (weoff <= weon)
474 weoff = weon + 1;
475 if (weon > 0x0f)
476 return -1;
477 if (weoff > 0x3f)
478 return -1;
479
480 reon = ps_to_rfbi_ticks(t->re_on_time, div);
481 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
482 if (reoff <= reon)
483 reoff = reon + 1;
484 if (reon > 0x0f)
485 return -1;
486 if (reoff > 0x3f)
487 return -1;
488
489 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
490 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
491 if (csoff <= cson)
492 csoff = cson + 1;
493 if (csoff < max(weoff, reoff))
494 csoff = max(weoff, reoff);
495 if (cson > 0x0f)
496 return -1;
497 if (csoff > 0x3f)
498 return -1;
499
500 l = cson;
501 l |= csoff << 4;
502 l |= weon << 10;
503 l |= weoff << 14;
504 l |= reon << 20;
505 l |= reoff << 24;
506
507 t->tim[0] = l;
508
509 actim = ps_to_rfbi_ticks(t->access_time, div);
510 if (actim <= reon)
511 actim = reon + 1;
512 if (actim > 0x3f)
513 return -1;
514
515 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
516 if (wecyc < weoff)
517 wecyc = weoff;
518 if (wecyc > 0x3f)
519 return -1;
520
521 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
522 if (recyc < reoff)
523 recyc = reoff;
524 if (recyc > 0x3f)
525 return -1;
526
527 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
528 if (cs_pulse > 0x3f)
529 return -1;
530
531 l = wecyc;
532 l |= recyc << 6;
533 l |= cs_pulse << 12;
534 l |= actim << 22;
535
536 t->tim[1] = l;
537
538 t->tim[2] = div - 1;
539
540 t->converted = 1;
541
542 return 0;
543 }
544
545 /* xxx FIX module selection missing */
546 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
547 unsigned hs_pulse_time, unsigned vs_pulse_time,
548 int hs_pol_inv, int vs_pol_inv, int extif_div)
549 {
550 int hs, vs;
551 int min;
552 u32 l;
553
554 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
555 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
556 if (hs < 2)
557 return -EDOM;
558 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
559 min = 2;
560 else /* OMAP_DSS_RFBI_TE_MODE_1 */
561 min = 4;
562 if (vs < min)
563 return -EDOM;
564 if (vs == hs)
565 return -EINVAL;
566 rfbi.te_mode = mode;
567 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
568 mode, hs, vs, hs_pol_inv, vs_pol_inv);
569
570 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
571 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
572
573 l = rfbi_read_reg(RFBI_CONFIG(0));
574 if (hs_pol_inv)
575 l &= ~(1 << 21);
576 else
577 l |= 1 << 21;
578 if (vs_pol_inv)
579 l &= ~(1 << 20);
580 else
581 l |= 1 << 20;
582
583 return 0;
584 }
585 EXPORT_SYMBOL(omap_rfbi_setup_te);
586
587 /* xxx FIX module selection missing */
588 int omap_rfbi_enable_te(bool enable, unsigned line)
589 {
590 u32 l;
591
592 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
593 if (line > (1 << 11) - 1)
594 return -EINVAL;
595
596 l = rfbi_read_reg(RFBI_CONFIG(0));
597 l &= ~(0x3 << 2);
598 if (enable) {
599 rfbi.te_enabled = 1;
600 l |= rfbi.te_mode << 2;
601 } else
602 rfbi.te_enabled = 0;
603 rfbi_write_reg(RFBI_CONFIG(0), l);
604 rfbi_write_reg(RFBI_LINE_NUMBER, line);
605
606 return 0;
607 }
608 EXPORT_SYMBOL(omap_rfbi_enable_te);
609
610 static int rfbi_configure(int rfbi_module, int bpp, int lines)
611 {
612 u32 l;
613 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
614 enum omap_rfbi_cycleformat cycleformat;
615 enum omap_rfbi_datatype datatype;
616 enum omap_rfbi_parallelmode parallelmode;
617
618 switch (bpp) {
619 case 12:
620 datatype = OMAP_DSS_RFBI_DATATYPE_12;
621 break;
622 case 16:
623 datatype = OMAP_DSS_RFBI_DATATYPE_16;
624 break;
625 case 18:
626 datatype = OMAP_DSS_RFBI_DATATYPE_18;
627 break;
628 case 24:
629 datatype = OMAP_DSS_RFBI_DATATYPE_24;
630 break;
631 default:
632 BUG();
633 return 1;
634 }
635 rfbi.datatype = datatype;
636
637 switch (lines) {
638 case 8:
639 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
640 break;
641 case 9:
642 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
643 break;
644 case 12:
645 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
646 break;
647 case 16:
648 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
649 break;
650 default:
651 BUG();
652 return 1;
653 }
654 rfbi.parallelmode = parallelmode;
655
656 if ((bpp % lines) == 0) {
657 switch (bpp / lines) {
658 case 1:
659 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
660 break;
661 case 2:
662 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
663 break;
664 case 3:
665 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
666 break;
667 default:
668 BUG();
669 return 1;
670 }
671 } else if ((2 * bpp % lines) == 0) {
672 if ((2 * bpp / lines) == 3)
673 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
674 else {
675 BUG();
676 return 1;
677 }
678 } else {
679 BUG();
680 return 1;
681 }
682
683 switch (cycleformat) {
684 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
685 cycle1 = lines;
686 break;
687
688 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
689 cycle1 = lines;
690 cycle2 = lines;
691 break;
692
693 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
694 cycle1 = lines;
695 cycle2 = lines;
696 cycle3 = lines;
697 break;
698
699 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
700 cycle1 = lines;
701 cycle2 = (lines / 2) | ((lines / 2) << 16);
702 cycle3 = (lines << 16);
703 break;
704 }
705
706 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
707
708 l = 0;
709 l |= FLD_VAL(parallelmode, 1, 0);
710 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
711 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
712 l |= FLD_VAL(datatype, 6, 5);
713 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
714 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
715 l |= FLD_VAL(cycleformat, 10, 9);
716 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
717 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
718 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
719 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
720 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
721 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
722 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
723 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
724
725 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
726 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
727 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
728
729
730 l = rfbi_read_reg(RFBI_CONTROL);
731 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
732 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
733 rfbi_write_reg(RFBI_CONTROL, l);
734
735
736 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
737 bpp, lines, cycle1, cycle2, cycle3);
738
739 return 0;
740 }
741
742 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
743 int data_lines)
744 {
745 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
746 }
747 EXPORT_SYMBOL(omap_rfbi_configure);
748
749 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
750 u16 *x, u16 *y, u16 *w, u16 *h)
751 {
752 u16 dw, dh;
753
754 dssdev->driver->get_resolution(dssdev, &dw, &dh);
755
756 if (*x > dw || *y > dh)
757 return -EINVAL;
758
759 if (*x + *w > dw)
760 return -EINVAL;
761
762 if (*y + *h > dh)
763 return -EINVAL;
764
765 if (*w == 1)
766 return -EINVAL;
767
768 if (*w == 0 || *h == 0)
769 return -EINVAL;
770
771 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
772 dss_setup_partial_planes(dssdev, x, y, w, h, true);
773 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
774 }
775
776 return 0;
777 }
778 EXPORT_SYMBOL(omap_rfbi_prepare_update);
779
780 int omap_rfbi_update(struct omap_dss_device *dssdev,
781 u16 x, u16 y, u16 w, u16 h,
782 void (*callback)(void *), void *data)
783 {
784 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
785 rfbi_transfer_area(dssdev, w, h, callback, data);
786 } else {
787 struct omap_overlay *ovl;
788 void __iomem *addr;
789 int scr_width;
790
791 ovl = dssdev->manager->overlays[0];
792 scr_width = ovl->info.screen_width;
793 addr = ovl->info.vaddr;
794
795 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
796
797 callback(data);
798 }
799
800 return 0;
801 }
802 EXPORT_SYMBOL(omap_rfbi_update);
803
804 void rfbi_dump_regs(struct seq_file *s)
805 {
806 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
807
808 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
809
810 DUMPREG(RFBI_REVISION);
811 DUMPREG(RFBI_SYSCONFIG);
812 DUMPREG(RFBI_SYSSTATUS);
813 DUMPREG(RFBI_CONTROL);
814 DUMPREG(RFBI_PIXEL_CNT);
815 DUMPREG(RFBI_LINE_NUMBER);
816 DUMPREG(RFBI_CMD);
817 DUMPREG(RFBI_PARAM);
818 DUMPREG(RFBI_DATA);
819 DUMPREG(RFBI_READ);
820 DUMPREG(RFBI_STATUS);
821
822 DUMPREG(RFBI_CONFIG(0));
823 DUMPREG(RFBI_ONOFF_TIME(0));
824 DUMPREG(RFBI_CYCLE_TIME(0));
825 DUMPREG(RFBI_DATA_CYCLE1(0));
826 DUMPREG(RFBI_DATA_CYCLE2(0));
827 DUMPREG(RFBI_DATA_CYCLE3(0));
828
829 DUMPREG(RFBI_CONFIG(1));
830 DUMPREG(RFBI_ONOFF_TIME(1));
831 DUMPREG(RFBI_CYCLE_TIME(1));
832 DUMPREG(RFBI_DATA_CYCLE1(1));
833 DUMPREG(RFBI_DATA_CYCLE2(1));
834 DUMPREG(RFBI_DATA_CYCLE3(1));
835
836 DUMPREG(RFBI_VSYNC_WIDTH);
837 DUMPREG(RFBI_HSYNC_WIDTH);
838
839 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
840 #undef DUMPREG
841 }
842
843 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
844 {
845 int r;
846
847 rfbi_enable_clocks(1);
848
849 r = omap_dss_start_device(dssdev);
850 if (r) {
851 DSSERR("failed to start device\n");
852 goto err0;
853 }
854
855 r = omap_dispc_register_isr(framedone_callback, NULL,
856 DISPC_IRQ_FRAMEDONE);
857 if (r) {
858 DSSERR("can't get FRAMEDONE irq\n");
859 goto err1;
860 }
861
862 dispc_set_lcd_display_type(dssdev->manager->id,
863 OMAP_DSS_LCD_DISPLAY_TFT);
864
865 dispc_set_parallel_interface_mode(dssdev->manager->id,
866 OMAP_DSS_PARALLELMODE_RFBI);
867
868 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
869
870 rfbi_configure(dssdev->phy.rfbi.channel,
871 dssdev->ctrl.pixel_size,
872 dssdev->phy.rfbi.data_lines);
873
874 rfbi_set_timings(dssdev->phy.rfbi.channel,
875 &dssdev->ctrl.rfbi_timings);
876
877
878 return 0;
879 err1:
880 omap_dss_stop_device(dssdev);
881 err0:
882 return r;
883 }
884 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
885
886 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
887 {
888 omap_dispc_unregister_isr(framedone_callback, NULL,
889 DISPC_IRQ_FRAMEDONE);
890 omap_dss_stop_device(dssdev);
891
892 rfbi_enable_clocks(0);
893 }
894 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
895
896 int rfbi_init_display(struct omap_dss_device *dssdev)
897 {
898 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
899 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
900 return 0;
901 }
902
903 /* RFBI HW IP initialisation */
904 static int omap_rfbihw_probe(struct platform_device *pdev)
905 {
906 u32 rev;
907 u32 l;
908 struct resource *rfbi_mem;
909
910 rfbi.pdev = pdev;
911
912 sema_init(&rfbi.bus_lock, 1);
913
914 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
915 if (!rfbi_mem) {
916 DSSERR("can't get IORESOURCE_MEM RFBI\n");
917 return -EINVAL;
918 }
919 rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem));
920 if (!rfbi.base) {
921 DSSERR("can't ioremap RFBI\n");
922 return -ENOMEM;
923 }
924
925 rfbi_enable_clocks(1);
926
927 msleep(10);
928
929 rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
930
931 /* Enable autoidle and smart-idle */
932 l = rfbi_read_reg(RFBI_SYSCONFIG);
933 l |= (1 << 0) | (2 << 3);
934 rfbi_write_reg(RFBI_SYSCONFIG, l);
935
936 rev = rfbi_read_reg(RFBI_REVISION);
937 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
938 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
939
940 rfbi_enable_clocks(0);
941
942 return 0;
943 }
944
945 static int omap_rfbihw_remove(struct platform_device *pdev)
946 {
947 iounmap(rfbi.base);
948 return 0;
949 }
950
951 static struct platform_driver omap_rfbihw_driver = {
952 .probe = omap_rfbihw_probe,
953 .remove = omap_rfbihw_remove,
954 .driver = {
955 .name = "omapdss_rfbi",
956 .owner = THIS_MODULE,
957 },
958 };
959
960 int rfbi_init_platform_driver(void)
961 {
962 return platform_driver_register(&omap_rfbihw_driver);
963 }
964
965 void rfbi_uninit_platform_driver(void)
966 {
967 return platform_driver_unregister(&omap_rfbihw_driver);
968 }