drivers/tty/serial/s3c6400.c

   1 /*
   2  * Driver for Samsung S3C6400 and S3C6410 SoC onboard UARTs.
   3  *
   4  * Copyright 2008 Openmoko,  Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12 */
  13
  14 #include <linux/module.h>
  15 #include <linux/ioport.h>
  16 #include <linux/io.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/init.h>
  19 #include <linux/serial_core.h>
  20 #include <linux/serial.h>
  21
  22 #include <asm/irq.h>
  23 #include <mach/hardware.h>
  24
  25 #include <plat/regs-serial.h>
  26
  27 #include "samsung.h"
  28
  29 static int s3c6400_serial_setsource(struct uart_port *port,
  30                                     struct s3c24xx_uart_clksrc *clk)
  31 {
  32         unsigned long ucon = rd_regl(port, S3C2410_UCON);
  33
  34         if (strcmp(clk->name, "uclk0") == 0) {
  35                 ucon &= ~S3C6400_UCON_CLKMASK;
  36                 ucon |= S3C6400_UCON_UCLK0;
  37         } else if (strcmp(clk->name, "uclk1") == 0)
  38                 ucon |= S3C6400_UCON_UCLK1;
  39         else if (strcmp(clk->name, "pclk") == 0) {
  40                 /* See notes about transitioning from UCLK to PCLK */
  41                 ucon &= ~S3C6400_UCON_UCLK0;
  42         } else {
  43                 printk(KERN_ERR "unknown clock source %s\n", clk->name);
  44                 return -EINVAL;
  45         }
  46
  47         wr_regl(port, S3C2410_UCON, ucon);
  48         return 0;
  49 }
  50
  51
  52 static int s3c6400_serial_getsource(struct uart_port *port,
  53                                     struct s3c24xx_uart_clksrc *clk)
  54 {
  55         u32 ucon = rd_regl(port, S3C2410_UCON);
  56
  57         clk->divisor = 1;
  58
  59         switch (ucon & S3C6400_UCON_CLKMASK) {
  60         case S3C6400_UCON_UCLK0:
  61                 clk->name = "uclk0";
  62                 break;
  63
  64         case S3C6400_UCON_UCLK1:
  65                 clk->name = "uclk1";
  66                 break;
  67
  68         case S3C6400_UCON_PCLK:
  69         case S3C6400_UCON_PCLK2:
  70                 clk->name = "pclk";
  71                 break;
  72         }
  73
  74         return 0;
  75 }
  76
  77 static int s3c6400_serial_resetport(struct uart_port *port,
  78                                     struct s3c2410_uartcfg *cfg)
  79 {
  80         unsigned long ucon = rd_regl(port, S3C2410_UCON);
  81
  82         dbg("s3c6400_serial_resetport: port=%p (%08lx), cfg=%p\n",
  83             port, port->mapbase, cfg);
  84
  85         /* ensure we don't change the clock settings... */
  86
  87         ucon &= S3C6400_UCON_CLKMASK;
  88
  89         wr_regl(port, S3C2410_UCON,  ucon | cfg->ucon);
  90         wr_regl(port, S3C2410_ULCON, cfg->ulcon);
  91
  92         /* reset both fifos */
  93
  94         wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
  95         wr_regl(port, S3C2410_UFCON, cfg->ufcon);
  96
  97         return 0;
  98 }
  99
 100 static struct s3c24xx_uart_info s3c6400_uart_inf = {
 101         .name           = "Samsung S3C6400 UART",
 102         .type           = PORT_S3C6400,
 103         .fifosize       = 64,
 104         .has_divslot    = 1,
 105         .rx_fifomask    = S3C2440_UFSTAT_RXMASK,
 106         .rx_fifoshift   = S3C2440_UFSTAT_RXSHIFT,
 107         .rx_fifofull    = S3C2440_UFSTAT_RXFULL,
 108         .tx_fifofull    = S3C2440_UFSTAT_TXFULL,
 109         .tx_fifomask    = S3C2440_UFSTAT_TXMASK,
 110         .tx_fifoshift   = S3C2440_UFSTAT_TXSHIFT,
 111         .get_clksrc     = s3c6400_serial_getsource,
 112         .set_clksrc     = s3c6400_serial_setsource,
 113         .reset_port     = s3c6400_serial_resetport,
 114 };
 115
 116 /* device management */
 117
 118 static int s3c6400_serial_probe(struct platform_device *dev)
 119 {
 120         dbg("s3c6400_serial_probe: dev=%p\n", dev);
 121         return s3c24xx_serial_probe(dev, &s3c6400_uart_inf);
 122 }
 123
 124 static struct platform_driver s3c6400_serial_driver = {
 125         .probe          = s3c6400_serial_probe,
 126         .remove         = __devexit_p(s3c24xx_serial_remove),
 127         .driver         = {
 128                 .name   = "s3c6400-uart",
 129                 .owner  = THIS_MODULE,
 130         },
 131 };
 132
 133 s3c24xx_console_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
 134
 135 static int __init s3c6400_serial_init(void)
 136 {
 137         return s3c24xx_serial_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
 138 }
 139
 140 static void __exit s3c6400_serial_exit(void)
 141 {
 142         platform_driver_unregister(&s3c6400_serial_driver);
 143 }
 144
 145 module_init(s3c6400_serial_init);
 146 module_exit(s3c6400_serial_exit);
 147
 148 MODULE_DESCRIPTION("Samsung S3C6400,S3C6410 SoC Serial port driver");
 149 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
 150 MODULE_LICENSE("GPL v2");
 151 MODULE_ALIAS("platform:s3c6400-uart");