arch/arm/mach-gemini/include/mach/hardware.h

   1 /*
   2  *  This file contains the hardware definitions for Gemini.
   3  *
   4  *  Copyright (C) 2001-2006 Storlink, Corp.
   5  *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12 #ifndef __MACH_HARDWARE_H
  13 #define __MACH_HARDWARE_H
  14
  15 /*
  16  * Memory Map definitions
  17  */
  18 #ifdef CONFIG_GEMINI_MEM_SWAP
  19 # define GEMINI_DRAM_BASE       0x00000000
  20 # define GEMINI_SRAM_BASE       0x70000000
  21 #else
  22 # define GEMINI_SRAM_BASE       0x00000000
  23 # define GEMINI_DRAM_BASE       0x10000000
  24 #endif
  25 #define GEMINI_FLASH_BASE       0x30000000
  26 #define GEMINI_GLOBAL_BASE      0x40000000
  27 #define GEMINI_WAQTCHDOG_BASE   0x41000000
  28 #define GEMINI_UART_BASE        0x42000000
  29 #define GEMINI_TIMER_BASE       0x43000000
  30 #define GEMINI_LCD_BASE         0x44000000
  31 #define GEMINI_RTC_BASE         0x45000000
  32 #define GEMINI_SATA_BASE        0x46000000
  33 #define GEMINI_LPC_HOST_BASE    0x47000000
  34 #define GEMINI_LPC_IO_BASE      0x47800000
  35 #define GEMINI_INTERRUPT_BASE   0x48000000
  36 /* TODO: Different interrupt controllers when SMP
  37  * #define GEMINI_INTERRUPT0_BASE       0x48000000
  38  * #define GEMINI_INTERRUPT1_BASE       0x49000000
  39  */
  40 #define GEMINI_SSP_CTRL_BASE    0x4A000000
  41 #define GEMINI_POWER_CTRL_BASE  0x4B000000
  42 #define GEMINI_CIR_BASE         0x4C000000
  43 #define GEMINI_GPIO_BASE(x)     (0x4D000000 + (x) * 0x1000000)
  44 #define GEMINI_PCI_IO_BASE      0x50000000
  45 #define GEMINI_PCI_MEM_BASE     0x58000000
  46 #define GEMINI_TOE_BASE         0x60000000
  47 #define GEMINI_GMAC0_BASE       0x6000A000
  48 #define GEMINI_GMAC1_BASE       0x6000E000
  49 #define GEMINI_SECURITY_BASE    0x62000000
  50 #define GEMINI_IDE0_BASE        0x63000000
  51 #define GEMINI_IDE1_BASE        0x63400000
  52 #define GEMINI_RAID_BASE        0x64000000
  53 #define GEMINI_FLASH_CTRL_BASE  0x65000000
  54 #define GEMINI_DRAM_CTRL_BASE   0x66000000
  55 #define GEMINI_GENERAL_DMA_BASE 0x67000000
  56 #define GEMINI_USB0_BASE        0x68000000
  57 #define GEMINI_USB1_BASE        0x69000000
  58 #define GEMINI_BIG_ENDIAN_BASE  0x80000000
  59
  60 #define GEMINI_TIMER1_BASE      GEMINI_TIMER_BASE
  61 #define GEMINI_TIMER2_BASE      (GEMINI_TIMER_BASE + 0x10)
  62 #define GEMINI_TIMER3_BASE      (GEMINI_TIMER_BASE + 0x20)
  63
  64 /*
  65  * UART Clock when System clk is 150MHz
  66  */
  67 #define UART_CLK        48000000
  68
  69 /*
  70  * macro to get at IO space when running virtually
  71  */
  72 #define IO_ADDRESS(x)   ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)
  73
  74 #endif