staging: brcm80211: decreased indentation level of brcms_c_wme_setparams function
[zen-stable.git] / arch / arm / plat-omap / include / plat / omap-serial.h
blob2682043f5a5bacc86376012f86598b8ba907bab3
1 /*
2 * Driver for OMAP-UART controller.
3 * Based on drivers/serial/8250.c
5 * Copyright (C) 2010 Texas Instruments.
7 * Authors:
8 * Govindraj R <govindraj.raja@ti.com>
9 * Thara Gopinath <thara@ti.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
17 #ifndef __OMAP_SERIAL_H__
18 #define __OMAP_SERIAL_H__
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <plat/mux.h>
25 #define DRIVER_NAME "omap_uart"
28 * Use tty device name as ttyO, [O -> OMAP]
29 * in bootargs we specify as console=ttyO0 if uart1
30 * is used as console uart.
32 #define OMAP_SERIAL_NAME "ttyO"
34 #define OMAP_MODE13X_SPEED 230400
36 /* WER = 0x7F
37 * Enable module level wakeup in WER reg
39 #define OMAP_UART_WER_MOD_WKUP 0X7F
41 /* Enable XON/XOFF flow control on output */
42 #define OMAP_UART_SW_TX 0x04
44 /* Enable XON/XOFF flow control on input */
45 #define OMAP_UART_SW_RX 0x04
47 #define OMAP_UART_SYSC_RESET 0X07
48 #define OMAP_UART_TCR_TRIG 0X0F
49 #define OMAP_UART_SW_CLR 0XF0
50 #define OMAP_UART_FIFO_CLR 0X06
52 #define OMAP_UART_DMA_CH_FREE -1
54 #define RX_TIMEOUT (3 * HZ)
55 #define OMAP_MAX_HSUART_PORTS 4
57 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
59 struct omap_uart_port_info {
60 bool dma_enabled; /* To specify DMA Mode */
61 unsigned int uartclk; /* UART clock rate */
62 void __iomem *membase; /* ioremap cookie or NULL */
63 resource_size_t mapbase; /* resource base */
64 unsigned long irqflags; /* request_irq flags */
65 upf_t flags; /* UPF_* flags */
68 struct uart_omap_dma {
69 u8 uart_dma_tx;
70 u8 uart_dma_rx;
71 int rx_dma_channel;
72 int tx_dma_channel;
73 dma_addr_t rx_buf_dma_phys;
74 dma_addr_t tx_buf_dma_phys;
75 unsigned int uart_base;
77 * Buffer for rx dma.It is not required for tx because the buffer
78 * comes from port structure.
80 unsigned char *rx_buf;
81 unsigned int prev_rx_dma_pos;
82 int tx_buf_size;
83 int tx_dma_used;
84 int rx_dma_used;
85 spinlock_t tx_lock;
86 spinlock_t rx_lock;
87 /* timer to poll activity on rx dma */
88 struct timer_list rx_timer;
89 int rx_buf_size;
90 int rx_timeout;
93 struct uart_omap_port {
94 struct uart_port port;
95 struct uart_omap_dma uart_dma;
96 struct platform_device *pdev;
98 unsigned char ier;
99 unsigned char lcr;
100 unsigned char mcr;
101 unsigned char fcr;
102 unsigned char efr;
104 int use_dma;
106 * Some bits in registers are cleared on a read, so they must
107 * be saved whenever the register is read but the bits will not
108 * be immediately processed.
110 unsigned int lsr_break_flag;
111 unsigned char msr_saved_flags;
112 char name[20];
113 unsigned long port_activity;
116 #endif /* __OMAP_SERIAL_H__ */