5 This option selects whether a 32-bit or a 64-bit kernel
8 menu "Processor support"
10 prompt "Processor Type"
13 There are five families of 32 bit PowerPC chips supported.
14 The most common ones are the desktop and server CPUs (601, 603,
15 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
16 embedded 512x/52xx/82xx/83xx/86xx counterparts.
17 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
18 (85xx) each form a family of their own that is not compatible
21 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
24 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
45 bool "AMCC 44x, 46x or 47x"
58 prompt "Processor Type"
61 There are two families of 64 bit PowerPC chips supported.
62 The most common ones are the desktop and server CPUs
63 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
65 The other are the "embedded" processors compliant with the
66 "Book 3E" variant of the architecture
69 bool "Server processors"
71 select PPC_HAVE_PMU_SUPPORT
74 bool "Embedded processors"
75 select PPC_FPU # Make it a choice ?
76 select PPC_SMP_MUXED_IPI
82 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
86 depends on PPC_BOOK3E_64
89 bool "Optimize for POWER4"
90 depends on PPC64 && PPC_BOOK3S
93 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
94 The resulting binary will not work on POWER3 or RS64 processors
95 when compiled with binutils 2.15 or later.
99 depends on PPC32 && PPC_BOOK3S
100 select PPC_HAVE_PMU_SUPPORT
104 depends on PPC64 && PPC_BOOK3S
105 default y if !POWER4_ONLY
108 depends on PPC64 && PPC_BOOK3S
113 depends on PPC_BOOK3E_64
116 bool "Optimize for Cell Broadband Engine"
117 depends on PPC64 && PPC_BOOK3S
119 Cause the compiler to optimize for the PPE of the Cell Broadband
120 Engine. This will make the code run considerably faster on Cell
121 but somewhat slower on other machines. This option only changes
122 the scheduling of instructions, not the selection of instructions
123 itself, so the resulting kernel will keep running on all other
124 machines. When building a kernel that is supposed to run only
125 on Cell, you should also select the POWER4_ONLY option.
127 # this is temp to handle compat with arch=ppc
132 select FSL_EMB_PERFMON
133 select PPC_FSL_BOOK3E
137 bool "e500mc Support"
145 config FSL_EMB_PERFMON
146 bool "Freescale Embedded Perfmon"
147 depends on E500 || PPC_83xx
149 This is the Performance Monitor support found on the e500 core
150 and some e300 cores (c3 and c4). Select this only if your
151 core supports the Embedded Performance Monitor APU
153 config FSL_EMB_PERF_EVENT
155 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
158 config FSL_EMB_PERF_EVENT_E500
160 depends on FSL_EMB_PERF_EVENT && E500
165 depends on 40x || 44x
170 depends on E200 || E500 || 44x || PPC_BOOK3E
175 depends on (E200 || E500) && PPC32
178 # this is for common code between PPC32 & PPC64 FSL BOOKE
179 config PPC_FSL_BOOK3E
181 select FSL_EMB_PERFMON
182 select PPC_SMP_MUXED_IPI
183 default y if FSL_BOOKE
187 depends on 44x || E500 || PPC_86xx
188 default y if PHYS_64BIT
191 bool 'Large physical address support' if E500 || PPC_86xx
192 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
194 This option enables kernel support for larger than 32-bit physical
195 addresses. This feature may not be available on all cores.
197 If you have more than 3.5GB of RAM or so, you also need to enable
198 SWIOTLB under Kernel Options for this to work. The actual number
199 is platform-dependent.
201 If in doubt, say N here.
204 bool "AltiVec Support"
205 depends on 6xx || POWER4
207 This option enables kernel support for the Altivec extensions to the
208 PowerPC processor. The kernel currently supports saving and restoring
209 altivec registers, and turning on the 'altivec enable' bit so user
210 processes can execute altivec instructions.
212 This option is only usefully if you have a processor that supports
213 altivec (G4, otherwise known as 74xx series), but does not have
214 any affect on a non-altivec cpu (it does, however add code to the
217 If in doubt, say Y here.
221 depends on POWER4 && ALTIVEC && PPC_FPU
224 This option enables kernel support for the Vector Scaler extensions
225 to the PowerPC processor. The kernel currently supports saving and
226 restoring VSX registers, and turning on the 'VSX enable' bit so user
227 processes can execute VSX instructions.
229 This option is only useful if you have a processor that supports
230 VSX (P7 and above), but does not have any affect on a non-VSX
231 CPUs (it does, however add code to the kernel).
233 If in doubt, say Y here.
236 bool "Support for PowerPC icswx coprocessor instruction"
241 This option enables kernel support for the PowerPC Initiate
242 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
245 This option is only useful if you have a processor that supports
246 the icswx coprocessor instruction. It does not have any effect
247 on processors without the icswx coprocessor instruction.
249 This option slightly increases kernel memory usage.
251 If in doubt, say N here.
255 depends on E200 || (E500 && !PPC_E500MC)
258 This option enables kernel support for the Signal Processing
259 Extensions (SPE) to the PowerPC processor. The kernel currently
260 supports saving and restoring SPE registers, and turning on the
261 'spe enable' bit so user processes can execute SPE instructions.
263 This option is only useful if you have a processor that supports
264 SPE (e500, otherwise known as 85xx series), but does not have any
265 effect on a non-spe cpu (it does, however add code to the kernel).
267 If in doubt, say Y here.
271 depends on PPC_BOOK3S
273 config PPC_STD_MMU_32
275 depends on PPC_STD_MMU && PPC32
277 config PPC_STD_MMU_64
279 depends on PPC_STD_MMU && PPC64
281 config PPC_MMU_NOHASH
283 depends on !PPC_STD_MMU
285 config PPC_MMU_NOHASH_32
287 depends on PPC_MMU_NOHASH && PPC32
289 config PPC_MMU_NOHASH_64
291 depends on PPC_MMU_NOHASH && PPC64
293 config PPC_BOOK3E_MMU
295 depends on FSL_BOOKE || PPC_BOOK3E
299 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
302 config VIRT_CPU_ACCOUNTING
303 bool "Deterministic task and CPU time accounting"
307 Select this option to enable more accurate task and CPU time
308 accounting. This is done by reading a CPU counter on each
309 kernel entry and exit and on transitions within the kernel
310 between system, softirq and hardirq state, so there is a
311 small performance impact. This also enables accounting of
312 stolen time on logically-partitioned systems running on
313 IBM POWER5-based machines.
315 If in doubt, say Y here.
317 config PPC_HAVE_PMU_SUPPORT
322 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
324 This enables the powerpc-specific perf_event back-end.
327 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
328 bool "Symmetric multi-processing support"
330 This enables support for systems with more than one CPU. If you have
331 a system with only one CPU, say N. If you have a system with more
332 than one CPU, say Y. Note that the kernel does not currently
333 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
334 since they have inadequate hardware support for multiprocessor
337 If you say N here, the kernel will run on single and multiprocessor
338 machines, but will use only one CPU of a multiprocessor machine. If
339 you say Y here, the kernel will run on single-processor machines.
340 On a single-processor machine, the kernel will run faster if you say
343 If you don't know what to do here, say N.
346 int "Maximum number of CPUs (2-8192)"
349 default "32" if PPC64
352 config NOT_COHERENT_CACHE
354 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
358 config CHECK_CACHE_COHERENCY