arch/powerpc/platforms/cell/qpace_setup.c

   1 /*
   2  *  linux/arch/powerpc/platforms/cell/qpace_setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
   9  *  Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * as published by the Free Software Foundation; either version
  14  * 2 of the License, or (at your option) any later version.
  15  */
  16
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/irq.h>
  22 #include <linux/console.h>
  23 #include <linux/of_platform.h>
  24
  25 #include <asm/mmu.h>
  26 #include <asm/processor.h>
  27 #include <asm/io.h>
  28 #include <asm/kexec.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/prom.h>
  31 #include <asm/rtas.h>
  32 #include <asm/dma.h>
  33 #include <asm/machdep.h>
  34 #include <asm/time.h>
  35 #include <asm/cputable.h>
  36 #include <asm/irq.h>
  37 #include <asm/spu.h>
  38 #include <asm/spu_priv1.h>
  39 #include <asm/udbg.h>
  40 #include <asm/cell-regs.h>
  41
  42 #include "interrupt.h"
  43 #include "pervasive.h"
  44 #include "ras.h"
  45
  46 static void qpace_show_cpuinfo(struct seq_file *m)
  47 {
  48         struct device_node *root;
  49         const char *model = "";
  50
  51         root = of_find_node_by_path("/");
  52         if (root)
  53                 model = of_get_property(root, "model", NULL);
  54         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  55         of_node_put(root);
  56 }
  57
  58 static void qpace_progress(char *s, unsigned short hex)
  59 {
  60         printk("*** %04x : %s\n", hex, s ? s : "");
  61 }
  62
  63 static const struct of_device_id qpace_bus_ids[] __initdata = {
  64         { .type = "soc", },
  65         { .compatible = "soc", },
  66         { .type = "spider", },
  67         { .type = "axon", },
  68         { .type = "plb5", },
  69         { .type = "plb4", },
  70         { .type = "opb", },
  71         { .type = "ebc", },
  72         {},
  73 };
  74
  75 static int __init qpace_publish_devices(void)
  76 {
  77         int node;
  78
  79         /* Publish OF platform devices for southbridge IOs */
  80         of_platform_bus_probe(NULL, qpace_bus_ids, NULL);
  81
  82         /* There is no device for the MIC memory controller, thus we create
  83          * a platform device for it to attach the EDAC driver to.
  84          */
  85         for_each_online_node(node) {
  86                 if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
  87                         continue;
  88                 platform_device_register_simple("cbe-mic", node, NULL, 0);
  89         }
  90
  91         return 0;
  92 }
  93 machine_subsys_initcall(qpace, qpace_publish_devices);
  94
  95 static void __init qpace_setup_arch(void)
  96 {
  97 #ifdef CONFIG_SPU_BASE
  98         spu_priv1_ops = &spu_priv1_mmio_ops;
  99         spu_management_ops = &spu_management_of_ops;
 100 #endif
 101
 102         cbe_regs_init();
 103
 104 #ifdef CONFIG_CBE_RAS
 105         cbe_ras_init();
 106 #endif
 107
 108 #ifdef CONFIG_SMP
 109         smp_init_cell();
 110 #endif
 111
 112         /* init to some ~sane value until calibrate_delay() runs */
 113         loops_per_jiffy = 50000000;
 114
 115         cbe_pervasive_init();
 116 #ifdef CONFIG_DUMMY_CONSOLE
 117         conswitchp = &dummy_con;
 118 #endif
 119 }
 120
 121 static int __init qpace_probe(void)
 122 {
 123         unsigned long root = of_get_flat_dt_root();
 124
 125         if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
 126                 return 0;
 127
 128         hpte_init_native();
 129
 130         return 1;
 131 }
 132
 133 define_machine(qpace) {
 134         .name                   = "QPACE",
 135         .probe                  = qpace_probe,
 136         .setup_arch             = qpace_setup_arch,
 137         .show_cpuinfo           = qpace_show_cpuinfo,
 138         .restart                = rtas_restart,
 139         .power_off              = rtas_power_off,
 140         .halt                   = rtas_halt,
 141         .get_boot_time          = rtas_get_boot_time,
 142         .get_rtc_time           = rtas_get_rtc_time,
 143         .set_rtc_time           = rtas_set_rtc_time,
 144         .calibrate_decr         = generic_calibrate_decr,
 145         .progress               = qpace_progress,
 146         .init_IRQ               = iic_init_IRQ,
 147 };