arch/x86/kernel/microcode_amd.c

   1 /*
   2  *  AMD CPU Microcode Update Driver for Linux
   3  *  Copyright (C) 2008 Advanced Micro Devices Inc.
   4  *
   5  *  Author: Peter Oruba <peter.oruba@amd.com>
   6  *
   7  *  Based on work by:
   8  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
   9  *
  10  *  This driver allows to upgrade microcode on AMD
  11  *  family 0x10 and 0x11 processors.
  12  *
  13  *  Licensed under the terms of the GNU General Public
  14  *  License version 2. See file COPYING for details.
  15  */
  16
  17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/firmware.h>
  20 #include <linux/pci_ids.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/vmalloc.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/pci.h>
  26
  27 #include <asm/microcode.h>
  28 #include <asm/processor.h>
  29 #include <asm/msr.h>
  30
  31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
  32 MODULE_AUTHOR("Peter Oruba");
  33 MODULE_LICENSE("GPL v2");
  34
  35 #define UCODE_MAGIC                0x00414d44
  36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
  37 #define UCODE_UCODE_TYPE           0x00000001
  38
  39 struct equiv_cpu_entry {
  40         u32     installed_cpu;
  41         u32     fixed_errata_mask;
  42         u32     fixed_errata_compare;
  43         u16     equiv_cpu;
  44         u16     res;
  45 } __attribute__((packed));
  46
  47 struct microcode_header_amd {
  48         u32     data_code;
  49         u32     patch_id;
  50         u16     mc_patch_data_id;
  51         u8      mc_patch_data_len;
  52         u8      init_flag;
  53         u32     mc_patch_data_checksum;
  54         u32     nb_dev_id;
  55         u32     sb_dev_id;
  56         u16     processor_rev_id;
  57         u8      nb_rev_id;
  58         u8      sb_rev_id;
  59         u8      bios_api_rev;
  60         u8      reserved1[3];
  61         u32     match_reg[8];
  62 } __attribute__((packed));
  63
  64 struct microcode_amd {
  65         struct microcode_header_amd     hdr;
  66         unsigned int                    mpb[0];
  67 };
  68
  69 #define SECTION_HDR_SIZE        8
  70 #define CONTAINER_HDR_SZ        12
  71
  72 static struct equiv_cpu_entry *equiv_cpu_table;
  73
  74 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
  75 {
  76         struct cpuinfo_x86 *c = &cpu_data(cpu);
  77         u32 dummy;
  78
  79         if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
  80                 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
  81                 return -1;
  82         }
  83
  84         rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
  85         pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
  86
  87         return 0;
  88 }
  89
  90 static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
  91                                   int rev)
  92 {
  93         unsigned int current_cpu_id;
  94         u16 equiv_cpu_id = 0;
  95         unsigned int i = 0;
  96
  97         BUG_ON(equiv_cpu_table == NULL);
  98         current_cpu_id = cpuid_eax(0x00000001);
  99
 100         while (equiv_cpu_table[i].installed_cpu != 0) {
 101                 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
 102                         equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
 103                         break;
 104                 }
 105                 i++;
 106         }
 107
 108         if (!equiv_cpu_id)
 109                 return 0;
 110
 111         if (mc_hdr->processor_rev_id != equiv_cpu_id)
 112                 return 0;
 113
 114         /* ucode might be chipset specific -- currently we don't support this */
 115         if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
 116                 pr_err("CPU%d: chipset specific code not yet supported\n",
 117                        cpu);
 118                 return 0;
 119         }
 120
 121         if (mc_hdr->patch_id <= rev)
 122                 return 0;
 123
 124         return 1;
 125 }
 126
 127 static int apply_microcode_amd(int cpu)
 128 {
 129         u32 rev, dummy;
 130         int cpu_num = raw_smp_processor_id();
 131         struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
 132         struct microcode_amd *mc_amd = uci->mc;
 133
 134         /* We should bind the task to the CPU */
 135         BUG_ON(cpu_num != cpu);
 136
 137         if (mc_amd == NULL)
 138                 return 0;
 139
 140         wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
 141         /* get patch id after patching */
 142         rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
 143
 144         /* check current patch id and patch's id for match */
 145         if (rev != mc_amd->hdr.patch_id) {
 146                 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
 147                        cpu, mc_amd->hdr.patch_id);
 148                 return -1;
 149         }
 150
 151         pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
 152         uci->cpu_sig.rev = rev;
 153
 154         return 0;
 155 }
 156
 157 static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
 158 {
 159         struct cpuinfo_x86 *c = &cpu_data(cpu);
 160         u32 max_size, actual_size;
 161
 162 #define F1XH_MPB_MAX_SIZE 2048
 163 #define F14H_MPB_MAX_SIZE 1824
 164 #define F15H_MPB_MAX_SIZE 4096
 165
 166         switch (c->x86) {
 167         case 0x14:
 168                 max_size = F14H_MPB_MAX_SIZE;
 169                 break;
 170         case 0x15:
 171                 max_size = F15H_MPB_MAX_SIZE;
 172                 break;
 173         default:
 174                 max_size = F1XH_MPB_MAX_SIZE;
 175                 break;
 176         }
 177
 178         actual_size = *(u32 *)(buf + 4);
 179
 180         if (actual_size + SECTION_HDR_SIZE > size || actual_size > max_size) {
 181                 pr_err("section size mismatch\n");
 182                 return 0;
 183         }
 184
 185         return actual_size;
 186 }
 187
 188 static struct microcode_header_amd *
 189 get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
 190 {
 191         struct microcode_header_amd *mc = NULL;
 192         unsigned int actual_size = 0;
 193
 194         if (*(u32 *)buf != UCODE_UCODE_TYPE) {
 195                 pr_err("invalid type field in container file section header\n");
 196                 goto out;
 197         }
 198
 199         actual_size = verify_ucode_size(cpu, buf, size);
 200         if (!actual_size)
 201                 goto out;
 202
 203         mc = vzalloc(actual_size);
 204         if (!mc)
 205                 goto out;
 206
 207         get_ucode_data(mc, buf + SECTION_HDR_SIZE, actual_size);
 208         *mc_size = actual_size + SECTION_HDR_SIZE;
 209
 210 out:
 211         return mc;
 212 }
 213
 214 static int install_equiv_cpu_table(const u8 *buf)
 215 {
 216         unsigned int *ibuf = (unsigned int *)buf;
 217         unsigned int type = ibuf[1];
 218         unsigned int size = ibuf[2];
 219
 220         if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
 221                 pr_err("empty section/"
 222                        "invalid type field in container file section header\n");
 223                 return -EINVAL;
 224         }
 225
 226         equiv_cpu_table = vmalloc(size);
 227         if (!equiv_cpu_table) {
 228                 pr_err("failed to allocate equivalent CPU table\n");
 229                 return -ENOMEM;
 230         }
 231
 232         get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
 233
 234         /* add header length */
 235         return size + CONTAINER_HDR_SZ;
 236 }
 237
 238 static void free_equiv_cpu_table(void)
 239 {
 240         vfree(equiv_cpu_table);
 241         equiv_cpu_table = NULL;
 242 }
 243
 244 static enum ucode_state
 245 generic_load_microcode(int cpu, const u8 *data, size_t size)
 246 {
 247         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 248         struct microcode_header_amd *mc_hdr = NULL;
 249         unsigned int mc_size, leftover;
 250         int offset;
 251         const u8 *ucode_ptr = data;
 252         void *new_mc = NULL;
 253         unsigned int new_rev = uci->cpu_sig.rev;
 254         enum ucode_state state = UCODE_OK;
 255
 256         offset = install_equiv_cpu_table(ucode_ptr);
 257         if (offset < 0) {
 258                 pr_err("failed to create equivalent cpu table\n");
 259                 return UCODE_ERROR;
 260         }
 261
 262         ucode_ptr += offset;
 263         leftover = size - offset;
 264
 265         while (leftover) {
 266                 mc_hdr = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
 267                 if (!mc_hdr)
 268                         break;
 269
 270                 if (get_matching_microcode(cpu, mc_hdr, new_rev)) {
 271                         vfree(new_mc);
 272                         new_rev = mc_hdr->patch_id;
 273                         new_mc  = mc_hdr;
 274                 } else
 275                         vfree(mc_hdr);
 276
 277                 ucode_ptr += mc_size;
 278                 leftover  -= mc_size;
 279         }
 280
 281         if (!new_mc) {
 282                 state = UCODE_NFOUND;
 283                 goto free_table;
 284         }
 285
 286         if (!leftover) {
 287                 vfree(uci->mc);
 288                 uci->mc = new_mc;
 289                 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
 290                          cpu, uci->cpu_sig.rev, new_rev);
 291         } else {
 292                 vfree(new_mc);
 293                 state = UCODE_ERROR;
 294         }
 295
 296 free_table:
 297         free_equiv_cpu_table();
 298
 299         return state;
 300 }
 301
 302 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
 303 {
 304         const char *fw_name = "amd-ucode/microcode_amd.bin";
 305         const struct firmware *fw;
 306         enum ucode_state ret = UCODE_NFOUND;
 307
 308         if (request_firmware(&fw, fw_name, device)) {
 309                 pr_err("failed to load file %s\n", fw_name);
 310                 goto out;
 311         }
 312
 313         ret = UCODE_ERROR;
 314         if (*(u32 *)fw->data != UCODE_MAGIC) {
 315                 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
 316                 goto fw_release;
 317         }
 318
 319         ret = generic_load_microcode(cpu, fw->data, fw->size);
 320
 321 fw_release:
 322         release_firmware(fw);
 323
 324 out:
 325         return ret;
 326 }
 327
 328 static enum ucode_state
 329 request_microcode_user(int cpu, const void __user *buf, size_t size)
 330 {
 331         pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
 332         return UCODE_ERROR;
 333 }
 334
 335 static void microcode_fini_cpu_amd(int cpu)
 336 {
 337         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 338
 339         vfree(uci->mc);
 340         uci->mc = NULL;
 341 }
 342
 343 static struct microcode_ops microcode_amd_ops = {
 344         .request_microcode_user           = request_microcode_user,
 345         .request_microcode_fw             = request_microcode_amd,
 346         .collect_cpu_info                 = collect_cpu_info_amd,
 347         .apply_microcode                  = apply_microcode_amd,
 348         .microcode_fini_cpu               = microcode_fini_cpu_amd,
 349 };
 350
 351 struct microcode_ops * __init init_amd_microcode(void)
 352 {
 353         return &microcode_amd_ops;
 354 }