2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 /include/ "skeleton.dtsi"
24 tzic: tz-interrupt-controller@0fffc000 {
25 compatible = "fsl,imx53-tzic", "fsl,tzic";
27 #interrupt-cells = <1>;
28 reg = <0x0fffc000 0x4000>;
36 compatible = "fsl,imx-ckil", "fixed-clock";
37 clock-frequency = <32768>;
41 compatible = "fsl,imx-ckih1", "fixed-clock";
42 clock-frequency = <22579200>;
46 compatible = "fsl,imx-ckih2", "fixed-clock";
47 clock-frequency = <0>;
51 compatible = "fsl,imx-osc", "fixed-clock";
52 clock-frequency = <24000000>;
59 compatible = "simple-bus";
60 interrupt-parent = <&tzic>;
63 aips@50000000 { /* AIPS1 */
64 compatible = "fsl,aips-bus", "simple-bus";
67 reg = <0x50000000 0x10000000>;
71 compatible = "fsl,spba-bus", "simple-bus";
74 reg = <0x50000000 0x40000>;
77 esdhc@50004000 { /* ESDHC1 */
78 compatible = "fsl,imx53-esdhc";
79 reg = <0x50004000 0x4000>;
84 esdhc@50008000 { /* ESDHC2 */
85 compatible = "fsl,imx53-esdhc";
86 reg = <0x50008000 0x4000>;
91 uart3: uart@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>;
98 ecspi@50010000 { /* ECSPI1 */
101 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
102 reg = <0x50010000 0x4000>;
107 esdhc@50020000 { /* ESDHC3 */
108 compatible = "fsl,imx53-esdhc";
109 reg = <0x50020000 0x4000>;
114 esdhc@50024000 { /* ESDHC4 */
115 compatible = "fsl,imx53-esdhc";
116 reg = <0x50024000 0x4000>;
122 gpio1: gpio@53f84000 {
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>;
128 interrupt-controller;
129 #interrupt-cells = <1>;
132 gpio2: gpio@53f88000 {
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>;
138 interrupt-controller;
139 #interrupt-cells = <1>;
142 gpio3: gpio@53f8c000 {
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>;
148 interrupt-controller;
149 #interrupt-cells = <1>;
152 gpio4: gpio@53f90000 {
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>;
158 interrupt-controller;
159 #interrupt-cells = <1>;
162 wdog@53f98000 { /* WDOG1 */
163 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
164 reg = <0x53f98000 0x4000>;
169 wdog@53f9c000 { /* WDOG2 */
170 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
171 reg = <0x53f9c000 0x4000>;
176 uart1: uart@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>;
183 uart2: uart@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>;
190 gpio5: gpio@53fdc000 {
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>;
196 interrupt-controller;
197 #interrupt-cells = <1>;
200 gpio6: gpio@53fe0000 {
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>;
206 interrupt-controller;
207 #interrupt-cells = <1>;
210 gpio7: gpio@53fe4000 {
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>;
216 interrupt-controller;
217 #interrupt-cells = <1>;
220 i2c@53fec000 { /* I2C3 */
221 #address-cells = <1>;
223 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
224 reg = <0x53fec000 0x4000>;
229 uart4: uart@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>;
237 aips@60000000 { /* AIPS2 */
238 compatible = "fsl,aips-bus", "simple-bus";
239 #address-cells = <1>;
241 reg = <0x60000000 0x10000000>;
244 uart5: uart@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>;
251 ecspi@63fac000 { /* ECSPI2 */
252 #address-cells = <1>;
254 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
255 reg = <0x63fac000 0x4000>;
261 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
262 reg = <0x63fb0000 0x4000>;
267 #address-cells = <1>;
269 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
270 reg = <0x63fc0000 0x4000>;
275 i2c@63fc4000 { /* I2C2 */
276 #address-cells = <1>;
278 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
279 reg = <0x63fc4000 0x4000>;
284 i2c@63fc8000 { /* I2C1 */
285 #address-cells = <1>;
287 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
288 reg = <0x63fc8000 0x4000>;
294 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
295 reg = <0x63fec000 0x4000>;