Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / arch / arm / mach-pxa / include / mach / viper.h
blob5f5fbf1f648944b0768fee4278611b21505f06b8
1 /*
2 * arch/arm/mach-pxa/include/mach/viper.h
4 * Author: Ian Campbell
5 * Created: Feb 03, 2003
6 * Copyright: Arcom Control Systems.
8 * Maintained by Marc Zyngier <maz@misterjones.org>
9 * <marc.zyngier@altran.com>
11 * Created based on lubbock.h:
12 * Author: Nicolas Pitre
13 * Created: Jun 15, 2001
14 * Copyright: MontaVista Software Inc.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
21 #ifndef ARCH_VIPER_H
22 #define ARCH_VIPER_H
24 #define VIPER_BOOT_PHYS PXA_CS0_PHYS
25 #define VIPER_FLASH_PHYS PXA_CS1_PHYS
26 #define VIPER_ETH_PHYS PXA_CS2_PHYS
27 #define VIPER_USB_PHYS PXA_CS3_PHYS
28 #define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS
29 #define VIPER_CPLD_PHYS PXA_CS5_PHYS
31 #define VIPER_CPLD_BASE (0xf0000000)
32 #define VIPER_PC104IO_BASE (0xf1000000)
33 #define VIPER_USB_BASE (0xf1800000)
35 #define VIPER_ETH_GPIO (0)
36 #define VIPER_CPLD_GPIO (1)
37 #define VIPER_USB_GPIO (2)
38 #define VIPER_UARTA_GPIO (4)
39 #define VIPER_UARTB_GPIO (3)
40 #define VIPER_CF_CD_GPIO (32)
41 #define VIPER_CF_RDY_GPIO (8)
42 #define VIPER_BCKLIGHT_EN_GPIO (9)
43 #define VIPER_LCD_EN_GPIO (10)
44 #define VIPER_PSU_DATA_GPIO (6)
45 #define VIPER_PSU_CLK_GPIO (11)
46 #define VIPER_UART_SHDN_GPIO (12)
47 #define VIPER_BRIGHTNESS_GPIO (16)
48 #define VIPER_PSU_nCS_LD_GPIO (19)
49 #define VIPER_UPS_GPIO (20)
50 #define VIPER_CF_POWER_GPIO (82)
51 #define VIPER_TPM_I2C_SDA_GPIO (26)
52 #define VIPER_TPM_I2C_SCL_GPIO (27)
53 #define VIPER_RTC_I2C_SDA_GPIO (83)
54 #define VIPER_RTC_I2C_SCL_GPIO (84)
56 #define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE)
57 #define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS)
59 #ifndef __ASSEMBLY__
60 # define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x)))
61 #endif
63 /* board level registers in the CPLD: (offsets from CPLD_BASE) ... */
65 /* ... Physical addresses */
66 #define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000)
67 #define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002)
68 #define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004)
69 #define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006)
70 #define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010)
71 #define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000)
72 #define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000)
74 /* ... Virtual addresses */
75 #define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS)
76 #define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS)
77 #define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS)
78 #define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS)
80 /* Decode VIPER_VERSION register */
81 #define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7)
82 #define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3)
83 #define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7)
85 /* Interrupt and Configuration Register (VIPER_ICR) */
86 /* This is a write only register. Only CF_RST is used under Linux */
88 #define VIPER_ICR_RETRIG (1 << 0)
89 #define VIPER_ICR_AUTO_CLR (1 << 1)
90 #define VIPER_ICR_R_DIS (1 << 2)
91 #define VIPER_ICR_CF_RST (1 << 3)
93 #endif