arch/arm/mach-s3c2443/dma.c

   1 /* linux/arch/arm/mach-s3c2443/dma.c
   2  *
   3  * Copyright (c) 2007 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2443 DMA selection
   7  *
   8  * http://armlinux.simtec.co.uk/
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/io.h>
  20
  21 #include <mach/dma.h>
  22
  23 #include <plat/dma-s3c24xx.h>
  24 #include <plat/cpu.h>
  25
  26 #include <plat/regs-serial.h>
  27 #include <mach/regs-gpio.h>
  28 #include <plat/regs-ac97.h>
  29 #include <plat/regs-dma.h>
  30 #include <mach/regs-mem.h>
  31 #include <mach/regs-lcd.h>
  32 #include <mach/regs-sdi.h>
  33 #include <plat/regs-iis.h>
  34 #include <plat/regs-spi.h>
  35
  36 #define MAP(x) { \
  37                 [0]     = (x) | DMA_CH_VALID,   \
  38                 [1]     = (x) | DMA_CH_VALID,   \
  39                 [2]     = (x) | DMA_CH_VALID,   \
  40                 [3]     = (x) | DMA_CH_VALID,   \
  41                 [4]     = (x) | DMA_CH_VALID,   \
  42                 [5]     = (x) | DMA_CH_VALID,   \
  43         }
  44
  45 static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
  46         [DMACH_XD0] = {
  47                 .name           = "xdreq0",
  48                 .channels       = MAP(S3C2443_DMAREQSEL_XDREQ0),
  49         },
  50         [DMACH_XD1] = {
  51                 .name           = "xdreq1",
  52                 .channels       = MAP(S3C2443_DMAREQSEL_XDREQ1),
  53         },
  54         [DMACH_SDI] = {
  55                 .name           = "sdi",
  56                 .channels       = MAP(S3C2443_DMAREQSEL_SDI),
  57         },
  58         [DMACH_SPI0] = {
  59                 .name           = "spi0",
  60                 .channels       = MAP(S3C2443_DMAREQSEL_SPI0TX),
  61         },
  62         [DMACH_SPI1] = {
  63                 .name           = "spi1",
  64                 .channels       = MAP(S3C2443_DMAREQSEL_SPI1TX),
  65         },
  66         [DMACH_UART0] = {
  67                 .name           = "uart0",
  68                 .channels       = MAP(S3C2443_DMAREQSEL_UART0_0),
  69         },
  70         [DMACH_UART1] = {
  71                 .name           = "uart1",
  72                 .channels       = MAP(S3C2443_DMAREQSEL_UART1_0),
  73         },
  74         [DMACH_UART2] = {
  75                 .name           = "uart2",
  76                 .channels       = MAP(S3C2443_DMAREQSEL_UART2_0),
  77         },
  78         [DMACH_UART3] = {
  79                 .name           = "uart3",
  80                 .channels       = MAP(S3C2443_DMAREQSEL_UART3_0),
  81         },
  82         [DMACH_UART0_SRC2] = {
  83                 .name           = "uart0",
  84                 .channels       = MAP(S3C2443_DMAREQSEL_UART0_1),
  85         },
  86         [DMACH_UART1_SRC2] = {
  87                 .name           = "uart1",
  88                 .channels       = MAP(S3C2443_DMAREQSEL_UART1_1),
  89         },
  90         [DMACH_UART2_SRC2] = {
  91                 .name           = "uart2",
  92                 .channels       = MAP(S3C2443_DMAREQSEL_UART2_1),
  93         },
  94         [DMACH_UART3_SRC2] = {
  95                 .name           = "uart3",
  96                 .channels       = MAP(S3C2443_DMAREQSEL_UART3_1),
  97         },
  98         [DMACH_TIMER] = {
  99                 .name           = "timer",
 100                 .channels       = MAP(S3C2443_DMAREQSEL_TIMER),
 101         },
 102         [DMACH_I2S_IN] = {
 103                 .name           = "i2s-sdi",
 104                 .channels       = MAP(S3C2443_DMAREQSEL_I2SRX),
 105         },
 106         [DMACH_I2S_OUT] = {
 107                 .name           = "i2s-sdo",
 108                 .channels       = MAP(S3C2443_DMAREQSEL_I2STX),
 109         },
 110         [DMACH_PCM_IN] = {
 111                 .name           = "pcm-in",
 112                 .channels       = MAP(S3C2443_DMAREQSEL_PCMIN),
 113         },
 114         [DMACH_PCM_OUT] = {
 115                 .name           = "pcm-out",
 116                 .channels       = MAP(S3C2443_DMAREQSEL_PCMOUT),
 117         },
 118         [DMACH_MIC_IN] = {
 119                 .name           = "mic-in",
 120                 .channels       = MAP(S3C2443_DMAREQSEL_MICIN),
 121         },
 122 };
 123
 124 static void s3c2443_dma_select(struct s3c2410_dma_chan *chan,
 125                                struct s3c24xx_dma_map *map)
 126 {
 127         writel(map->channels[0] | S3C2443_DMAREQSEL_HW,
 128                chan->regs + S3C2443_DMA_DMAREQSEL);
 129 }
 130
 131 static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
 132         .select         = s3c2443_dma_select,
 133         .dcon_mask      = 0,
 134         .map            = s3c2443_dma_mappings,
 135         .map_size       = ARRAY_SIZE(s3c2443_dma_mappings),
 136 };
 137
 138 static int __init s3c2443_dma_add(struct device *dev,
 139                                   struct subsys_interface *sif)
 140 {
 141         s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
 142         return s3c24xx_dma_init_map(&s3c2443_dma_sel);
 143 }
 144
 145 static struct subsys_interface s3c2443_dma_interface = {
 146         .name           = "s3c2443_dma",
 147         .subsys         = &s3c2443_subsys,
 148         .add_dev        = s3c2443_dma_add,
 149 };
 150
 151 static int __init s3c2443_dma_init(void)
 152 {
 153         return subsys_interface_register(&s3c2443_dma_interface);
 154 }
 155
 156 arch_initcall(s3c2443_dma_init);