arch/arm/plat-samsung/include/plat/dma-s3c24xx.h

   1 /* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
   2  *
   3  * Copyright (C) 2006 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Samsung S3C24XX DMA support - per SoC functions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <plat/dma-core.h>
  14
  15 extern struct bus_type dma_subsys;
  16 extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
  17
  18 #define DMA_CH_VALID            (1<<31)
  19 #define DMA_CH_NEVER            (1<<30)
  20
  21 /* struct s3c24xx_dma_map
  22  *
  23  * this holds the mapping information for the channel selected
  24  * to be connected to the specified device
  25 */
  26
  27 struct s3c24xx_dma_map {
  28         const char              *name;
  29
  30         unsigned long            channels[S3C_DMA_CHANNELS];
  31         unsigned long            channels_rx[S3C_DMA_CHANNELS];
  32 };
  33
  34 struct s3c24xx_dma_selection {
  35         struct s3c24xx_dma_map  *map;
  36         unsigned long            map_size;
  37         unsigned long            dcon_mask;
  38
  39         void    (*select)(struct s3c2410_dma_chan *chan,
  40                           struct s3c24xx_dma_map *map);
  41
  42         void    (*direction)(struct s3c2410_dma_chan *chan,
  43                              struct s3c24xx_dma_map *map,
  44                              enum dma_data_direction dir);
  45 };
  46
  47 extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
  48
  49 /* struct s3c24xx_dma_order_ch
  50  *
  51  * channel map for one of the `enum dma_ch` dma channels. the list
  52  * entry contains a set of low-level channel numbers, orred with
  53  * DMA_CH_VALID, which are checked in the order in the array.
  54 */
  55
  56 struct s3c24xx_dma_order_ch {
  57         unsigned int    list[S3C_DMA_CHANNELS]; /* list of channels */
  58         unsigned int    flags;                          /* flags */
  59 };
  60
  61 /* struct s3c24xx_dma_order
  62  *
  63  * information provided by either the core or the board to give the
  64  * dma system a hint on how to allocate channels
  65 */
  66
  67 struct s3c24xx_dma_order {
  68         struct s3c24xx_dma_order_ch     channels[DMACH_MAX];
  69 };
  70
  71 extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
  72
  73 /* DMA init code, called from the cpu support code */
  74
  75 extern int s3c2410_dma_init(void);
  76
  77 extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
  78                             unsigned int stride);