Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / arch / m68k / mvme16x / config.c
blobc3fb3bdd7ed9271b563650cb16c62d904f91c3bc
1 /*
2 * arch/m68k/mvme16x/config.c
4 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
6 * Based on:
8 * linux/amiga/config.c
10 * Copyright (C) 1993 Hamish Macdonald
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
14 * for more details.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/linkage.h>
24 #include <linux/init.h>
25 #include <linux/major.h>
26 #include <linux/genhd.h>
27 #include <linux/rtc.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
31 #include <asm/bootinfo.h>
32 #include <asm/system.h>
33 #include <asm/pgtable.h>
34 #include <asm/setup.h>
35 #include <asm/irq.h>
36 #include <asm/traps.h>
37 #include <asm/rtc.h>
38 #include <asm/machdep.h>
39 #include <asm/mvme16xhw.h>
41 extern t_bdid mvme_bdid;
43 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
45 static void mvme16x_get_model(char *model);
46 extern void mvme16x_sched_init(irq_handler_t handler);
47 extern unsigned long mvme16x_gettimeoffset (void);
48 extern int mvme16x_hwclk (int, struct rtc_time *);
49 extern int mvme16x_set_clock_mmss (unsigned long);
50 extern void mvme16x_reset (void);
52 int bcd2int (unsigned char b);
54 /* Save tick handler routine pointer, will point to xtime_update() in
55 * kernel/time/timekeeping.c, called via mvme16x_process_int() */
57 static irq_handler_t tick_handler;
60 unsigned short mvme16x_config;
61 EXPORT_SYMBOL(mvme16x_config);
64 int mvme16x_parse_bootinfo(const struct bi_record *bi)
66 if (bi->tag == BI_VME_TYPE || bi->tag == BI_VME_BRDINFO)
67 return 0;
68 else
69 return 1;
72 void mvme16x_reset(void)
74 printk ("\r\n\nCalled mvme16x_reset\r\n"
75 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
76 /* The string of returns is to delay the reset until the whole
77 * message is output. Assert reset bit in GCSR */
78 *(volatile char *)0xfff40107 = 0x80;
81 static void mvme16x_get_model(char *model)
83 p_bdid p = &mvme_bdid;
84 char suf[4];
86 suf[1] = p->brdsuffix[0];
87 suf[2] = p->brdsuffix[1];
88 suf[3] = '\0';
89 suf[0] = suf[1] ? '-' : '\0';
91 sprintf(model, "Motorola MVME%x%s", p->brdno, suf);
95 static void mvme16x_get_hardware_list(struct seq_file *m)
97 p_bdid p = &mvme_bdid;
99 if (p->brdno == 0x0162 || p->brdno == 0x0172)
101 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
103 seq_printf (m, "VMEchip2 %spresent\n",
104 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
105 seq_printf (m, "SCSI interface %spresent\n",
106 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
107 seq_printf (m, "Ethernet i/f %spresent\n",
108 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
113 * This function is called during kernel startup to initialize
114 * the mvme16x IRQ handling routines. Should probably ensure
115 * that the base vectors for the VMEChip2 and PCCChip2 are valid.
118 static void __init mvme16x_init_IRQ (void)
120 m68k_setup_user_interrupt(VEC_USER, 192);
123 #define pcc2chip ((volatile u_char *)0xfff42000)
124 #define PccSCCMICR 0x1d
125 #define PccSCCTICR 0x1e
126 #define PccSCCRICR 0x1f
127 #define PccTPIACKR 0x25
129 #ifdef CONFIG_EARLY_PRINTK
131 /**** cd2401 registers ****/
132 #define CD2401_ADDR (0xfff45000)
134 #define CyGFRCR (0x81)
135 #define CyCCR (0x13)
136 #define CyCLR_CHAN (0x40)
137 #define CyINIT_CHAN (0x20)
138 #define CyCHIP_RESET (0x10)
139 #define CyENB_XMTR (0x08)
140 #define CyDIS_XMTR (0x04)
141 #define CyENB_RCVR (0x02)
142 #define CyDIS_RCVR (0x01)
143 #define CyCAR (0xee)
144 #define CyIER (0x11)
145 #define CyMdmCh (0x80)
146 #define CyRxExc (0x20)
147 #define CyRxData (0x08)
148 #define CyTxMpty (0x02)
149 #define CyTxRdy (0x01)
150 #define CyLICR (0x26)
151 #define CyRISR (0x89)
152 #define CyTIMEOUT (0x80)
153 #define CySPECHAR (0x70)
154 #define CyOVERRUN (0x08)
155 #define CyPARITY (0x04)
156 #define CyFRAME (0x02)
157 #define CyBREAK (0x01)
158 #define CyREOIR (0x84)
159 #define CyTEOIR (0x85)
160 #define CyMEOIR (0x86)
161 #define CyNOTRANS (0x08)
162 #define CyRFOC (0x30)
163 #define CyRDR (0xf8)
164 #define CyTDR (0xf8)
165 #define CyMISR (0x8b)
166 #define CyRISR (0x89)
167 #define CyTISR (0x8a)
168 #define CyMSVR1 (0xde)
169 #define CyMSVR2 (0xdf)
170 #define CyDSR (0x80)
171 #define CyDCD (0x40)
172 #define CyCTS (0x20)
173 #define CyDTR (0x02)
174 #define CyRTS (0x01)
175 #define CyRTPRL (0x25)
176 #define CyRTPRH (0x24)
177 #define CyCOR1 (0x10)
178 #define CyPARITY_NONE (0x00)
179 #define CyPARITY_E (0x40)
180 #define CyPARITY_O (0xC0)
181 #define Cy_5_BITS (0x04)
182 #define Cy_6_BITS (0x05)
183 #define Cy_7_BITS (0x06)
184 #define Cy_8_BITS (0x07)
185 #define CyCOR2 (0x17)
186 #define CyETC (0x20)
187 #define CyCtsAE (0x02)
188 #define CyCOR3 (0x16)
189 #define Cy_1_STOP (0x02)
190 #define Cy_2_STOP (0x04)
191 #define CyCOR4 (0x15)
192 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
193 #define CyCOR5 (0x14)
194 #define CyCOR6 (0x18)
195 #define CyCOR7 (0x07)
196 #define CyRBPR (0xcb)
197 #define CyRCOR (0xc8)
198 #define CyTBPR (0xc3)
199 #define CyTCOR (0xc0)
200 #define CySCHR1 (0x1f)
201 #define CySCHR2 (0x1e)
202 #define CyTPR (0xda)
203 #define CyPILR1 (0xe3)
204 #define CyPILR2 (0xe0)
205 #define CyPILR3 (0xe1)
206 #define CyCMR (0x1b)
207 #define CyASYNC (0x02)
208 #define CyLICR (0x26)
209 #define CyLIVR (0x09)
210 #define CySCRL (0x23)
211 #define CySCRH (0x22)
212 #define CyTFTC (0x80)
214 static void cons_write(struct console *co, const char *str, unsigned count)
216 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
217 volatile u_char sink;
218 u_char ier;
219 int port;
220 u_char do_lf = 0;
221 int i = 0;
223 /* Ensure transmitter is enabled! */
225 port = 0;
226 base_addr[CyCAR] = (u_char)port;
227 while (base_addr[CyCCR])
229 base_addr[CyCCR] = CyENB_XMTR;
231 ier = base_addr[CyIER];
232 base_addr[CyIER] = CyTxMpty;
234 while (1) {
235 if (pcc2chip[PccSCCTICR] & 0x20)
237 /* We have a Tx int. Acknowledge it */
238 sink = pcc2chip[PccTPIACKR];
239 if ((base_addr[CyLICR] >> 2) == port) {
240 if (i == count) {
241 /* Last char of string is now output */
242 base_addr[CyTEOIR] = CyNOTRANS;
243 break;
245 if (do_lf) {
246 base_addr[CyTDR] = '\n';
247 str++;
248 i++;
249 do_lf = 0;
251 else if (*str == '\n') {
252 base_addr[CyTDR] = '\r';
253 do_lf = 1;
255 else {
256 base_addr[CyTDR] = *str++;
257 i++;
259 base_addr[CyTEOIR] = 0;
261 else
262 base_addr[CyTEOIR] = CyNOTRANS;
266 base_addr[CyIER] = ier;
269 static struct console cons_info =
271 .name = "sercon",
272 .write = cons_write,
273 .flags = CON_PRINTBUFFER | CON_BOOT,
274 .index = -1,
277 static void __init mvme16x_early_console(void)
279 register_console(&cons_info);
281 printk(KERN_INFO "MVME16x: early console registered\n");
283 #endif
285 void __init config_mvme16x(void)
287 p_bdid p = &mvme_bdid;
288 char id[40];
290 mach_max_dma_address = 0xffffffff;
291 mach_sched_init = mvme16x_sched_init;
292 mach_init_IRQ = mvme16x_init_IRQ;
293 mach_gettimeoffset = mvme16x_gettimeoffset;
294 mach_hwclk = mvme16x_hwclk;
295 mach_set_clock_mmss = mvme16x_set_clock_mmss;
296 mach_reset = mvme16x_reset;
297 mach_get_model = mvme16x_get_model;
298 mach_get_hardware_list = mvme16x_get_hardware_list;
300 /* Report board revision */
302 if (strncmp("BDID", p->bdid, 4))
304 printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
305 while (1)
308 /* Board type is only set by newer versions of vmelilo/tftplilo */
309 if (vme_brdtype == 0)
310 vme_brdtype = p->brdno;
312 mvme16x_get_model(id);
313 printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
314 p->rev&0xf, p->yr, p->mth, p->day);
315 if (p->brdno == 0x0162 || p->brdno == 0x172)
317 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
319 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
321 printk ("MVME%x Hardware status:\n", p->brdno);
322 printk (" CPU Type 68%s040\n",
323 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
324 printk (" CPU clock %dMHz\n",
325 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
326 printk (" VMEchip2 %spresent\n",
327 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
328 printk (" SCSI interface %spresent\n",
329 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
330 printk (" Ethernet interface %spresent\n",
331 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
333 else
335 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
337 /* Dont allow any interrupts from the CD2401 until the interrupt */
338 /* handlers are installed */
340 pcc2chip[PccSCCMICR] = 0x10;
341 pcc2chip[PccSCCTICR] = 0x10;
342 pcc2chip[PccSCCRICR] = 0x10;
343 #ifdef CONFIG_EARLY_PRINTK
344 mvme16x_early_console();
345 #endif
349 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
351 p_bdid p = &mvme_bdid;
352 unsigned long *new = (unsigned long *)vectors;
353 unsigned long *old = (unsigned long *)0xffe00000;
354 volatile unsigned char uc, *ucp;
356 if (p->brdno == 0x0162 || p->brdno == 0x172)
358 ucp = (volatile unsigned char *)0xfff42043;
359 uc = *ucp | 8;
360 *ucp = uc;
362 else
364 *(volatile unsigned long *)0xfff40074 = 0x40000000;
366 *(new+4) = *(old+4); /* Illegal instruction */
367 *(new+9) = *(old+9); /* Trace */
368 *(new+47) = *(old+47); /* Trap #15 */
370 if (p->brdno == 0x0162 || p->brdno == 0x172)
371 *(new+0x5e) = *(old+0x5e); /* ABORT switch */
372 else
373 *(new+0x6e) = *(old+0x6e); /* ABORT switch */
374 return IRQ_HANDLED;
377 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
379 *(volatile unsigned char *)0xfff4201b |= 8;
380 return tick_handler(irq, dev_id);
383 void mvme16x_sched_init (irq_handler_t timer_routine)
385 p_bdid p = &mvme_bdid;
386 int irq;
388 tick_handler = timer_routine;
389 /* Using PCCchip2 or MC2 chip tick timer 1 */
390 *(volatile unsigned long *)0xfff42008 = 0;
391 *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
392 *(volatile unsigned char *)0xfff42017 |= 3;
393 *(volatile unsigned char *)0xfff4201b = 0x16;
394 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
395 "timer", mvme16x_timer_int))
396 panic ("Couldn't register timer int");
398 if (p->brdno == 0x0162 || p->brdno == 0x172)
399 irq = MVME162_IRQ_ABORT;
400 else
401 irq = MVME167_IRQ_ABORT;
402 if (request_irq(irq, mvme16x_abort_int, 0,
403 "abort", mvme16x_abort_int))
404 panic ("Couldn't register abort int");
408 /* This is always executed with interrupts disabled. */
409 unsigned long mvme16x_gettimeoffset (void)
411 return (*(volatile unsigned long *)0xfff42008);
414 int bcd2int (unsigned char b)
416 return ((b>>4)*10 + (b&15));
419 int mvme16x_hwclk(int op, struct rtc_time *t)
421 #warning check me!
422 if (!op) {
423 rtc->ctrl = RTC_READ;
424 t->tm_year = bcd2int (rtc->bcd_year);
425 t->tm_mon = bcd2int (rtc->bcd_mth);
426 t->tm_mday = bcd2int (rtc->bcd_dom);
427 t->tm_hour = bcd2int (rtc->bcd_hr);
428 t->tm_min = bcd2int (rtc->bcd_min);
429 t->tm_sec = bcd2int (rtc->bcd_sec);
430 rtc->ctrl = 0;
432 return 0;
435 int mvme16x_set_clock_mmss (unsigned long nowtime)
437 return 0;