arch/mips/include/asm/mach-au1x00/gpio.h

   1 /*
   2  * Alchemy GPIO support.
   3  *
   4  * With CONFIG_GPIOLIB=y different types of on-chip GPIO can be supported within
   5  *  the same kernel image.
   6  * With CONFIG_GPIOLIB=n, your board must select ALCHEMY_GPIOINT_AU1XXX for the
   7  *  appropriate CPU type (AU1000 currently).
   8  */
   9
  10 #ifndef _ALCHEMY_GPIO_H_
  11 #define _ALCHEMY_GPIO_H_
  12
  13 #include <asm/mach-au1x00/au1000.h>
  14 #include <asm/mach-au1x00/gpio-au1000.h>
  15 #include <asm/mach-au1x00/gpio-au1300.h>
  16
  17 /* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before
  18  * SYS_PININPUTEN is written to at least once.  On Au1550/Au1200/Au1300 this
  19  * register enables use of GPIOs as wake source.
  20  */
  21 static inline void alchemy_gpio1_input_enable(void)
  22 {
  23         void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
  24         __raw_writel(0, base + 0x110);          /* the write op is key */
  25         wmb();
  26 }
  27
  28
  29 /* Linux gpio framework integration.
  30 *
  31 * 4 use cases of Alchemy GPIOS:
  32 *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
  33 *       Board must register gpiochips.
  34 *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
  35 *       A gpiochip for the 75 GPIOs is registered.
  36 *
  37 *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
  38 *       the boards' gpio.h must provide the linux gpio wrapper functions,
  39 *
  40 *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
  41 *       inlinable gpio functions are provided which enable access to the
  42 *       Au1300 gpios only by using the numbers straight out of the data-
  43 *       sheets.
  44
  45 * Cases 1 and 3 are intended for boards which want to provide their own
  46 * GPIO namespace and -operations (i.e. for example you have 8 GPIOs
  47 * which are in part provided by spare Au1300 GPIO pins and in part by
  48 * an external FPGA but you still want them to be accssible in linux
  49 * as gpio0-7. The board can of course use the alchemy_gpioX_* functions
  50 * as required).
  51 */
  52
  53 #ifdef CONFIG_GPIOLIB
  54
  55 /* wraps the cpu-dependent irq_to_gpio functions */
  56 /* FIXME: gpiolib needs an irq_to_gpio hook */
  57 static inline int __au_irq_to_gpio(unsigned int irq)
  58 {
  59         switch (alchemy_get_cputype()) {
  60         case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200:
  61                 return alchemy_irq_to_gpio(irq);
  62         case ALCHEMY_CPU_AU1300:
  63                 return au1300_irq_to_gpio(irq);
  64         }
  65         return -EINVAL;
  66 }
  67
  68
  69 /* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */
  70 #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT    /* case (2) */
  71
  72 /* get everything through gpiolib */
  73 #define gpio_to_irq     __gpio_to_irq
  74 #define gpio_get_value  __gpio_get_value
  75 #define gpio_set_value  __gpio_set_value
  76 #define gpio_cansleep   __gpio_cansleep
  77 #define irq_to_gpio     __au_irq_to_gpio
  78
  79 #include <asm-generic/gpio.h>
  80
  81 #endif  /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
  82
  83
  84 #endif  /* CONFIG_GPIOLIB */
  85
  86 #endif  /* _ALCHEMY_GPIO_H_ */