| blob | 71d3bb4931dc05cc3e70d801bd32071692357afd |
1 /*
2 * Device Tree Source for ESTeem 195E Hotfoot
3 *
4 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
11 /dts-v1/;
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "est,hotfoot";
17 compatible = "est,hotfoot";
18 dcr-parent = <&{/cpus/cpu@0}>;
20 aliases {
21 ethernet0 = &EMAC0;
22 ethernet1 = &EMAC1;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
31 cpu@0 {
32 device_type = "cpu";
33 model = "PowerPC,405EP";
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
37 i-cache-line-size = <0x20>;
38 d-cache-line-size = <0x20>;
39 i-cache-size = <0x4000>;
40 d-cache-size = <0x4000>;
41 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x00000000>; /* Filled in by zImage */
49 };
51 UIC0: interrupt-controller {
52 compatible = "ibm,uic";
53 interrupt-controller;
54 cell-index = <0>;
55 dcr-reg = <0x0c0 0x009>;
56 #address-cells = <0>;
57 #size-cells = <0>;
58 #interrupt-cells = <2>;
59 };
61 plb {
62 compatible = "ibm,plb3";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66 clock-frequency = <0>; /* Filled in by zImage */
68 SDRAM0: memory-controller {
69 compatible = "ibm,sdram-405ep";
70 dcr-reg = <0x010 0x002>;
71 };
73 MAL: mcmal {
74 compatible = "ibm,mcmal-405ep", "ibm,mcmal";
75 dcr-reg = <0x180 0x062>;
76 num-tx-chans = <4>;
77 num-rx-chans = <2>;
78 interrupt-parent = <&UIC0>;
79 interrupts = <
80 0xb 0x4 /* TXEOB */
81 0xc 0x4 /* RXEOB */
82 0xa 0x4 /* SERR */
83 0xd 0x4 /* TXDE */
84 0xe 0x4 /* RXDE */>;
85 };
87 POB0: opb {
88 compatible = "ibm,opb-405ep", "ibm,opb";
89 #address-cells = <1>;
90 #size-cells = <1>;
91 ranges = <0xef600000 0xef600000 0x00a00000>;
92 dcr-reg = <0x0a0 0x005>;
93 clock-frequency = <0>; /* Filled in by zImage */
95 /* Hotfoot has UART0/UART1 swapped */
97 UART0: serial@ef600400 {
98 device_type = "serial";
99 compatible = "ns16550";
100 reg = <0xef600400 0x00000008>;
101 virtual-reg = <0xef600400>;
102 clock-frequency = <0>; /* Filled in by zImage */
103 current-speed = <0x9600>;
104 interrupt-parent = <&UIC0>;
105 interrupts = <0x1 0x4>;
106 };
108 UART1: serial@ef600300 {
109 device_type = "serial";
110 compatible = "ns16550";
111 reg = <0xef600300 0x00000008>;
112 virtual-reg = <0xef600300>;
113 clock-frequency = <0>; /* Filled in by zImage */
114 current-speed = <0x9600>;
115 interrupt-parent = <&UIC0>;
116 interrupts = <0x0 0x4>;
117 };
119 IIC: i2c@ef600500 {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "ibm,iic-405ep", "ibm,iic";
123 reg = <0xef600500 0x00000011>;
124 interrupt-parent = <&UIC0>;
125 interrupts = <0x2 0x4>;
127 rtc@68 {
128 /* Actually a DS1339 */
129 compatible = "dallas,ds1307";
130 reg = <0x68>;
131 };
133 temp@4a {
134 /* Not present on all boards */
135 compatible = "national,lm75";
136 reg = <0x4a>;
137 };
138 };
140 GPIO: gpio@ef600700 {
141 #gpio-cells = <2>;
142 compatible = "ibm,ppc4xx-gpio";
143 reg = <0xef600700 0x00000020>;
144 gpio-controller;
145 };
147 gpio-leds {
148 compatible = "gpio-leds";
149 status {
150 label = "Status";
151 gpios = <&GPIO 1 0>;
152 };
153 radiorx {
154 label = "Rx";
155 gpios = <&GPIO 0xe 0>;
156 };
157 };
159 EMAC0: ethernet@ef600800 {
160 linux,network-index = <0x0>;
161 device_type = "network";
162 compatible = "ibm,emac-405ep", "ibm,emac";
163 interrupt-parent = <&UIC0>;
164 interrupts = <
165 0xf 0x4 /* Ethernet */
166 0x9 0x4 /* Ethernet Wake Up */>;
167 local-mac-address = [000000000000]; /* Filled in by zImage */
168 reg = <0xef600800 0x00000070>;
169 mal-device = <&MAL>;
170 mal-tx-channel = <0>;
171 mal-rx-channel = <0>;
172 cell-index = <0>;
173 max-frame-size = <0x5dc>;
174 rx-fifo-size = <0x1000>;
175 tx-fifo-size = <0x800>;
176 phy-mode = "mii";
177 phy-map = <0x00000000>;
178 };
180 EMAC1: ethernet@ef600900 {
181 linux,network-index = <0x1>;
182 device_type = "network";
183 compatible = "ibm,emac-405ep", "ibm,emac";
184 interrupt-parent = <&UIC0>;
185 interrupts = <
186 0x11 0x4 /* Ethernet */
187 0x9 0x4 /* Ethernet Wake Up */>;
188 local-mac-address = [000000000000]; /* Filled in by zImage */
189 reg = <0xef600900 0x00000070>;
190 mal-device = <&MAL>;
191 mal-tx-channel = <2>;
192 mal-rx-channel = <1>;
193 cell-index = <1>;
194 max-frame-size = <0x5dc>;
195 rx-fifo-size = <0x1000>;
196 tx-fifo-size = <0x800>;
197 mdio-device = <&EMAC0>;
198 phy-mode = "mii";
199 phy-map = <0x0000001>;
200 };
201 };
203 EBC0: ebc {
204 compatible = "ibm,ebc-405ep", "ibm,ebc";
205 dcr-reg = <0x012 0x002>;
206 #address-cells = <2>;
207 #size-cells = <1>;
209 /* The ranges property is supplied by the bootwrapper
210 * and is based on the firmware's configuration of the
211 * EBC bridge
212 */
213 clock-frequency = <0>; /* Filled in by zImage */
215 nor_flash@0 {
216 compatible = "cfi-flash";
217 bank-width = <2>;
218 reg = <0x0 0xff800000 0x00800000>;
219 #address-cells = <1>;
220 #size-cells = <1>;
222 /* This mapping is for the 8M flash
223 4M flash has all ofssets -= 4M,
224 and FeatFS partition is not present */
225 partition@0 {
226 label = "Bootloader";
227 reg = <0x7c0000 0x40000>;
228 /* read-only; */
229 };
230 partition@1 {
231 label = "Env_and_Config_Primary";
232 reg = <0x400000 0x10000>;
233 };
234 partition@2 {
235 label = "Kernel";
236 reg = <0x420000 0x100000>;
237 };
238 partition@3 {
239 label = "Filesystem";
240 reg = <0x520000 0x2a0000>;
241 };
242 partition@4 {
243 label = "Env_and_Config_Secondary";
244 reg = <0x410000 0x10000>;
245 };
246 partition@5 {
247 label = "FeatFS";
248 reg = <0x000000 0x400000>;
249 };
250 partition@6 {
251 label = "Bootloader_Env";
252 reg = <0x7d0000 0x10000>;
253 };
254 };
255 };
257 PCI0: pci@ec000000 {
258 device_type = "pci";
259 #interrupt-cells = <1>;
260 #size-cells = <2>;
261 #address-cells = <3>;
262 compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
263 primary;
264 reg = <0xeec00000 0x00000008 /* Config space access */
265 0xeed80000 0x00000004 /* IACK */
266 0xeed80000 0x00000004 /* Special cycle */
267 0xef480000 0x00000040>; /* Internal registers */
269 /* Outbound ranges, one memory and one IO,
270 * later cannot be changed. Chip supports a second
271 * IO range but we don't use it for now
272 */
273 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
274 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
276 /* Inbound 2GB range starting at 0 */
277 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
279 interrupt-parent = <&UIC0>;
280 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
281 interrupt-map = <
282 /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
283 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
284 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
286 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
287 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
288 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
289 >;
290 };
291 };
293 chosen {
294 linux,stdout-path = &UART0;
295 };
296 };