Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / arch / powerpc / boot / dts / p2020ds.dts
blob237310cc7e6ce077958857c9996725c4242d12a9
1 /*
2  * P2020 DS Device Tree Source
3  *
4  * Copyright 2009-2011 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
12 /include/ "fsl/p2020si-pre.dtsi"
14 / {
15         model = "fsl,P2020DS";
16         compatible = "fsl,P2020DS";
18         memory {
19                 device_type = "memory";
20         };
22         board_lbc: lbc: localbus@ffe05000 {
23                 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
24                           0x1 0x0 0x0 0xe0000000 0x08000000
25                           0x2 0x0 0x0 0xffa00000 0x00040000
26                           0x3 0x0 0x0 0xffdf0000 0x00008000
27                           0x4 0x0 0x0 0xffa40000 0x00040000
28                           0x5 0x0 0x0 0xffa80000 0x00040000
29                           0x6 0x0 0x0 0xffac0000 0x00040000>;
30                 reg = <0 0xffe05000 0 0x1000>;
31         };
33         board_soc: soc: soc@ffe00000 {
34                 ranges = <0x0 0x0 0xffe00000 0x100000>;
35         };
37         pci2: pcie@ffe08000 {
38                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
39                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
40                 reg = <0 0xffe08000 0 0x1000>;
41                 pcie@0 {
42                         ranges = <0x2000000 0x0 0x80000000
43                                   0x2000000 0x0 0x80000000
44                                   0x0 0x20000000
46                                   0x1000000 0x0 0x0
47                                   0x1000000 0x0 0x0
48                                   0x0 0x10000>;
49                 };
50         };
52         board_pci1: pci1: pcie@ffe09000 {
53                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
54                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
55                 reg = <0 0xffe09000 0 0x1000>;
56                 pcie@0 {
57                         ranges = <0x2000000 0x0 0xa0000000
58                                   0x2000000 0x0 0xa0000000
59                                   0x0 0x20000000
61                                   0x1000000 0x0 0x0
62                                   0x1000000 0x0 0x0
63                                   0x0 0x10000>;
64                 };
65         };
67         pci0: pcie@ffe0a000 {
68                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
69                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
70                 reg = <0 0xffe0a000 0 0x1000>;
71                 pcie@0 {
72                         ranges = <0x2000000 0x0 0xc0000000
73                                   0x2000000 0x0 0xc0000000
74                                   0x0 0x20000000
76                                   0x1000000 0x0 0x0
77                                   0x1000000 0x0 0x0
78                                   0x0 0x10000>;
79                 };
80         };
84  * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
85  * for interrupt-map & interrupt-map-mask
86  */
88 /include/ "fsl/p2020si-post.dtsi"
89 /include/ "p2020ds.dtsi"