2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSR 210
32 #define OP_31_XOP_MTSRIN 242
33 #define OP_31_XOP_TLBIEL 274
34 #define OP_31_XOP_TLBIE 306
35 #define OP_31_XOP_SLBMTE 402
36 #define OP_31_XOP_SLBIE 434
37 #define OP_31_XOP_SLBIA 498
38 #define OP_31_XOP_MFSR 595
39 #define OP_31_XOP_MFSRIN 659
40 #define OP_31_XOP_DCBA 758
41 #define OP_31_XOP_SLBMFEV 851
42 #define OP_31_XOP_EIOIO 854
43 #define OP_31_XOP_SLBMFEE 915
45 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46 #define OP_31_XOP_DCBZ 1010
62 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
63 * function pointers, so let's just disable the define. */
72 static bool spr_allowed(struct kvm_vcpu
*vcpu
, enum priv_level level
)
74 /* PAPR VMs only access supervisor SPRs */
75 if (vcpu
->arch
.papr_enabled
&& (level
> PRIV_SUPER
))
78 /* Limit user space to its own small SPR set */
79 if ((vcpu
->arch
.shared
->msr
& MSR_PR
) && level
> PRIV_PROBLEM
)
85 int kvmppc_core_emulate_op(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
86 unsigned int inst
, int *advance
)
88 int emulated
= EMULATE_DONE
;
90 switch (get_op(inst
)) {
92 switch (get_xop(inst
)) {
95 kvmppc_set_pc(vcpu
, vcpu
->arch
.shared
->srr0
);
96 kvmppc_set_msr(vcpu
, vcpu
->arch
.shared
->srr1
);
101 emulated
= EMULATE_FAIL
;
106 switch (get_xop(inst
)) {
107 case OP_31_XOP_MFMSR
:
108 kvmppc_set_gpr(vcpu
, get_rt(inst
),
109 vcpu
->arch
.shared
->msr
);
111 case OP_31_XOP_MTMSRD
:
113 ulong rs
= kvmppc_get_gpr(vcpu
, get_rs(inst
));
114 if (inst
& 0x10000) {
115 vcpu
->arch
.shared
->msr
&= ~(MSR_RI
| MSR_EE
);
116 vcpu
->arch
.shared
->msr
|= rs
& (MSR_RI
| MSR_EE
);
118 kvmppc_set_msr(vcpu
, rs
);
121 case OP_31_XOP_MTMSR
:
122 kvmppc_set_msr(vcpu
, kvmppc_get_gpr(vcpu
, get_rs(inst
)));
128 srnum
= kvmppc_get_field(inst
, 12 + 32, 15 + 32);
129 if (vcpu
->arch
.mmu
.mfsrin
) {
131 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
132 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
136 case OP_31_XOP_MFSRIN
:
140 srnum
= (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf;
141 if (vcpu
->arch
.mmu
.mfsrin
) {
143 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
144 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
149 vcpu
->arch
.mmu
.mtsrin(vcpu
,
151 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
153 case OP_31_XOP_MTSRIN
:
154 vcpu
->arch
.mmu
.mtsrin(vcpu
,
155 (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf,
156 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
158 case OP_31_XOP_TLBIE
:
159 case OP_31_XOP_TLBIEL
:
161 bool large
= (inst
& 0x00200000) ? true : false;
162 ulong addr
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
163 vcpu
->arch
.mmu
.tlbie(vcpu
, addr
, large
);
166 case OP_31_XOP_EIOIO
:
168 case OP_31_XOP_SLBMTE
:
169 if (!vcpu
->arch
.mmu
.slbmte
)
172 vcpu
->arch
.mmu
.slbmte(vcpu
,
173 kvmppc_get_gpr(vcpu
, get_rs(inst
)),
174 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
176 case OP_31_XOP_SLBIE
:
177 if (!vcpu
->arch
.mmu
.slbie
)
180 vcpu
->arch
.mmu
.slbie(vcpu
,
181 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
183 case OP_31_XOP_SLBIA
:
184 if (!vcpu
->arch
.mmu
.slbia
)
187 vcpu
->arch
.mmu
.slbia(vcpu
);
189 case OP_31_XOP_SLBMFEE
:
190 if (!vcpu
->arch
.mmu
.slbmfee
) {
191 emulated
= EMULATE_FAIL
;
195 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
196 t
= vcpu
->arch
.mmu
.slbmfee(vcpu
, rb
);
197 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
200 case OP_31_XOP_SLBMFEV
:
201 if (!vcpu
->arch
.mmu
.slbmfev
) {
202 emulated
= EMULATE_FAIL
;
206 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
207 t
= vcpu
->arch
.mmu
.slbmfev(vcpu
, rb
);
208 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
212 /* Gets treated as NOP */
216 ulong rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
219 u32 zeros
[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
224 ra
= kvmppc_get_gpr(vcpu
, get_ra(inst
));
226 addr
= (ra
+ rb
) & ~31ULL;
227 if (!(vcpu
->arch
.shared
->msr
& MSR_SF
))
231 r
= kvmppc_st(vcpu
, &addr
, 32, zeros
, true);
232 if ((r
== -ENOENT
) || (r
== -EPERM
)) {
234 vcpu
->arch
.shared
->dar
= vaddr
;
235 to_svcpu(vcpu
)->fault_dar
= vaddr
;
237 dsisr
= DSISR_ISSTORE
;
239 dsisr
|= DSISR_NOHPTE
;
240 else if (r
== -EPERM
)
241 dsisr
|= DSISR_PROTFAULT
;
243 vcpu
->arch
.shared
->dsisr
= dsisr
;
244 to_svcpu(vcpu
)->fault_dsisr
= dsisr
;
246 kvmppc_book3s_queue_irqprio(vcpu
,
247 BOOK3S_INTERRUPT_DATA_STORAGE
);
253 emulated
= EMULATE_FAIL
;
257 emulated
= EMULATE_FAIL
;
260 if (emulated
== EMULATE_FAIL
)
261 emulated
= kvmppc_emulate_paired_single(run
, vcpu
);
266 void kvmppc_set_bat(struct kvm_vcpu
*vcpu
, struct kvmppc_bat
*bat
, bool upper
,
271 u32 bl
= (val
>> 2) & 0x7ff;
272 bat
->bepi_mask
= (~bl
<< 17);
273 bat
->bepi
= val
& 0xfffe0000;
274 bat
->vs
= (val
& 2) ? 1 : 0;
275 bat
->vp
= (val
& 1) ? 1 : 0;
276 bat
->raw
= (bat
->raw
& 0xffffffff00000000ULL
) | val
;
279 bat
->brpn
= val
& 0xfffe0000;
280 bat
->wimg
= (val
>> 3) & 0xf;
282 bat
->raw
= (bat
->raw
& 0x00000000ffffffffULL
) | ((u64
)val
<< 32);
286 static struct kvmppc_bat
*kvmppc_find_bat(struct kvm_vcpu
*vcpu
, int sprn
)
288 struct kvmppc_vcpu_book3s
*vcpu_book3s
= to_book3s(vcpu
);
289 struct kvmppc_bat
*bat
;
292 case SPRN_IBAT0U
... SPRN_IBAT3L
:
293 bat
= &vcpu_book3s
->ibat
[(sprn
- SPRN_IBAT0U
) / 2];
295 case SPRN_IBAT4U
... SPRN_IBAT7L
:
296 bat
= &vcpu_book3s
->ibat
[4 + ((sprn
- SPRN_IBAT4U
) / 2)];
298 case SPRN_DBAT0U
... SPRN_DBAT3L
:
299 bat
= &vcpu_book3s
->dbat
[(sprn
- SPRN_DBAT0U
) / 2];
301 case SPRN_DBAT4U
... SPRN_DBAT7L
:
302 bat
= &vcpu_book3s
->dbat
[4 + ((sprn
- SPRN_DBAT4U
) / 2)];
311 int kvmppc_core_emulate_mtspr(struct kvm_vcpu
*vcpu
, int sprn
, int rs
)
313 int emulated
= EMULATE_DONE
;
314 ulong spr_val
= kvmppc_get_gpr(vcpu
, rs
);
318 if (!spr_allowed(vcpu
, PRIV_HYPER
))
320 to_book3s(vcpu
)->sdr1
= spr_val
;
323 vcpu
->arch
.shared
->dsisr
= spr_val
;
326 vcpu
->arch
.shared
->dar
= spr_val
;
329 to_book3s(vcpu
)->hior
= spr_val
;
331 case SPRN_IBAT0U
... SPRN_IBAT3L
:
332 case SPRN_IBAT4U
... SPRN_IBAT7L
:
333 case SPRN_DBAT0U
... SPRN_DBAT3L
:
334 case SPRN_DBAT4U
... SPRN_DBAT7L
:
336 struct kvmppc_bat
*bat
= kvmppc_find_bat(vcpu
, sprn
);
338 kvmppc_set_bat(vcpu
, bat
, !(sprn
% 2), (u32
)spr_val
);
339 /* BAT writes happen so rarely that we're ok to flush
341 kvmppc_mmu_pte_flush(vcpu
, 0, 0);
342 kvmppc_mmu_flush_segments(vcpu
);
346 to_book3s(vcpu
)->hid
[0] = spr_val
;
349 to_book3s(vcpu
)->hid
[1] = spr_val
;
352 to_book3s(vcpu
)->hid
[2] = spr_val
;
354 case SPRN_HID2_GEKKO
:
355 to_book3s(vcpu
)->hid
[2] = spr_val
;
356 /* HID2.PSE controls paired single on gekko */
357 switch (vcpu
->arch
.pvr
) {
358 case 0x00080200: /* lonestar 2.0 */
359 case 0x00088202: /* lonestar 2.2 */
360 case 0x70000100: /* gekko 1.0 */
361 case 0x00080100: /* gekko 2.0 */
362 case 0x00083203: /* gekko 2.3a */
363 case 0x00083213: /* gekko 2.3b */
364 case 0x00083204: /* gekko 2.4 */
365 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
366 case 0x00087200: /* broadway */
367 if (vcpu
->arch
.hflags
& BOOK3S_HFLAG_NATIVE_PS
) {
368 /* Native paired singles */
369 } else if (spr_val
& (1 << 29)) { /* HID2.PSE */
370 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_PAIRED_SINGLE
;
371 kvmppc_giveup_ext(vcpu
, MSR_FP
);
373 vcpu
->arch
.hflags
&= ~BOOK3S_HFLAG_PAIRED_SINGLE
;
379 case SPRN_HID4_GEKKO
:
380 to_book3s(vcpu
)->hid
[4] = spr_val
;
383 to_book3s(vcpu
)->hid
[5] = spr_val
;
384 /* guest HID5 set can change is_dcbz32 */
385 if (vcpu
->arch
.mmu
.is_dcbz32(vcpu
) &&
387 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_DCBZ32
;
397 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
] = spr_val
;
406 case SPRN_MMCR0_GEKKO
:
407 case SPRN_MMCR1_GEKKO
:
408 case SPRN_PMC1_GEKKO
:
409 case SPRN_PMC2_GEKKO
:
410 case SPRN_PMC3_GEKKO
:
411 case SPRN_PMC4_GEKKO
:
412 case SPRN_WPAR_GEKKO
:
416 printk(KERN_INFO
"KVM: invalid SPR write: %d\n", sprn
);
418 emulated
= EMULATE_FAIL
;
426 int kvmppc_core_emulate_mfspr(struct kvm_vcpu
*vcpu
, int sprn
, int rt
)
428 int emulated
= EMULATE_DONE
;
431 case SPRN_IBAT0U
... SPRN_IBAT3L
:
432 case SPRN_IBAT4U
... SPRN_IBAT7L
:
433 case SPRN_DBAT0U
... SPRN_DBAT3L
:
434 case SPRN_DBAT4U
... SPRN_DBAT7L
:
436 struct kvmppc_bat
*bat
= kvmppc_find_bat(vcpu
, sprn
);
439 kvmppc_set_gpr(vcpu
, rt
, bat
->raw
>> 32);
441 kvmppc_set_gpr(vcpu
, rt
, bat
->raw
);
446 if (!spr_allowed(vcpu
, PRIV_HYPER
))
448 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->sdr1
);
451 kvmppc_set_gpr(vcpu
, rt
, vcpu
->arch
.shared
->dsisr
);
454 kvmppc_set_gpr(vcpu
, rt
, vcpu
->arch
.shared
->dar
);
457 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hior
);
460 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[0]);
463 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[1]);
466 case SPRN_HID2_GEKKO
:
467 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[2]);
470 case SPRN_HID4_GEKKO
:
471 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[4]);
474 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[5]);
478 kvmppc_set_gpr(vcpu
, rt
, 0);
488 kvmppc_set_gpr(vcpu
, rt
,
489 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
]);
497 case SPRN_MMCR0_GEKKO
:
498 case SPRN_MMCR1_GEKKO
:
499 case SPRN_PMC1_GEKKO
:
500 case SPRN_PMC2_GEKKO
:
501 case SPRN_PMC3_GEKKO
:
502 case SPRN_PMC4_GEKKO
:
503 case SPRN_WPAR_GEKKO
:
504 kvmppc_set_gpr(vcpu
, rt
, 0);
508 printk(KERN_INFO
"KVM: invalid SPR read: %d\n", sprn
);
510 emulated
= EMULATE_FAIL
;
518 u32
kvmppc_alignment_dsisr(struct kvm_vcpu
*vcpu
, unsigned int inst
)
523 * This is what the spec says about DSISR bits (not mentioned = 0):
525 * 12:13 [DS] Set to bits 30:31
526 * 15:16 [X] Set to bits 29:30
527 * 17 [X] Set to bit 25
528 * [D/DS] Set to bit 5
529 * 18:21 [X] Set to bits 21:24
530 * [D/DS] Set to bits 1:4
531 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
532 * 27:31 Set to bits 11:15 (RA)
535 switch (get_op(inst
)) {
541 dsisr
|= (inst
>> 12) & 0x4000; /* bit 17 */
542 dsisr
|= (inst
>> 17) & 0x3c00; /* bits 18:21 */
546 dsisr
|= (inst
<< 14) & 0x18000; /* bits 15:16 */
547 dsisr
|= (inst
<< 8) & 0x04000; /* bit 17 */
548 dsisr
|= (inst
<< 3) & 0x03c00; /* bits 18:21 */
551 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);
555 dsisr
|= (inst
>> 16) & 0x03ff; /* bits 22:31 */
560 ulong
kvmppc_alignment_dar(struct kvm_vcpu
*vcpu
, unsigned int inst
)
565 switch (get_op(inst
)) {
572 dar
= kvmppc_get_gpr(vcpu
, ra
);
573 dar
+= (s32
)((s16
)inst
);
578 dar
= kvmppc_get_gpr(vcpu
, ra
);
579 dar
+= kvmppc_get_gpr(vcpu
, get_rb(inst
));
582 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);