arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mmc/host.h>
  18 #include <linux/mmc/sh_mobile_sdhi.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/delay.h>
  21 #include <linux/smc91x.h>
  22 #include <linux/gpio.h>
  23 #include <linux/input.h>
  24 #include <linux/input/sh_keysc.h>
  25 #include <linux/usb/r8a66597.h>
  26 #include <linux/sh_eth.h>
  27 #include <linux/videodev2.h>
  28 #include <video/sh_mobile_lcdc.h>
  29 #include <media/sh_mobile_ceu.h>
  30 #include <sound/sh_fsi.h>
  31 #include <asm/io.h>
  32 #include <asm/heartbeat.h>
  33 #include <asm/clock.h>
  34 #include <asm/suspend.h>
  35 #include <cpu/sh7724.h>
  36 #include <mach-se/mach/se7724.h>
  37
  38 /*
  39  * SWx    1234 5678
  40  * ------------------------------------
  41  * SW31 : 1001 1100    : default
  42  * SW32 : 0111 1111    : use on board flash
  43  *
  44  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  45  *                          1 : Digital monitor
  46  *                      b = 0 : VGA
  47  *                          1 : 720p
  48  */
  49
  50 /*
  51  * about 720p
  52  *
  53  * When you use 1280 x 720 lcdc output,
  54  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  55  * and change SW41 to use 720p
  56  */
  57
  58 /*
  59  * about sound
  60  *
  61  * This setup.c supports FSI slave mode.
  62  * Please change J20, J21, J22 pin to 1-2 connection.
  63  */
  64
  65 /* Heartbeat */
  66 static struct resource heartbeat_resource = {
  67         .start  = PA_LED,
  68         .end    = PA_LED,
  69         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  70 };
  71
  72 static struct platform_device heartbeat_device = {
  73         .name           = "heartbeat",
  74         .id             = -1,
  75         .num_resources  = 1,
  76         .resource       = &heartbeat_resource,
  77 };
  78
  79 /* LAN91C111 */
  80 static struct smc91x_platdata smc91x_info = {
  81         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  82 };
  83
  84 static struct resource smc91x_eth_resources[] = {
  85         [0] = {
  86                 .name   = "SMC91C111" ,
  87                 .start  = 0x1a300300,
  88                 .end    = 0x1a30030f,
  89                 .flags  = IORESOURCE_MEM,
  90         },
  91         [1] = {
  92                 .start  = IRQ0_SMC,
  93                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  94         },
  95 };
  96
  97 static struct platform_device smc91x_eth_device = {
  98         .name   = "smc91x",
  99         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
 100         .resource       = smc91x_eth_resources,
 101         .dev    = {
 102                 .platform_data  = &smc91x_info,
 103         },
 104 };
 105
 106 /* MTD */
 107 static struct mtd_partition nor_flash_partitions[] = {
 108         {
 109                 .name = "uboot",
 110                 .offset = 0,
 111                 .size = (1 * 1024 * 1024),
 112                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 113         }, {
 114                 .name = "kernel",
 115                 .offset = MTDPART_OFS_APPEND,
 116                 .size = (2 * 1024 * 1024),
 117         }, {
 118                 .name = "free-area",
 119                 .offset = MTDPART_OFS_APPEND,
 120                 .size = MTDPART_SIZ_FULL,
 121         },
 122 };
 123
 124 static struct physmap_flash_data nor_flash_data = {
 125         .width          = 2,
 126         .parts          = nor_flash_partitions,
 127         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 128 };
 129
 130 static struct resource nor_flash_resources[] = {
 131         [0] = {
 132                 .name   = "NOR Flash",
 133                 .start  = 0x00000000,
 134                 .end    = 0x01ffffff,
 135                 .flags  = IORESOURCE_MEM,
 136         }
 137 };
 138
 139 static struct platform_device nor_flash_device = {
 140         .name           = "physmap-flash",
 141         .resource       = nor_flash_resources,
 142         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 143         .dev            = {
 144                 .platform_data = &nor_flash_data,
 145         },
 146 };
 147
 148 /* LCDC */
 149 static const struct fb_videomode lcdc_720p_modes[] = {
 150         {
 151                 .name           = "LB070WV1",
 152                 .sync           = 0, /* hsync and vsync are active low */
 153                 .xres           = 1280,
 154                 .yres           = 720,
 155                 .left_margin    = 220,
 156                 .right_margin   = 110,
 157                 .hsync_len      = 40,
 158                 .upper_margin   = 20,
 159                 .lower_margin   = 5,
 160                 .vsync_len      = 5,
 161         },
 162 };
 163
 164 static const struct fb_videomode lcdc_vga_modes[] = {
 165         {
 166                 .name           = "LB070WV1",
 167                 .sync           = 0, /* hsync and vsync are active low */
 168                 .xres           = 640,
 169                 .yres           = 480,
 170                 .left_margin    = 105,
 171                 .right_margin   = 50,
 172                 .hsync_len      = 96,
 173                 .upper_margin   = 33,
 174                 .lower_margin   = 10,
 175                 .vsync_len      = 2,
 176         },
 177 };
 178
 179 static struct sh_mobile_lcdc_info lcdc_info = {
 180         .clock_source = LCDC_CLK_EXTERNAL,
 181         .ch[0] = {
 182                 .chan = LCDC_CHAN_MAINLCD,
 183                 .fourcc = V4L2_PIX_FMT_RGB565,
 184                 .clock_divider = 1,
 185                 .lcd_size_cfg = { /* 7.0 inch */
 186                         .width = 152,
 187                         .height = 91,
 188                 },
 189                 .board_cfg = {
 190                 },
 191         }
 192 };
 193
 194 static struct resource lcdc_resources[] = {
 195         [0] = {
 196                 .name   = "LCDC",
 197                 .start  = 0xfe940000,
 198                 .end    = 0xfe942fff,
 199                 .flags  = IORESOURCE_MEM,
 200         },
 201         [1] = {
 202                 .start  = 106,
 203                 .flags  = IORESOURCE_IRQ,
 204         },
 205 };
 206
 207 static struct platform_device lcdc_device = {
 208         .name           = "sh_mobile_lcdc_fb",
 209         .num_resources  = ARRAY_SIZE(lcdc_resources),
 210         .resource       = lcdc_resources,
 211         .dev            = {
 212                 .platform_data  = &lcdc_info,
 213         },
 214 };
 215
 216 /* CEU0 */
 217 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 218         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 219 };
 220
 221 static struct resource ceu0_resources[] = {
 222         [0] = {
 223                 .name   = "CEU0",
 224                 .start  = 0xfe910000,
 225                 .end    = 0xfe91009f,
 226                 .flags  = IORESOURCE_MEM,
 227         },
 228         [1] = {
 229                 .start  = 52,
 230                 .flags  = IORESOURCE_IRQ,
 231         },
 232         [2] = {
 233                 /* place holder for contiguous memory */
 234         },
 235 };
 236
 237 static struct platform_device ceu0_device = {
 238         .name           = "sh_mobile_ceu",
 239         .id             = 0, /* "ceu0" clock */
 240         .num_resources  = ARRAY_SIZE(ceu0_resources),
 241         .resource       = ceu0_resources,
 242         .dev    = {
 243                 .platform_data  = &sh_mobile_ceu0_info,
 244         },
 245 };
 246
 247 /* CEU1 */
 248 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 249         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 250 };
 251
 252 static struct resource ceu1_resources[] = {
 253         [0] = {
 254                 .name   = "CEU1",
 255                 .start  = 0xfe914000,
 256                 .end    = 0xfe91409f,
 257                 .flags  = IORESOURCE_MEM,
 258         },
 259         [1] = {
 260                 .start  = 63,
 261                 .flags  = IORESOURCE_IRQ,
 262         },
 263         [2] = {
 264                 /* place holder for contiguous memory */
 265         },
 266 };
 267
 268 static struct platform_device ceu1_device = {
 269         .name           = "sh_mobile_ceu",
 270         .id             = 1, /* "ceu1" clock */
 271         .num_resources  = ARRAY_SIZE(ceu1_resources),
 272         .resource       = ceu1_resources,
 273         .dev    = {
 274                 .platform_data  = &sh_mobile_ceu1_info,
 275         },
 276 };
 277
 278 /* FSI */
 279 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 280 static struct sh_fsi_platform_info fsi_info = {
 281         .porta_flags = SH_FSI_BRS_INV,
 282 };
 283
 284 static struct resource fsi_resources[] = {
 285         [0] = {
 286                 .name   = "FSI",
 287                 .start  = 0xFE3C0000,
 288                 .end    = 0xFE3C021d,
 289                 .flags  = IORESOURCE_MEM,
 290         },
 291         [1] = {
 292                 .start  = 108,
 293                 .flags  = IORESOURCE_IRQ,
 294         },
 295 };
 296
 297 static struct platform_device fsi_device = {
 298         .name           = "sh_fsi",
 299         .id             = 0,
 300         .num_resources  = ARRAY_SIZE(fsi_resources),
 301         .resource       = fsi_resources,
 302         .dev    = {
 303                 .platform_data  = &fsi_info,
 304         },
 305 };
 306
 307 static struct fsi_ak4642_info fsi_ak4642_info = {
 308         .name           = "AK4642",
 309         .card           = "FSIA-AK4642",
 310         .cpu_dai        = "fsia-dai",
 311         .codec          = "ak4642-codec.0-0012",
 312         .platform       = "sh_fsi.0",
 313         .id             = FSI_PORT_A,
 314 };
 315
 316 static struct platform_device fsi_ak4642_device = {
 317         .name   = "fsi-ak4642-audio",
 318         .dev    = {
 319                 .platform_data  = &fsi_ak4642_info,
 320         },
 321 };
 322
 323 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 324 static struct sh_keysc_info keysc_info = {
 325         .mode = SH_KEYSC_MODE_1,
 326         .scan_timing = 3,
 327         .delay = 50,
 328         .keycodes = {
 329                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 330                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 331                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 332                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 333                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 334                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 335         },
 336 };
 337
 338 static struct resource keysc_resources[] = {
 339         [0] = {
 340                 .name   = "KEYSC",
 341                 .start  = 0x044b0000,
 342                 .end    = 0x044b000f,
 343                 .flags  = IORESOURCE_MEM,
 344         },
 345         [1] = {
 346                 .start  = 79,
 347                 .flags  = IORESOURCE_IRQ,
 348         },
 349 };
 350
 351 static struct platform_device keysc_device = {
 352         .name           = "sh_keysc",
 353         .id             = 0, /* "keysc0" clock */
 354         .num_resources  = ARRAY_SIZE(keysc_resources),
 355         .resource       = keysc_resources,
 356         .dev    = {
 357                 .platform_data  = &keysc_info,
 358         },
 359 };
 360
 361 /* SH Eth */
 362 static struct resource sh_eth_resources[] = {
 363         [0] = {
 364                 .start = SH_ETH_ADDR,
 365                 .end   = SH_ETH_ADDR + 0x1FC,
 366                 .flags = IORESOURCE_MEM,
 367         },
 368         [1] = {
 369                 .start = 91,
 370                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 371         },
 372 };
 373
 374 static struct sh_eth_plat_data sh_eth_plat = {
 375         .phy = 0x1f, /* SMSC LAN8187 */
 376         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 377 };
 378
 379 static struct platform_device sh_eth_device = {
 380         .name = "sh-eth",
 381         .id     = 0,
 382         .dev = {
 383                 .platform_data = &sh_eth_plat,
 384         },
 385         .num_resources = ARRAY_SIZE(sh_eth_resources),
 386         .resource = sh_eth_resources,
 387 };
 388
 389 static struct r8a66597_platdata sh7724_usb0_host_data = {
 390         .on_chip = 1,
 391 };
 392
 393 static struct resource sh7724_usb0_host_resources[] = {
 394         [0] = {
 395                 .start  = 0xa4d80000,
 396                 .end    = 0xa4d80124 - 1,
 397                 .flags  = IORESOURCE_MEM,
 398         },
 399         [1] = {
 400                 .start  = 65,
 401                 .end    = 65,
 402                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 403         },
 404 };
 405
 406 static struct platform_device sh7724_usb0_host_device = {
 407         .name           = "r8a66597_hcd",
 408         .id             = 0,
 409         .dev = {
 410                 .dma_mask               = NULL,         /*  not use dma */
 411                 .coherent_dma_mask      = 0xffffffff,
 412                 .platform_data          = &sh7724_usb0_host_data,
 413         },
 414         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 415         .resource       = sh7724_usb0_host_resources,
 416 };
 417
 418 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 419         .on_chip = 1,
 420 };
 421
 422 static struct resource sh7724_usb1_gadget_resources[] = {
 423         [0] = {
 424                 .start  = 0xa4d90000,
 425                 .end    = 0xa4d90123,
 426                 .flags  = IORESOURCE_MEM,
 427         },
 428         [1] = {
 429                 .start  = 66,
 430                 .end    = 66,
 431                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 432         },
 433 };
 434
 435 static struct platform_device sh7724_usb1_gadget_device = {
 436         .name           = "r8a66597_udc",
 437         .id             = 1, /* USB1 */
 438         .dev = {
 439                 .dma_mask               = NULL,         /*  not use dma */
 440                 .coherent_dma_mask      = 0xffffffff,
 441                 .platform_data          = &sh7724_usb1_gadget_data,
 442         },
 443         .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 444         .resource       = sh7724_usb1_gadget_resources,
 445 };
 446
 447 static struct resource sdhi0_cn7_resources[] = {
 448         [0] = {
 449                 .name   = "SDHI0",
 450                 .start  = 0x04ce0000,
 451                 .end    = 0x04ce00ff,
 452                 .flags  = IORESOURCE_MEM,
 453         },
 454         [1] = {
 455                 .start  = 100,
 456                 .flags  = IORESOURCE_IRQ,
 457         },
 458 };
 459
 460 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
 461         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
 462         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
 463         .tmio_caps      = MMC_CAP_SDIO_IRQ,
 464 };
 465
 466 static struct platform_device sdhi0_cn7_device = {
 467         .name           = "sh_mobile_sdhi",
 468         .id             = 0,
 469         .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 470         .resource       = sdhi0_cn7_resources,
 471         .dev = {
 472                 .platform_data  = &sh7724_sdhi0_data,
 473         },
 474 };
 475
 476 static struct resource sdhi1_cn8_resources[] = {
 477         [0] = {
 478                 .name   = "SDHI1",
 479                 .start  = 0x04cf0000,
 480                 .end    = 0x04cf00ff,
 481                 .flags  = IORESOURCE_MEM,
 482         },
 483         [1] = {
 484                 .start  = 23,
 485                 .flags  = IORESOURCE_IRQ,
 486         },
 487 };
 488
 489 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
 490         .dma_slave_tx   = SHDMA_SLAVE_SDHI1_TX,
 491         .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
 492         .tmio_caps      = MMC_CAP_SDIO_IRQ,
 493 };
 494
 495 static struct platform_device sdhi1_cn8_device = {
 496         .name           = "sh_mobile_sdhi",
 497         .id             = 1,
 498         .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 499         .resource       = sdhi1_cn8_resources,
 500         .dev = {
 501                 .platform_data  = &sh7724_sdhi1_data,
 502         },
 503 };
 504
 505 /* IrDA */
 506 static struct resource irda_resources[] = {
 507         [0] = {
 508                 .name   = "IrDA",
 509                 .start  = 0xA45D0000,
 510                 .end    = 0xA45D0049,
 511                 .flags  = IORESOURCE_MEM,
 512         },
 513         [1] = {
 514                 .start  = 20,
 515                 .flags  = IORESOURCE_IRQ,
 516         },
 517 };
 518
 519 static struct platform_device irda_device = {
 520         .name           = "sh_sir",
 521         .num_resources  = ARRAY_SIZE(irda_resources),
 522         .resource       = irda_resources,
 523 };
 524
 525 #include <media/ak881x.h>
 526 #include <media/sh_vou.h>
 527
 528 static struct ak881x_pdata ak881x_pdata = {
 529         .flags = AK881X_IF_MODE_SLAVE,
 530 };
 531
 532 static struct i2c_board_info ak8813 = {
 533         /* With open J18 jumper address is 0x21 */
 534         I2C_BOARD_INFO("ak8813", 0x20),
 535         .platform_data = &ak881x_pdata,
 536 };
 537
 538 static struct sh_vou_pdata sh_vou_pdata = {
 539         .bus_fmt        = SH_VOU_BUS_8BIT,
 540         .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
 541         .board_info     = &ak8813,
 542         .i2c_adap       = 0,
 543 };
 544
 545 static struct resource sh_vou_resources[] = {
 546         [0] = {
 547                 .start  = 0xfe960000,
 548                 .end    = 0xfe962043,
 549                 .flags  = IORESOURCE_MEM,
 550         },
 551         [1] = {
 552                 .start  = 55,
 553                 .flags  = IORESOURCE_IRQ,
 554         },
 555 };
 556
 557 static struct platform_device vou_device = {
 558         .name           = "sh-vou",
 559         .id             = -1,
 560         .num_resources  = ARRAY_SIZE(sh_vou_resources),
 561         .resource       = sh_vou_resources,
 562         .dev            = {
 563                 .platform_data  = &sh_vou_pdata,
 564         },
 565 };
 566
 567 static struct platform_device *ms7724se_devices[] __initdata = {
 568         &heartbeat_device,
 569         &smc91x_eth_device,
 570         &lcdc_device,
 571         &nor_flash_device,
 572         &ceu0_device,
 573         &ceu1_device,
 574         &keysc_device,
 575         &sh_eth_device,
 576         &sh7724_usb0_host_device,
 577         &sh7724_usb1_gadget_device,
 578         &fsi_device,
 579         &fsi_ak4642_device,
 580         &sdhi0_cn7_device,
 581         &sdhi1_cn8_device,
 582         &irda_device,
 583         &vou_device,
 584 };
 585
 586 /* I2C device */
 587 static struct i2c_board_info i2c0_devices[] = {
 588         {
 589                 I2C_BOARD_INFO("ak4642", 0x12),
 590         },
 591 };
 592
 593 #define EEPROM_OP   0xBA206000
 594 #define EEPROM_ADR  0xBA206004
 595 #define EEPROM_DATA 0xBA20600C
 596 #define EEPROM_STAT 0xBA206010
 597 #define EEPROM_STRT 0xBA206014
 598 static int __init sh_eth_is_eeprom_ready(void)
 599 {
 600         int t = 10000;
 601
 602         while (t--) {
 603                 if (!__raw_readw(EEPROM_STAT))
 604                         return 1;
 605                 udelay(1);
 606         }
 607
 608         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 609         return 0;
 610 }
 611
 612 static void __init sh_eth_init(void)
 613 {
 614         int i;
 615         u16 mac;
 616
 617         /* check EEPROM status */
 618         if (!sh_eth_is_eeprom_ready())
 619                 return;
 620
 621         /* read MAC addr from EEPROM */
 622         for (i = 0 ; i < 3 ; i++) {
 623                 __raw_writew(0x0, EEPROM_OP); /* read */
 624                 __raw_writew(i*2, EEPROM_ADR);
 625                 __raw_writew(0x1, EEPROM_STRT);
 626                 if (!sh_eth_is_eeprom_ready())
 627                         return;
 628
 629                 mac = __raw_readw(EEPROM_DATA);
 630                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 631                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 632         }
 633 }
 634
 635 #define SW4140    0xBA201000
 636 #define FPGA_OUT  0xBA200400
 637 #define PORT_HIZA 0xA4050158
 638 #define PORT_MSELCRB 0xA4050182
 639
 640 #define SW41_A    0x0100
 641 #define SW41_B    0x0200
 642 #define SW41_C    0x0400
 643 #define SW41_D    0x0800
 644 #define SW41_E    0x1000
 645 #define SW41_F    0x2000
 646 #define SW41_G    0x4000
 647 #define SW41_H    0x8000
 648
 649 extern char ms7724se_sdram_enter_start;
 650 extern char ms7724se_sdram_enter_end;
 651 extern char ms7724se_sdram_leave_start;
 652 extern char ms7724se_sdram_leave_end;
 653
 654
 655 static int __init arch_setup(void)
 656 {
 657         /* enable I2C device */
 658         i2c_register_board_info(0, i2c0_devices,
 659                                 ARRAY_SIZE(i2c0_devices));
 660         return 0;
 661 }
 662 arch_initcall(arch_setup);
 663
 664 static int __init devices_setup(void)
 665 {
 666         u16 sw = __raw_readw(SW4140); /* select camera, monitor */
 667         struct clk *clk;
 668         u16 fpga_out;
 669
 670         /* register board specific self-refresh code */
 671         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
 672                                         SUSP_SH_RSTANDBY,
 673                                         &ms7724se_sdram_enter_start,
 674                                         &ms7724se_sdram_enter_end,
 675                                         &ms7724se_sdram_leave_start,
 676                                         &ms7724se_sdram_leave_end);
 677         /* Reset Release */
 678         fpga_out = __raw_readw(FPGA_OUT);
 679         /* bit4: NTSC_PDN, bit5: NTSC_RESET */
 680         fpga_out &= ~((1 << 1)  | /* LAN */
 681                       (1 << 4)  | /* AK8813 PDN */
 682                       (1 << 5)  | /* AK8813 RESET */
 683                       (1 << 6)  | /* VIDEO DAC */
 684                       (1 << 7)  | /* AK4643 */
 685                       (1 << 8)  | /* IrDA */
 686                       (1 << 12) | /* USB0 */
 687                       (1 << 14)); /* RMII */
 688         __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
 689
 690         udelay(10);
 691
 692         /* AK8813 RESET */
 693         __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
 694
 695         udelay(10);
 696
 697         __raw_writew(fpga_out, FPGA_OUT);
 698
 699         /* turn on USB clocks, use external clock */
 700         __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 701
 702         /* Let LED9 show STATUS2 */
 703         gpio_request(GPIO_FN_STATUS2, NULL);
 704
 705         /* Lit LED10 show STATUS0 */
 706         gpio_request(GPIO_FN_STATUS0, NULL);
 707
 708         /* Lit LED11 show PDSTATUS */
 709         gpio_request(GPIO_FN_PDSTATUS, NULL);
 710
 711         /* enable USB0 port */
 712         __raw_writew(0x0600, 0xa40501d4);
 713
 714         /* enable USB1 port */
 715         __raw_writew(0x0600, 0xa4050192);
 716
 717         /* enable IRQ 0,1,2 */
 718         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 719         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 720         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 721
 722         /* enable SCIFA3 */
 723         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 724         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 725         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 726         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 727         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 728
 729         /* enable LCDC */
 730         gpio_request(GPIO_FN_LCDD23,   NULL);
 731         gpio_request(GPIO_FN_LCDD22,   NULL);
 732         gpio_request(GPIO_FN_LCDD21,   NULL);
 733         gpio_request(GPIO_FN_LCDD20,   NULL);
 734         gpio_request(GPIO_FN_LCDD19,   NULL);
 735         gpio_request(GPIO_FN_LCDD18,   NULL);
 736         gpio_request(GPIO_FN_LCDD17,   NULL);
 737         gpio_request(GPIO_FN_LCDD16,   NULL);
 738         gpio_request(GPIO_FN_LCDD15,   NULL);
 739         gpio_request(GPIO_FN_LCDD14,   NULL);
 740         gpio_request(GPIO_FN_LCDD13,   NULL);
 741         gpio_request(GPIO_FN_LCDD12,   NULL);
 742         gpio_request(GPIO_FN_LCDD11,   NULL);
 743         gpio_request(GPIO_FN_LCDD10,   NULL);
 744         gpio_request(GPIO_FN_LCDD9,    NULL);
 745         gpio_request(GPIO_FN_LCDD8,    NULL);
 746         gpio_request(GPIO_FN_LCDD7,    NULL);
 747         gpio_request(GPIO_FN_LCDD6,    NULL);
 748         gpio_request(GPIO_FN_LCDD5,    NULL);
 749         gpio_request(GPIO_FN_LCDD4,    NULL);
 750         gpio_request(GPIO_FN_LCDD3,    NULL);
 751         gpio_request(GPIO_FN_LCDD2,    NULL);
 752         gpio_request(GPIO_FN_LCDD1,    NULL);
 753         gpio_request(GPIO_FN_LCDD0,    NULL);
 754         gpio_request(GPIO_FN_LCDDISP,  NULL);
 755         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 756         gpio_request(GPIO_FN_LCDDCK,   NULL);
 757         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 758         gpio_request(GPIO_FN_LCDDON,   NULL);
 759         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 760         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 761         gpio_request(GPIO_FN_LCDRD,    NULL);
 762         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 763         __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 764
 765         /* enable CEU0 */
 766         gpio_request(GPIO_FN_VIO0_D15, NULL);
 767         gpio_request(GPIO_FN_VIO0_D14, NULL);
 768         gpio_request(GPIO_FN_VIO0_D13, NULL);
 769         gpio_request(GPIO_FN_VIO0_D12, NULL);
 770         gpio_request(GPIO_FN_VIO0_D11, NULL);
 771         gpio_request(GPIO_FN_VIO0_D10, NULL);
 772         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 773         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 774         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 775         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 776         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 777         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 778         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 779         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 780         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 781         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 782         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 783         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 784         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 785         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 786         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 787
 788         /* enable CEU1 */
 789         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 790         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 791         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 792         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 793         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 794         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 795         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 796         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 797         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 798         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 799         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 800         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 801         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 802
 803         /* KEYSC */
 804         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 805         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 806         gpio_request(GPIO_FN_KEYIN4,      NULL);
 807         gpio_request(GPIO_FN_KEYIN3,      NULL);
 808         gpio_request(GPIO_FN_KEYIN2,      NULL);
 809         gpio_request(GPIO_FN_KEYIN1,      NULL);
 810         gpio_request(GPIO_FN_KEYIN0,      NULL);
 811         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 812         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 813         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 814         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 815
 816         /* enable FSI */
 817         gpio_request(GPIO_FN_FSIMCKA,    NULL);
 818         gpio_request(GPIO_FN_FSIIASD,    NULL);
 819         gpio_request(GPIO_FN_FSIOASD,    NULL);
 820         gpio_request(GPIO_FN_FSIIABCK,   NULL);
 821         gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 822         gpio_request(GPIO_FN_FSIOABCK,   NULL);
 823         gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 824         gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 825
 826         /* set SPU2 clock to 83.4 MHz */
 827         clk = clk_get(NULL, "spu_clk");
 828         if (!IS_ERR(clk)) {
 829                 clk_set_rate(clk, clk_round_rate(clk, 83333333));
 830                 clk_put(clk);
 831         }
 832
 833         /* change parent of FSI A */
 834         clk = clk_get(NULL, "fsia_clk");
 835         if (!IS_ERR(clk)) {
 836                 /* 48kHz dummy clock was used to make sure 1/1 divide */
 837                 clk_set_rate(&sh7724_fsimcka_clk, 48000);
 838                 clk_set_parent(clk, &sh7724_fsimcka_clk);
 839                 clk_set_rate(clk, 48000);
 840                 clk_put(clk);
 841         }
 842
 843         /* SDHI0 connected to cn7 */
 844         gpio_request(GPIO_FN_SDHI0CD, NULL);
 845         gpio_request(GPIO_FN_SDHI0WP, NULL);
 846         gpio_request(GPIO_FN_SDHI0D3, NULL);
 847         gpio_request(GPIO_FN_SDHI0D2, NULL);
 848         gpio_request(GPIO_FN_SDHI0D1, NULL);
 849         gpio_request(GPIO_FN_SDHI0D0, NULL);
 850         gpio_request(GPIO_FN_SDHI0CMD, NULL);
 851         gpio_request(GPIO_FN_SDHI0CLK, NULL);
 852
 853         /* SDHI1 connected to cn8 */
 854         gpio_request(GPIO_FN_SDHI1CD, NULL);
 855         gpio_request(GPIO_FN_SDHI1WP, NULL);
 856         gpio_request(GPIO_FN_SDHI1D3, NULL);
 857         gpio_request(GPIO_FN_SDHI1D2, NULL);
 858         gpio_request(GPIO_FN_SDHI1D1, NULL);
 859         gpio_request(GPIO_FN_SDHI1D0, NULL);
 860         gpio_request(GPIO_FN_SDHI1CMD, NULL);
 861         gpio_request(GPIO_FN_SDHI1CLK, NULL);
 862
 863         /* enable IrDA */
 864         gpio_request(GPIO_FN_IRDA_OUT, NULL);
 865         gpio_request(GPIO_FN_IRDA_IN,  NULL);
 866
 867         /*
 868          * enable SH-Eth
 869          *
 870          * please remove J33 pin from your board !!
 871          *
 872          * ms7724 board should not use GPIO_FN_LNKSTA pin
 873          * So, This time PTX5 is set to input pin
 874          */
 875         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 876         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 877         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 878         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 879         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 880         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 881         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 882         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 883         gpio_request(GPIO_FN_MDIO,         NULL);
 884         gpio_request(GPIO_FN_MDC,          NULL);
 885         gpio_request(GPIO_PTX5, NULL);
 886         gpio_direction_input(GPIO_PTX5);
 887         sh_eth_init();
 888
 889         if (sw & SW41_B) {
 890                 /* 720p */
 891                 lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
 892                 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
 893         } else {
 894                 /* VGA */
 895                 lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
 896                 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
 897         }
 898
 899         if (sw & SW41_A) {
 900                 /* Digital monitor */
 901                 lcdc_info.ch[0].interface_type = RGB18;
 902                 lcdc_info.ch[0].flags          = 0;
 903         } else {
 904                 /* Analog monitor */
 905                 lcdc_info.ch[0].interface_type = RGB24;
 906                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 907         }
 908
 909         /* VOU */
 910         gpio_request(GPIO_FN_DV_D15, NULL);
 911         gpio_request(GPIO_FN_DV_D14, NULL);
 912         gpio_request(GPIO_FN_DV_D13, NULL);
 913         gpio_request(GPIO_FN_DV_D12, NULL);
 914         gpio_request(GPIO_FN_DV_D11, NULL);
 915         gpio_request(GPIO_FN_DV_D10, NULL);
 916         gpio_request(GPIO_FN_DV_D9, NULL);
 917         gpio_request(GPIO_FN_DV_D8, NULL);
 918         gpio_request(GPIO_FN_DV_CLKI, NULL);
 919         gpio_request(GPIO_FN_DV_CLK, NULL);
 920         gpio_request(GPIO_FN_DV_VSYNC, NULL);
 921         gpio_request(GPIO_FN_DV_HSYNC, NULL);
 922
 923         return platform_add_devices(ms7724se_devices,
 924                                     ARRAY_SIZE(ms7724se_devices));
 925 }
 926 device_initcall(devices_setup);
 927
 928 static struct sh_machine_vector mv_ms7724se __initmv = {
 929         .mv_name        = "ms7724se",
 930         .mv_init_irq    = init_se7724_IRQ,
 931         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 932 };