2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #ifndef _ASM_TILE_PCI_H
16 #define _ASM_TILE_PCI_H
18 #include <linux/pci.h>
19 #include <asm-generic/pci_iomap.h>
22 * Structure of a PCI controller (host bridge)
24 struct pci_controller
{
25 int index
; /* PCI domain number */
26 struct pci_bus
*root_bus
;
31 int hv_cfg_fd
[2]; /* config{0,1} fds for this PCIe controller */
32 int hv_mem_fd
; /* fd to Hypervisor for MMIO operations */
36 int irq_base
; /* Base IRQ from the Hypervisor */
37 int plx_gen1
; /* flag for PLX Gen 1 configuration */
39 /* Address ranges that are routed to this controller/bridge. */
40 struct resource mem_resources
[3];
44 * The hypervisor maps the entirety of CPA-space as bus addresses, so
45 * bus addresses are physical addresses. The networking and block
46 * device layers use this boolean for bounce buffer decisions.
48 #define PCI_DMA_BUS_IS_PHYS 1
50 int __devinit
tile_pci_init(void);
51 int __devinit
pcibios_init(void);
53 static inline void pci_iounmap(struct pci_dev
*dev
, void __iomem
*addr
) {}
55 void __devinit
pcibios_fixup_bus(struct pci_bus
*bus
);
57 #define TILE_NUM_PCIE 2
59 #define pci_domain_nr(bus) (((struct pci_controller *)(bus)->sysdata)->index)
62 * This decides whether to display the domain number in /proc.
64 static inline int pci_proc_domain(struct pci_bus
*bus
)
70 * pcibios_assign_all_busses() tells whether or not the bus numbers
71 * should be reassigned, in case the BIOS didn't do it correctly, or
72 * in case we don't have a BIOS and we want to let Linux do it.
74 static inline int pcibios_assign_all_busses(void)
79 #define PCIBIOS_MIN_MEM 0
80 #define PCIBIOS_MIN_IO 0
83 * This flag tells if the platform is TILEmpower that needs
84 * special configuration for the PLX switch chip.
86 extern int tile_plx_gen1
;
88 /* Use any cpu for PCI. */
89 #define cpumask_of_pcibus(bus) cpu_online_mask
91 /* implement the pci_ DMA API in terms of the generic device dma_ one */
92 #include <asm-generic/pci-dma-compat.h>
94 /* generic pci stuff */
95 #include <asm-generic/pci.h>
97 #endif /* _ASM_TILE_PCI_H */