arch/x86/include/asm/numachip/numachip_csr.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Numascale NumaConnect-Specific Header file
   7  *
   8  * Copyright (C) 2011 Numascale AS. All rights reserved.
   9  *
  10  * Send feedback to <support@numascale.com>
  11  *
  12  */
  13
  14 #ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
  15 #define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
  16
  17 #include <linux/numa.h>
  18 #include <linux/percpu.h>
  19 #include <linux/io.h>
  20 #include <linux/swab.h>
  21 #include <asm/types.h>
  22 #include <asm/processor.h>
  23
  24 #define CSR_NODE_SHIFT          16
  25 #define CSR_NODE_BITS(p)        (((unsigned long)(p)) << CSR_NODE_SHIFT)
  26 #define CSR_NODE_MASK           0x0fff          /* 4K nodes */
  27
  28 /* 32K CSR space, b15 indicates geo/non-geo */
  29 #define CSR_OFFSET_MASK 0x7fffUL
  30
  31 /* Global CSR space covers all 4K possible nodes with 64K CSR space per node */
  32 #define NUMACHIP_GCSR_BASE      0x3fff00000000ULL
  33 #define NUMACHIP_GCSR_LIM       0x3fff0fffffffULL
  34 #define NUMACHIP_GCSR_SIZE      (NUMACHIP_GCSR_LIM - NUMACHIP_GCSR_BASE + 1)
  35
  36 /*
  37  * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however
  38  * when using the direct mapping on x86_64, both start and size needs to be
  39  * aligned with PMD_SIZE which is 2M
  40  */
  41 #define NUMACHIP_LCSR_BASE      0x3ffffe000000ULL
  42 #define NUMACHIP_LCSR_LIM       0x3fffffffffffULL
  43 #define NUMACHIP_LCSR_SIZE      (NUMACHIP_LCSR_LIM - NUMACHIP_LCSR_BASE + 1)
  44
  45 static inline void *gcsr_address(int node, unsigned long offset)
  46 {
  47         return __va(NUMACHIP_GCSR_BASE | (1UL << 15) |
  48                 CSR_NODE_BITS(node & CSR_NODE_MASK) | (offset & CSR_OFFSET_MASK));
  49 }
  50
  51 static inline void *lcsr_address(unsigned long offset)
  52 {
  53         return __va(NUMACHIP_LCSR_BASE | (1UL << 15) |
  54                 CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK));
  55 }
  56
  57 static inline unsigned int read_gcsr(int node, unsigned long offset)
  58 {
  59         return swab32(readl(gcsr_address(node, offset)));
  60 }
  61
  62 static inline void write_gcsr(int node, unsigned long offset, unsigned int val)
  63 {
  64         writel(swab32(val), gcsr_address(node, offset));
  65 }
  66
  67 static inline unsigned int read_lcsr(unsigned long offset)
  68 {
  69         return swab32(readl(lcsr_address(offset)));
  70 }
  71
  72 static inline void write_lcsr(unsigned long offset, unsigned int val)
  73 {
  74         writel(swab32(val), lcsr_address(offset));
  75 }
  76
  77 /* ========================================================================= */
  78 /*                   CSR_G0_STATE_CLEAR                                      */
  79 /* ========================================================================= */
  80
  81 #define CSR_G0_STATE_CLEAR (0x000 + (0 << 12))
  82 union numachip_csr_g0_state_clear {
  83         unsigned int v;
  84         struct numachip_csr_g0_state_clear_s {
  85                 unsigned int _state:2;
  86                 unsigned int _rsvd_2_6:5;
  87                 unsigned int _lost:1;
  88                 unsigned int _rsvd_8_31:24;
  89         } s;
  90 };
  91
  92 /* ========================================================================= */
  93 /*                   CSR_G0_NODE_IDS                                         */
  94 /* ========================================================================= */
  95
  96 #define CSR_G0_NODE_IDS (0x008 + (0 << 12))
  97 union numachip_csr_g0_node_ids {
  98         unsigned int v;
  99         struct numachip_csr_g0_node_ids_s {
 100                 unsigned int _initialid:16;
 101                 unsigned int _nodeid:12;
 102                 unsigned int _rsvd_28_31:4;
 103         } s;
 104 };
 105
 106 /* ========================================================================= */
 107 /*                   CSR_G3_EXT_IRQ_GEN                                      */
 108 /* ========================================================================= */
 109
 110 #define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12))
 111 union numachip_csr_g3_ext_irq_gen {
 112         unsigned int v;
 113         struct numachip_csr_g3_ext_irq_gen_s {
 114                 unsigned int _vector:8;
 115                 unsigned int _msgtype:3;
 116                 unsigned int _index:5;
 117                 unsigned int _destination_apic_id:16;
 118         } s;
 119 };
 120
 121 /* ========================================================================= */
 122 /*                   CSR_G3_EXT_IRQ_STATUS                                   */
 123 /* ========================================================================= */
 124
 125 #define CSR_G3_EXT_IRQ_STATUS (0x034 + (3 << 12))
 126 union numachip_csr_g3_ext_irq_status {
 127         unsigned int v;
 128         struct numachip_csr_g3_ext_irq_status_s {
 129                 unsigned int _result:32;
 130         } s;
 131 };
 132
 133 /* ========================================================================= */
 134 /*                   CSR_G3_EXT_IRQ_DEST                                     */
 135 /* ========================================================================= */
 136
 137 #define CSR_G3_EXT_IRQ_DEST (0x038 + (3 << 12))
 138 union numachip_csr_g3_ext_irq_dest {
 139         unsigned int v;
 140         struct numachip_csr_g3_ext_irq_dest_s {
 141                 unsigned int _irq:8;
 142                 unsigned int _rsvd_8_31:24;
 143         } s;
 144 };
 145
 146 /* ========================================================================= */
 147 /*                   CSR_G3_NC_ATT_MAP_SELECT                                */
 148 /* ========================================================================= */
 149
 150 #define CSR_G3_NC_ATT_MAP_SELECT (0x7fc + (3 << 12))
 151 union numachip_csr_g3_nc_att_map_select {
 152         unsigned int v;
 153         struct numachip_csr_g3_nc_att_map_select_s {
 154                 unsigned int _upper_address_bits:4;
 155                 unsigned int _select_ram:4;
 156                 unsigned int _rsvd_8_31:24;
 157         } s;
 158 };
 159
 160 /* ========================================================================= */
 161 /*                   CSR_G3_NC_ATT_MAP_SELECT_0-255                          */
 162 /* ========================================================================= */
 163
 164 #define CSR_G3_NC_ATT_MAP_SELECT_0 (0x800 + (3 << 12))
 165
 166 #endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */
 167