drivers/cpufreq/speedstep-ich.c

   1 /*
   2  * (C) 2001  Dave Jones, Arjan van de ven.
   3  * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
   4  *
   5  *  Licensed under the terms of the GNU GPL License version 2.
   6  *  Based upon reverse engineered information, and on Intel documentation
   7  *  for chipsets ICH2-M and ICH3-M.
   8  *
   9  *  Many thanks to Ducrot Bruno for finding and fixing the last
  10  *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11  *  for extensive testing.
  12  *
  13  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14  */
  15
  16
  17 /*********************************************************************
  18  *                        SPEEDSTEP - DEFINITIONS                    *
  19  *********************************************************************/
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/pci.h>
  26 #include <linux/sched.h>
  27
  28 #include "speedstep-lib.h"
  29
  30
  31 /* speedstep_chipset:
  32  *   It is necessary to know which chipset is used. As accesses to
  33  * this device occur at various places in this module, we need a
  34  * static struct pci_dev * pointing to that device.
  35  */
  36 static struct pci_dev *speedstep_chipset_dev;
  37
  38
  39 /* speedstep_processor
  40  */
  41 static enum speedstep_processor speedstep_processor;
  42
  43 static u32 pmbase;
  44
  45 /*
  46  *   There are only two frequency states for each processor. Values
  47  * are in kHz for the time being.
  48  */
  49 static struct cpufreq_frequency_table speedstep_freqs[] = {
  50         {SPEEDSTEP_HIGH,        0},
  51         {SPEEDSTEP_LOW,         0},
  52         {0,                     CPUFREQ_TABLE_END},
  53 };
  54
  55
  56 /**
  57  * speedstep_find_register - read the PMBASE address
  58  *
  59  * Returns: -ENODEV if no register could be found
  60  */
  61 static int speedstep_find_register(void)
  62 {
  63         if (!speedstep_chipset_dev)
  64                 return -ENODEV;
  65
  66         /* get PMBASE */
  67         pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  68         if (!(pmbase & 0x01)) {
  69                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  70                 return -ENODEV;
  71         }
  72
  73         pmbase &= 0xFFFFFFFE;
  74         if (!pmbase) {
  75                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  76                 return -ENODEV;
  77         }
  78
  79         pr_debug("pmbase is 0x%x\n", pmbase);
  80         return 0;
  81 }
  82
  83 /**
  84  * speedstep_set_state - set the SpeedStep state
  85  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  86  *
  87  *   Tries to change the SpeedStep state.  Can be called from
  88  *   smp_call_function_single.
  89  */
  90 static void speedstep_set_state(unsigned int state)
  91 {
  92         u8 pm2_blk;
  93         u8 value;
  94         unsigned long flags;
  95
  96         if (state > 0x1)
  97                 return;
  98
  99         /* Disable IRQs */
 100         local_irq_save(flags);
 101
 102         /* read state */
 103         value = inb(pmbase + 0x50);
 104
 105         pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 106
 107         /* write new state */
 108         value &= 0xFE;
 109         value |= state;
 110
 111         pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
 112
 113         /* Disable bus master arbitration */
 114         pm2_blk = inb(pmbase + 0x20);
 115         pm2_blk |= 0x01;
 116         outb(pm2_blk, (pmbase + 0x20));
 117
 118         /* Actual transition */
 119         outb(value, (pmbase + 0x50));
 120
 121         /* Restore bus master arbitration */
 122         pm2_blk &= 0xfe;
 123         outb(pm2_blk, (pmbase + 0x20));
 124
 125         /* check if transition was successful */
 126         value = inb(pmbase + 0x50);
 127
 128         /* Enable IRQs */
 129         local_irq_restore(flags);
 130
 131         pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 132
 133         if (state == (value & 0x1))
 134                 pr_debug("change to %u MHz succeeded\n",
 135                         speedstep_get_frequency(speedstep_processor) / 1000);
 136         else
 137                 printk(KERN_ERR "cpufreq: change failed - I/O error\n");
 138
 139         return;
 140 }
 141
 142 /* Wrapper for smp_call_function_single. */
 143 static void _speedstep_set_state(void *_state)
 144 {
 145         speedstep_set_state(*(unsigned int *)_state);
 146 }
 147
 148 /**
 149  * speedstep_activate - activate SpeedStep control in the chipset
 150  *
 151  *   Tries to activate the SpeedStep status and control registers.
 152  * Returns -EINVAL on an unsupported chipset, and zero on success.
 153  */
 154 static int speedstep_activate(void)
 155 {
 156         u16 value = 0;
 157
 158         if (!speedstep_chipset_dev)
 159                 return -EINVAL;
 160
 161         pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
 162         if (!(value & 0x08)) {
 163                 value |= 0x08;
 164                 pr_debug("activating SpeedStep (TM) registers\n");
 165                 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
 166         }
 167
 168         return 0;
 169 }
 170
 171
 172 /**
 173  * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 174  *
 175  *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 176  * the LPC bridge / PM module which contains all power-management
 177  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 178  * chipset, or zero on failure.
 179  */
 180 static unsigned int speedstep_detect_chipset(void)
 181 {
 182         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 183                               PCI_DEVICE_ID_INTEL_82801DB_12,
 184                               PCI_ANY_ID, PCI_ANY_ID,
 185                               NULL);
 186         if (speedstep_chipset_dev)
 187                 return 4; /* 4-M */
 188
 189         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 190                               PCI_DEVICE_ID_INTEL_82801CA_12,
 191                               PCI_ANY_ID, PCI_ANY_ID,
 192                               NULL);
 193         if (speedstep_chipset_dev)
 194                 return 3; /* 3-M */
 195
 196
 197         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 198                               PCI_DEVICE_ID_INTEL_82801BA_10,
 199                               PCI_ANY_ID, PCI_ANY_ID,
 200                               NULL);
 201         if (speedstep_chipset_dev) {
 202                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
 203                  * 8100 which use a pretty old revision of the 82815
 204                  * host brige. Abort on these systems.
 205                  */
 206                 static struct pci_dev *hostbridge;
 207
 208                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 209                               PCI_DEVICE_ID_INTEL_82815_MC,
 210                               PCI_ANY_ID, PCI_ANY_ID,
 211                               NULL);
 212
 213                 if (!hostbridge)
 214                         return 2; /* 2-M */
 215
 216                 if (hostbridge->revision < 5) {
 217                         pr_debug("hostbridge does not support speedstep\n");
 218                         speedstep_chipset_dev = NULL;
 219                         pci_dev_put(hostbridge);
 220                         return 0;
 221                 }
 222
 223                 pci_dev_put(hostbridge);
 224                 return 2; /* 2-M */
 225         }
 226
 227         return 0;
 228 }
 229
 230 static void get_freq_data(void *_speed)
 231 {
 232         unsigned int *speed = _speed;
 233
 234         *speed = speedstep_get_frequency(speedstep_processor);
 235 }
 236
 237 static unsigned int speedstep_get(unsigned int cpu)
 238 {
 239         unsigned int speed;
 240
 241         /* You're supposed to ensure CPU is online. */
 242         if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
 243                 BUG();
 244
 245         pr_debug("detected %u kHz as current frequency\n", speed);
 246         return speed;
 247 }
 248
 249 /**
 250  * speedstep_target - set a new CPUFreq policy
 251  * @policy: new policy
 252  * @target_freq: the target frequency
 253  * @relation: how that frequency relates to achieved frequency
 254  *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 255  *
 256  * Sets a new CPUFreq policy.
 257  */
 258 static int speedstep_target(struct cpufreq_policy *policy,
 259                              unsigned int target_freq,
 260                              unsigned int relation)
 261 {
 262         unsigned int newstate = 0, policy_cpu;
 263         struct cpufreq_freqs freqs;
 264         int i;
 265
 266         if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
 267                                 target_freq, relation, &newstate))
 268                 return -EINVAL;
 269
 270         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 271         freqs.old = speedstep_get(policy_cpu);
 272         freqs.new = speedstep_freqs[newstate].frequency;
 273         freqs.cpu = policy->cpu;
 274
 275         pr_debug("transiting from %u to %u kHz\n", freqs.old, freqs.new);
 276
 277         /* no transition necessary */
 278         if (freqs.old == freqs.new)
 279                 return 0;
 280
 281         for_each_cpu(i, policy->cpus) {
 282                 freqs.cpu = i;
 283                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 284         }
 285
 286         smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
 287                                  true);
 288
 289         for_each_cpu(i, policy->cpus) {
 290                 freqs.cpu = i;
 291                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 292         }
 293
 294         return 0;
 295 }
 296
 297
 298 /**
 299  * speedstep_verify - verifies a new CPUFreq policy
 300  * @policy: new policy
 301  *
 302  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 303  * at least one border included.
 304  */
 305 static int speedstep_verify(struct cpufreq_policy *policy)
 306 {
 307         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 308 }
 309
 310 struct get_freqs {
 311         struct cpufreq_policy *policy;
 312         int ret;
 313 };
 314
 315 static void get_freqs_on_cpu(void *_get_freqs)
 316 {
 317         struct get_freqs *get_freqs = _get_freqs;
 318
 319         get_freqs->ret =
 320                 speedstep_get_freqs(speedstep_processor,
 321                             &speedstep_freqs[SPEEDSTEP_LOW].frequency,
 322                             &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
 323                             &get_freqs->policy->cpuinfo.transition_latency,
 324                             &speedstep_set_state);
 325 }
 326
 327 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 328 {
 329         int result;
 330         unsigned int policy_cpu, speed;
 331         struct get_freqs gf;
 332
 333         /* only run on CPU to be set, or on its sibling */
 334 #ifdef CONFIG_SMP
 335         cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
 336 #endif
 337         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 338
 339         /* detect low and high frequency and transition latency */
 340         gf.policy = policy;
 341         smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
 342         if (gf.ret)
 343                 return gf.ret;
 344
 345         /* get current speed setting */
 346         speed = speedstep_get(policy_cpu);
 347         if (!speed)
 348                 return -EIO;
 349
 350         pr_debug("currently at %s speed setting - %i MHz\n",
 351                 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
 352                 ? "low" : "high",
 353                 (speed / 1000));
 354
 355         /* cpuinfo and default policy values */
 356         policy->cur = speed;
 357
 358         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
 359         if (result)
 360                 return result;
 361
 362         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 363
 364         return 0;
 365 }
 366
 367
 368 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
 369 {
 370         cpufreq_frequency_table_put_attr(policy->cpu);
 371         return 0;
 372 }
 373
 374 static struct freq_attr *speedstep_attr[] = {
 375         &cpufreq_freq_attr_scaling_available_freqs,
 376         NULL,
 377 };
 378
 379
 380 static struct cpufreq_driver speedstep_driver = {
 381         .name   = "speedstep-ich",
 382         .verify = speedstep_verify,
 383         .target = speedstep_target,
 384         .init   = speedstep_cpu_init,
 385         .exit   = speedstep_cpu_exit,
 386         .get    = speedstep_get,
 387         .owner  = THIS_MODULE,
 388         .attr   = speedstep_attr,
 389 };
 390
 391
 392 /**
 393  * speedstep_init - initializes the SpeedStep CPUFreq driver
 394  *
 395  *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 396  * devices, -EINVAL on problems during initiatization, and zero on
 397  * success.
 398  */
 399 static int __init speedstep_init(void)
 400 {
 401         /* detect processor */
 402         speedstep_processor = speedstep_detect_processor();
 403         if (!speedstep_processor) {
 404                 pr_debug("Intel(R) SpeedStep(TM) capable processor "
 405                                 "not found\n");
 406                 return -ENODEV;
 407         }
 408
 409         /* detect chipset */
 410         if (!speedstep_detect_chipset()) {
 411                 pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
 412                                 "(yet) available.\n");
 413                 return -ENODEV;
 414         }
 415
 416         /* activate speedstep support */
 417         if (speedstep_activate()) {
 418                 pci_dev_put(speedstep_chipset_dev);
 419                 return -EINVAL;
 420         }
 421
 422         if (speedstep_find_register())
 423                 return -ENODEV;
 424
 425         return cpufreq_register_driver(&speedstep_driver);
 426 }
 427
 428
 429 /**
 430  * speedstep_exit - unregisters SpeedStep support
 431  *
 432  *   Unregisters SpeedStep support.
 433  */
 434 static void __exit speedstep_exit(void)
 435 {
 436         pci_dev_put(speedstep_chipset_dev);
 437         cpufreq_unregister_driver(&speedstep_driver);
 438 }
 439
 440
 441 MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
 442                 "Dominik Brodowski <linux@brodo.de>");
 443 MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
 444                 "with ICH-M southbridges.");
 445 MODULE_LICENSE("GPL");
 446
 447 module_init(speedstep_init);
 448 module_exit(speedstep_exit);