Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / gpu / drm / gma500 / cdv_intel_crt.c
blobc100f3e9c9207cbf38359a5df9fdf3d8a1bd0b3d
1 /*
2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <drm/drmP.h>
30 #include "intel_bios.h"
31 #include "psb_drv.h"
32 #include "psb_intel_drv.h"
33 #include "psb_intel_reg.h"
34 #include "power.h"
35 #include <linux/pm_runtime.h>
38 static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
40 struct drm_device *dev = encoder->dev;
41 u32 temp, reg;
42 reg = ADPA;
44 temp = REG_READ(reg);
45 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
46 temp &= ~ADPA_DAC_ENABLE;
48 switch (mode) {
49 case DRM_MODE_DPMS_ON:
50 temp |= ADPA_DAC_ENABLE;
51 break;
52 case DRM_MODE_DPMS_STANDBY:
53 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
54 break;
55 case DRM_MODE_DPMS_SUSPEND:
56 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
57 break;
58 case DRM_MODE_DPMS_OFF:
59 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
60 break;
63 REG_WRITE(reg, temp);
66 static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
67 struct drm_display_mode *mode)
69 struct drm_psb_private *dev_priv = connector->dev->dev_private;
70 int max_clock = 0;
71 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
72 return MODE_NO_DBLESCAN;
74 /* The lowest clock for CDV is 20000KHz */
75 if (mode->clock < 20000)
76 return MODE_CLOCK_LOW;
78 /* The max clock for CDV is 355 instead of 400 */
79 max_clock = 355000;
80 if (mode->clock > max_clock)
81 return MODE_CLOCK_HIGH;
83 if (mode->hdisplay > 1680 || mode->vdisplay > 1050)
84 return MODE_PANEL;
86 /* We assume worst case scenario of 32 bpp here, since we don't know */
87 if ((ALIGN(mode->hdisplay * 4, 64) * mode->vdisplay) >
88 dev_priv->vram_stolen_size)
89 return MODE_MEM;
91 return MODE_OK;
94 static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
95 struct drm_display_mode *mode,
96 struct drm_display_mode *adjusted_mode)
98 return true;
101 static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
102 struct drm_display_mode *mode,
103 struct drm_display_mode *adjusted_mode)
106 struct drm_device *dev = encoder->dev;
107 struct drm_crtc *crtc = encoder->crtc;
108 struct psb_intel_crtc *psb_intel_crtc =
109 to_psb_intel_crtc(crtc);
110 int dpll_md_reg;
111 u32 adpa, dpll_md;
112 u32 adpa_reg;
114 if (psb_intel_crtc->pipe == 0)
115 dpll_md_reg = DPLL_A_MD;
116 else
117 dpll_md_reg = DPLL_B_MD;
119 adpa_reg = ADPA;
122 * Disable separate mode multiplier used when cloning SDVO to CRT
123 * XXX this needs to be adjusted when we really are cloning
126 dpll_md = REG_READ(dpll_md_reg);
127 REG_WRITE(dpll_md_reg,
128 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
131 adpa = 0;
132 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
133 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
134 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
135 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
137 if (psb_intel_crtc->pipe == 0)
138 adpa |= ADPA_PIPE_A_SELECT;
139 else
140 adpa |= ADPA_PIPE_B_SELECT;
142 REG_WRITE(adpa_reg, adpa);
147 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
149 * \return true if CRT is connected.
150 * \return false if CRT is disconnected.
152 static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
153 bool force)
155 struct drm_device *dev = connector->dev;
156 u32 hotplug_en;
157 int i, tries = 0, ret = false;
158 u32 adpa_orig;
160 /* disable the DAC when doing the hotplug detection */
162 adpa_orig = REG_READ(ADPA);
164 REG_WRITE(ADPA, adpa_orig & ~(ADPA_DAC_ENABLE));
167 * On a CDV thep, CRT detect sequence need to be done twice
168 * to get a reliable result.
170 tries = 2;
172 hotplug_en = REG_READ(PORT_HOTPLUG_EN);
173 hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
174 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
176 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
177 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
179 for (i = 0; i < tries ; i++) {
180 unsigned long timeout;
181 /* turn on the FORCE_DETECT */
182 REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
183 timeout = jiffies + msecs_to_jiffies(1000);
184 /* wait for FORCE_DETECT to go off */
185 do {
186 if (!(REG_READ(PORT_HOTPLUG_EN) &
187 CRT_HOTPLUG_FORCE_DETECT))
188 break;
189 msleep(1);
190 } while (time_after(timeout, jiffies));
193 if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
194 CRT_HOTPLUG_MONITOR_NONE)
195 ret = true;
197 /* Restore the saved ADPA */
198 REG_WRITE(ADPA, adpa_orig);
199 return ret;
202 static enum drm_connector_status cdv_intel_crt_detect(
203 struct drm_connector *connector, bool force)
205 if (cdv_intel_crt_detect_hotplug(connector, force))
206 return connector_status_connected;
207 else
208 return connector_status_disconnected;
211 static void cdv_intel_crt_destroy(struct drm_connector *connector)
213 struct psb_intel_encoder *psb_intel_encoder =
214 psb_intel_attached_encoder(connector);
216 psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
217 drm_sysfs_connector_remove(connector);
218 drm_connector_cleanup(connector);
219 kfree(connector);
222 static int cdv_intel_crt_get_modes(struct drm_connector *connector)
224 struct psb_intel_encoder *psb_intel_encoder =
225 psb_intel_attached_encoder(connector);
226 return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter);
229 static int cdv_intel_crt_set_property(struct drm_connector *connector,
230 struct drm_property *property,
231 uint64_t value)
233 return 0;
237 * Routines for controlling stuff on the analog port
240 static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
241 .dpms = cdv_intel_crt_dpms,
242 .mode_fixup = cdv_intel_crt_mode_fixup,
243 .prepare = psb_intel_encoder_prepare,
244 .commit = psb_intel_encoder_commit,
245 .mode_set = cdv_intel_crt_mode_set,
248 static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
249 .dpms = drm_helper_connector_dpms,
250 .detect = cdv_intel_crt_detect,
251 .fill_modes = drm_helper_probe_single_connector_modes,
252 .destroy = cdv_intel_crt_destroy,
253 .set_property = cdv_intel_crt_set_property,
256 static const struct drm_connector_helper_funcs
257 cdv_intel_crt_connector_helper_funcs = {
258 .mode_valid = cdv_intel_crt_mode_valid,
259 .get_modes = cdv_intel_crt_get_modes,
260 .best_encoder = psb_intel_best_encoder,
263 static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
265 drm_encoder_cleanup(encoder);
268 static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
269 .destroy = cdv_intel_crt_enc_destroy,
272 void cdv_intel_crt_init(struct drm_device *dev,
273 struct psb_intel_mode_device *mode_dev)
276 struct psb_intel_connector *psb_intel_connector;
277 struct psb_intel_encoder *psb_intel_encoder;
278 struct drm_connector *connector;
279 struct drm_encoder *encoder;
281 u32 i2c_reg;
283 psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
284 if (!psb_intel_encoder)
285 return;
287 psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
288 if (!psb_intel_connector)
289 goto failed_connector;
291 connector = &psb_intel_connector->base;
292 drm_connector_init(dev, connector,
293 &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
295 encoder = &psb_intel_encoder->base;
296 drm_encoder_init(dev, encoder,
297 &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
299 psb_intel_connector_attach_encoder(psb_intel_connector,
300 psb_intel_encoder);
302 /* Set up the DDC bus. */
303 i2c_reg = GPIOA;
304 /* Remove the following code for CDV */
306 if (dev_priv->crt_ddc_bus != 0)
307 i2c_reg = dev_priv->crt_ddc_bus;
309 psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
310 i2c_reg, "CRTDDC_A");
311 if (!psb_intel_encoder->ddc_bus) {
312 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
313 "failed.\n");
314 goto failed_ddc;
317 psb_intel_encoder->type = INTEL_OUTPUT_ANALOG;
319 psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
320 psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
322 connector->interlace_allowed = 0;
323 connector->doublescan_allowed = 0;
325 drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
326 drm_connector_helper_add(connector,
327 &cdv_intel_crt_connector_helper_funcs);
329 drm_sysfs_connector_add(connector);
331 return;
332 failed_ddc:
333 drm_encoder_cleanup(&psb_intel_encoder->base);
334 drm_connector_cleanup(&psb_intel_connector->base);
335 kfree(psb_intel_connector);
336 failed_connector:
337 kfree(psb_intel_encoder);
338 return;