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Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blob8eddccaf1f105ffe17e18cc67dd224cff449ad39
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 int sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
102 /**
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* This is for current tv format name */
118 int tv_format_index;
119
120 /**
121 * This is set if we treat the device as HDMI, instead of DVI.
122 */
123 bool is_hdmi;
124 bool has_hdmi_monitor;
125 bool has_hdmi_audio;
126
127 /**
128 * This is set if we detect output of sdvo device as LVDS and
129 * have a valid fixed mode to use with the panel.
130 */
131 bool is_lvds;
132
133 /**
134 * This is sdvo fixed pannel mode pointer
135 */
136 struct drm_display_mode *sdvo_lvds_fixed_mode;
137
138 /* DDC bus used by this SDVO encoder */
139 uint8_t ddc_bus;
140
141 /* Input timings for adjusted_mode */
142 struct intel_sdvo_dtd input_dtd;
143 };
144
145 struct intel_sdvo_connector {
146 struct intel_connector base;
147
148 /* Mark the type of connector */
149 uint16_t output_flag;
150
151 int force_audio;
152
153 /* This contains all current supported TV format */
154 u8 tv_format_supported[TV_FORMAT_NUM];
155 int format_supported_num;
156 struct drm_property *tv_format;
157
158 /* add the property for the SDVO-TV */
159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
174 struct drm_property *dot_crawl;
175
176 /* add the property for the SDVO-TV/LVDS */
177 struct drm_property *brightness;
178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
181
182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
196 u32 cur_dot_crawl, max_dot_crawl;
197 };
198
199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 {
201 return container_of(encoder, struct intel_sdvo, base.base);
202 }
203
204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 {
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208 }
209
210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 {
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213 }
214
215 static bool
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 static bool
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221 static bool
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
224
225 /**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 {
232 struct drm_device *dev = intel_sdvo->base.base.dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 bval = val, cval = val;
235 int i;
236
237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
240 return;
241 }
242
243 if (intel_sdvo->sdvo_reg == SDVOB) {
244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264 struct i2c_msg msgs[] = {
265 {
266 .addr = intel_sdvo->slave_addr,
267 .flags = 0,
268 .len = 1,
269 .buf = &addr,
270 },
271 {
272 .addr = intel_sdvo->slave_addr,
273 .flags = I2C_M_RD,
274 .len = 1,
275 .buf = ch,
276 }
277 };
278 int ret;
279
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281 return true;
282
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284 return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290 u8 cmd;
291 const char *name;
292 } sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
407 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
408
409 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
410 const void *args, int args_len)
411 {
412 int i;
413
414 DRM_DEBUG_KMS("%s: W: %02X ",
415 SDVO_NAME(intel_sdvo), cmd);
416 for (i = 0; i < args_len; i++)
417 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
418 for (; i < 8; i++)
419 DRM_LOG_KMS(" ");
420 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
421 if (cmd == sdvo_cmd_names[i].cmd) {
422 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
423 break;
424 }
425 }
426 if (i == ARRAY_SIZE(sdvo_cmd_names))
427 DRM_LOG_KMS("(%02X)", cmd);
428 DRM_LOG_KMS("\n");
429 }
430
431 static const char *cmd_status_names[] = {
432 "Power on",
433 "Success",
434 "Not supported",
435 "Invalid arg",
436 "Pending",
437 "Target not specified",
438 "Scaling not supported"
439 };
440
441 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
442 const void *args, int args_len)
443 {
444 u8 buf[args_len*2 + 2], status;
445 struct i2c_msg msgs[args_len + 3];
446 int i, ret;
447
448 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
449
450 for (i = 0; i < args_len; i++) {
451 msgs[i].addr = intel_sdvo->slave_addr;
452 msgs[i].flags = 0;
453 msgs[i].len = 2;
454 msgs[i].buf = buf + 2 *i;
455 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
456 buf[2*i + 1] = ((u8*)args)[i];
457 }
458 msgs[i].addr = intel_sdvo->slave_addr;
459 msgs[i].flags = 0;
460 msgs[i].len = 2;
461 msgs[i].buf = buf + 2*i;
462 buf[2*i + 0] = SDVO_I2C_OPCODE;
463 buf[2*i + 1] = cmd;
464
465 /* the following two are to read the response */
466 status = SDVO_I2C_CMD_STATUS;
467 msgs[i+1].addr = intel_sdvo->slave_addr;
468 msgs[i+1].flags = 0;
469 msgs[i+1].len = 1;
470 msgs[i+1].buf = &status;
471
472 msgs[i+2].addr = intel_sdvo->slave_addr;
473 msgs[i+2].flags = I2C_M_RD;
474 msgs[i+2].len = 1;
475 msgs[i+2].buf = &status;
476
477 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
478 if (ret < 0) {
479 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
480 return false;
481 }
482 if (ret != i+3) {
483 /* failure in I2C transfer */
484 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
485 return false;
486 }
487
488 return true;
489 }
490
491 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
492 void *response, int response_len)
493 {
494 u8 retry = 5;
495 u8 status;
496 int i;
497
498 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
499
500 /*
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
505 *
506 * Check 5 times in case the hardware failed to read the docs.
507 */
508 if (!intel_sdvo_read_byte(intel_sdvo,
509 SDVO_I2C_CMD_STATUS,
510 &status))
511 goto log_fail;
512
513 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
514 udelay(15);
515 if (!intel_sdvo_read_byte(intel_sdvo,
516 SDVO_I2C_CMD_STATUS,
517 &status))
518 goto log_fail;
519 }
520
521 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
522 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
523 else
524 DRM_LOG_KMS("(??? %d)", status);
525
526 if (status != SDVO_CMD_STATUS_SUCCESS)
527 goto log_fail;
528
529 /* Read the command response */
530 for (i = 0; i < response_len; i++) {
531 if (!intel_sdvo_read_byte(intel_sdvo,
532 SDVO_I2C_RETURN_0 + i,
533 &((u8 *)response)[i]))
534 goto log_fail;
535 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
536 }
537 DRM_LOG_KMS("\n");
538 return true;
539
540 log_fail:
541 DRM_LOG_KMS("... failed\n");
542 return false;
543 }
544
545 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
546 {
547 if (mode->clock >= 100000)
548 return 1;
549 else if (mode->clock >= 50000)
550 return 2;
551 else
552 return 4;
553 }
554
555 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
556 u8 ddc_bus)
557 {
558 /* This must be the immediately preceding write before the i2c xfer */
559 return intel_sdvo_write_cmd(intel_sdvo,
560 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
561 &ddc_bus, 1);
562 }
563
564 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
565 {
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
567 return false;
568
569 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
570 }
571
572 static bool
573 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
574 {
575 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
576 return false;
577
578 return intel_sdvo_read_response(intel_sdvo, value, len);
579 }
580
581 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
582 {
583 struct intel_sdvo_set_target_input_args targets = {0};
584 return intel_sdvo_set_value(intel_sdvo,
585 SDVO_CMD_SET_TARGET_INPUT,
586 &targets, sizeof(targets));
587 }
588
589 /**
590 * Return whether each input is trained.
591 *
592 * This function is making an assumption about the layout of the response,
593 * which should be checked against the docs.
594 */
595 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
596 {
597 struct intel_sdvo_get_trained_inputs_response response;
598
599 BUILD_BUG_ON(sizeof(response) != 1);
600 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
601 &response, sizeof(response)))
602 return false;
603
604 *input_1 = response.input0_trained;
605 *input_2 = response.input1_trained;
606 return true;
607 }
608
609 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
610 u16 outputs)
611 {
612 return intel_sdvo_set_value(intel_sdvo,
613 SDVO_CMD_SET_ACTIVE_OUTPUTS,
614 &outputs, sizeof(outputs));
615 }
616
617 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
618 int mode)
619 {
620 u8 state = SDVO_ENCODER_STATE_ON;
621
622 switch (mode) {
623 case DRM_MODE_DPMS_ON:
624 state = SDVO_ENCODER_STATE_ON;
625 break;
626 case DRM_MODE_DPMS_STANDBY:
627 state = SDVO_ENCODER_STATE_STANDBY;
628 break;
629 case DRM_MODE_DPMS_SUSPEND:
630 state = SDVO_ENCODER_STATE_SUSPEND;
631 break;
632 case DRM_MODE_DPMS_OFF:
633 state = SDVO_ENCODER_STATE_OFF;
634 break;
635 }
636
637 return intel_sdvo_set_value(intel_sdvo,
638 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
639 }
640
641 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
642 int *clock_min,
643 int *clock_max)
644 {
645 struct intel_sdvo_pixel_clock_range clocks;
646
647 BUILD_BUG_ON(sizeof(clocks) != 4);
648 if (!intel_sdvo_get_value(intel_sdvo,
649 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
650 &clocks, sizeof(clocks)))
651 return false;
652
653 /* Convert the values from units of 10 kHz to kHz. */
654 *clock_min = clocks.min * 10;
655 *clock_max = clocks.max * 10;
656 return true;
657 }
658
659 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
660 u16 outputs)
661 {
662 return intel_sdvo_set_value(intel_sdvo,
663 SDVO_CMD_SET_TARGET_OUTPUT,
664 &outputs, sizeof(outputs));
665 }
666
667 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
668 struct intel_sdvo_dtd *dtd)
669 {
670 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
671 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
672 }
673
674 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
675 struct intel_sdvo_dtd *dtd)
676 {
677 return intel_sdvo_set_timing(intel_sdvo,
678 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
679 }
680
681 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
682 struct intel_sdvo_dtd *dtd)
683 {
684 return intel_sdvo_set_timing(intel_sdvo,
685 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
686 }
687
688 static bool
689 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
690 uint16_t clock,
691 uint16_t width,
692 uint16_t height)
693 {
694 struct intel_sdvo_preferred_input_timing_args args;
695
696 memset(&args, 0, sizeof(args));
697 args.clock = clock;
698 args.width = width;
699 args.height = height;
700 args.interlace = 0;
701
702 if (intel_sdvo->is_lvds &&
703 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
704 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
705 args.scaled = 1;
706
707 return intel_sdvo_set_value(intel_sdvo,
708 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
709 &args, sizeof(args));
710 }
711
712 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
713 struct intel_sdvo_dtd *dtd)
714 {
715 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
716 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
717 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
718 &dtd->part1, sizeof(dtd->part1)) &&
719 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
720 &dtd->part2, sizeof(dtd->part2));
721 }
722
723 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
724 {
725 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
726 }
727
728 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
729 const struct drm_display_mode *mode)
730 {
731 uint16_t width, height;
732 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
733 uint16_t h_sync_offset, v_sync_offset;
734 int mode_clock;
735
736 width = mode->crtc_hdisplay;
737 height = mode->crtc_vdisplay;
738
739 /* do some mode translations */
740 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
741 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
742
743 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
744 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
745
746 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
747 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
748
749 mode_clock = mode->clock;
750 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
751 mode_clock /= 10;
752 dtd->part1.clock = mode_clock;
753
754 dtd->part1.h_active = width & 0xff;
755 dtd->part1.h_blank = h_blank_len & 0xff;
756 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
757 ((h_blank_len >> 8) & 0xf);
758 dtd->part1.v_active = height & 0xff;
759 dtd->part1.v_blank = v_blank_len & 0xff;
760 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
761 ((v_blank_len >> 8) & 0xf);
762
763 dtd->part2.h_sync_off = h_sync_offset & 0xff;
764 dtd->part2.h_sync_width = h_sync_len & 0xff;
765 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
766 (v_sync_len & 0xf);
767 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
768 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
769 ((v_sync_len & 0x30) >> 4);
770
771 dtd->part2.dtd_flags = 0x18;
772 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
773 dtd->part2.dtd_flags |= 0x2;
774 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
775 dtd->part2.dtd_flags |= 0x4;
776
777 dtd->part2.sdvo_flags = 0;
778 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
779 dtd->part2.reserved = 0;
780 }
781
782 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
783 const struct intel_sdvo_dtd *dtd)
784 {
785 mode->hdisplay = dtd->part1.h_active;
786 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
787 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
788 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
789 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
790 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
791 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
792 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
793
794 mode->vdisplay = dtd->part1.v_active;
795 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
796 mode->vsync_start = mode->vdisplay;
797 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
798 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
799 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
800 mode->vsync_end = mode->vsync_start +
801 (dtd->part2.v_sync_off_width & 0xf);
802 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
803 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
804 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
805
806 mode->clock = dtd->part1.clock * 10;
807
808 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
809 if (dtd->part2.dtd_flags & 0x2)
810 mode->flags |= DRM_MODE_FLAG_PHSYNC;
811 if (dtd->part2.dtd_flags & 0x4)
812 mode->flags |= DRM_MODE_FLAG_PVSYNC;
813 }
814
815 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
816 {
817 struct intel_sdvo_encode encode;
818
819 BUILD_BUG_ON(sizeof(encode) != 2);
820 return intel_sdvo_get_value(intel_sdvo,
821 SDVO_CMD_GET_SUPP_ENCODE,
822 &encode, sizeof(encode));
823 }
824
825 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
826 uint8_t mode)
827 {
828 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
829 }
830
831 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
832 uint8_t mode)
833 {
834 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
835 }
836
837 #if 0
838 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
839 {
840 int i, j;
841 uint8_t set_buf_index[2];
842 uint8_t av_split;
843 uint8_t buf_size;
844 uint8_t buf[48];
845 uint8_t *pos;
846
847 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
848
849 for (i = 0; i <= av_split; i++) {
850 set_buf_index[0] = i; set_buf_index[1] = 0;
851 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
852 set_buf_index, 2);
853 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
854 intel_sdvo_read_response(encoder, &buf_size, 1);
855
856 pos = buf;
857 for (j = 0; j <= buf_size; j += 8) {
858 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
859 NULL, 0);
860 intel_sdvo_read_response(encoder, pos, 8);
861 pos += 8;
862 }
863 }
864 }
865 #endif
866
867 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
868 {
869 struct dip_infoframe avi_if = {
870 .type = DIP_TYPE_AVI,
871 .ver = DIP_VERSION_AVI,
872 .len = DIP_LEN_AVI,
873 };
874 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
875 uint8_t set_buf_index[2] = { 1, 0 };
876 uint64_t *data = (uint64_t *)&avi_if;
877 unsigned i;
878
879 intel_dip_infoframe_csum(&avi_if);
880
881 if (!intel_sdvo_set_value(intel_sdvo,
882 SDVO_CMD_SET_HBUF_INDEX,
883 set_buf_index, 2))
884 return false;
885
886 for (i = 0; i < sizeof(avi_if); i += 8) {
887 if (!intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_HBUF_DATA,
889 data, 8))
890 return false;
891 data++;
892 }
893
894 return intel_sdvo_set_value(intel_sdvo,
895 SDVO_CMD_SET_HBUF_TXRATE,
896 &tx_rate, 1);
897 }
898
899 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
900 {
901 struct intel_sdvo_tv_format format;
902 uint32_t format_map;
903
904 format_map = 1 << intel_sdvo->tv_format_index;
905 memset(&format, 0, sizeof(format));
906 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
907
908 BUILD_BUG_ON(sizeof(format) != 6);
909 return intel_sdvo_set_value(intel_sdvo,
910 SDVO_CMD_SET_TV_FORMAT,
911 &format, sizeof(format));
912 }
913
914 static bool
915 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
916 struct drm_display_mode *mode)
917 {
918 struct intel_sdvo_dtd output_dtd;
919
920 if (!intel_sdvo_set_target_output(intel_sdvo,
921 intel_sdvo->attached_output))
922 return false;
923
924 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
925 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
926 return false;
927
928 return true;
929 }
930
931 static bool
932 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
933 struct drm_display_mode *mode,
934 struct drm_display_mode *adjusted_mode)
935 {
936 /* Reset the input timing to the screen. Assume always input 0. */
937 if (!intel_sdvo_set_target_input(intel_sdvo))
938 return false;
939
940 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
941 mode->clock / 10,
942 mode->hdisplay,
943 mode->vdisplay))
944 return false;
945
946 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
947 &intel_sdvo->input_dtd))
948 return false;
949
950 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
951
952 drm_mode_set_crtcinfo(adjusted_mode, 0);
953 return true;
954 }
955
956 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
957 struct drm_display_mode *mode,
958 struct drm_display_mode *adjusted_mode)
959 {
960 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
961 int multiplier;
962
963 /* We need to construct preferred input timings based on our
964 * output timings. To do that, we have to set the output
965 * timings, even though this isn't really the right place in
966 * the sequence to do it. Oh well.
967 */
968 if (intel_sdvo->is_tv) {
969 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
970 return false;
971
972 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
973 mode,
974 adjusted_mode);
975 } else if (intel_sdvo->is_lvds) {
976 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
977 intel_sdvo->sdvo_lvds_fixed_mode))
978 return false;
979
980 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
981 mode,
982 adjusted_mode);
983 }
984
985 /* Make the CRTC code factor in the SDVO pixel multiplier. The
986 * SDVO device will factor out the multiplier during mode_set.
987 */
988 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
989 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
990
991 return true;
992 }
993
994 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
995 struct drm_display_mode *mode,
996 struct drm_display_mode *adjusted_mode)
997 {
998 struct drm_device *dev = encoder->dev;
999 struct drm_i915_private *dev_priv = dev->dev_private;
1000 struct drm_crtc *crtc = encoder->crtc;
1001 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1002 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1003 u32 sdvox;
1004 struct intel_sdvo_in_out_map in_out;
1005 struct intel_sdvo_dtd input_dtd, output_dtd;
1006 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1007 int rate;
1008
1009 if (!mode)
1010 return;
1011
1012 /* First, set the input mapping for the first input to our controlled
1013 * output. This is only correct if we're a single-input device, in
1014 * which case the first input is the output from the appropriate SDVO
1015 * channel on the motherboard. In a two-input device, the first input
1016 * will be SDVOB and the second SDVOC.
1017 */
1018 in_out.in0 = intel_sdvo->attached_output;
1019 in_out.in1 = 0;
1020
1021 intel_sdvo_set_value(intel_sdvo,
1022 SDVO_CMD_SET_IN_OUT_MAP,
1023 &in_out, sizeof(in_out));
1024
1025 /* Set the output timings to the screen */
1026 if (!intel_sdvo_set_target_output(intel_sdvo,
1027 intel_sdvo->attached_output))
1028 return;
1029
1030 /* lvds has a special fixed output timing. */
1031 if (intel_sdvo->is_lvds)
1032 intel_sdvo_get_dtd_from_mode(&output_dtd,
1033 intel_sdvo->sdvo_lvds_fixed_mode);
1034 else
1035 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1036 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1037
1038 /* Set the input timing to the screen. Assume always input 0. */
1039 if (!intel_sdvo_set_target_input(intel_sdvo))
1040 return;
1041
1042 if (intel_sdvo->has_hdmi_monitor) {
1043 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1044 intel_sdvo_set_colorimetry(intel_sdvo,
1045 SDVO_COLORIMETRY_RGB256);
1046 intel_sdvo_set_avi_infoframe(intel_sdvo);
1047 } else
1048 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1049
1050 if (intel_sdvo->is_tv &&
1051 !intel_sdvo_set_tv_format(intel_sdvo))
1052 return;
1053
1054 /* We have tried to get input timing in mode_fixup, and filled into
1055 * adjusted_mode.
1056 */
1057 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1058 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1059
1060 switch (pixel_multiplier) {
1061 default:
1062 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1063 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1064 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1065 }
1066 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1067 return;
1068
1069 /* Set the SDVO control regs. */
1070 if (INTEL_INFO(dev)->gen >= 4) {
1071 /* The real mode polarity is set by the SDVO commands, using
1072 * struct intel_sdvo_dtd. */
1073 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1074 if (intel_sdvo->is_hdmi)
1075 sdvox |= intel_sdvo->color_range;
1076 if (INTEL_INFO(dev)->gen < 5)
1077 sdvox |= SDVO_BORDER_ENABLE;
1078 } else {
1079 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1080 switch (intel_sdvo->sdvo_reg) {
1081 case SDVOB:
1082 sdvox &= SDVOB_PRESERVE_MASK;
1083 break;
1084 case SDVOC:
1085 sdvox &= SDVOC_PRESERVE_MASK;
1086 break;
1087 }
1088 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1089 }
1090
1091 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1092 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1093 else
1094 sdvox |= TRANSCODER(intel_crtc->pipe);
1095
1096 if (intel_sdvo->has_hdmi_audio)
1097 sdvox |= SDVO_AUDIO_ENABLE;
1098
1099 if (INTEL_INFO(dev)->gen >= 4) {
1100 /* done in crtc_mode_set as the dpll_md reg must be written early */
1101 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1102 /* done in crtc_mode_set as it lives inside the dpll register */
1103 } else {
1104 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1105 }
1106
1107 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1108 INTEL_INFO(dev)->gen < 5)
1109 sdvox |= SDVO_STALL_SELECT;
1110 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1111 }
1112
1113 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1114 {
1115 struct drm_device *dev = encoder->dev;
1116 struct drm_i915_private *dev_priv = dev->dev_private;
1117 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1118 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1119 u32 temp;
1120
1121 if (mode != DRM_MODE_DPMS_ON) {
1122 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1123 if (0)
1124 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1125
1126 if (mode == DRM_MODE_DPMS_OFF) {
1127 temp = I915_READ(intel_sdvo->sdvo_reg);
1128 if ((temp & SDVO_ENABLE) != 0) {
1129 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1130 }
1131 }
1132 } else {
1133 bool input1, input2;
1134 int i;
1135 u8 status;
1136
1137 temp = I915_READ(intel_sdvo->sdvo_reg);
1138 if ((temp & SDVO_ENABLE) == 0)
1139 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1140 for (i = 0; i < 2; i++)
1141 intel_wait_for_vblank(dev, intel_crtc->pipe);
1142
1143 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1144 /* Warn if the device reported failure to sync.
1145 * A lot of SDVO devices fail to notify of sync, but it's
1146 * a given it the status is a success, we succeeded.
1147 */
1148 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1149 DRM_DEBUG_KMS("First %s output reported failure to "
1150 "sync\n", SDVO_NAME(intel_sdvo));
1151 }
1152
1153 if (0)
1154 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1155 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1156 }
1157 return;
1158 }
1159
1160 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1161 struct drm_display_mode *mode)
1162 {
1163 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1164
1165 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1166 return MODE_NO_DBLESCAN;
1167
1168 if (intel_sdvo->pixel_clock_min > mode->clock)
1169 return MODE_CLOCK_LOW;
1170
1171 if (intel_sdvo->pixel_clock_max < mode->clock)
1172 return MODE_CLOCK_HIGH;
1173
1174 if (intel_sdvo->is_lvds) {
1175 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1176 return MODE_PANEL;
1177
1178 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1179 return MODE_PANEL;
1180 }
1181
1182 return MODE_OK;
1183 }
1184
1185 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1186 {
1187 BUILD_BUG_ON(sizeof(*caps) != 8);
1188 if (!intel_sdvo_get_value(intel_sdvo,
1189 SDVO_CMD_GET_DEVICE_CAPS,
1190 caps, sizeof(*caps)))
1191 return false;
1192
1193 DRM_DEBUG_KMS("SDVO capabilities:\n"
1194 " vendor_id: %d\n"
1195 " device_id: %d\n"
1196 " device_rev_id: %d\n"
1197 " sdvo_version_major: %d\n"
1198 " sdvo_version_minor: %d\n"
1199 " sdvo_inputs_mask: %d\n"
1200 " smooth_scaling: %d\n"
1201 " sharp_scaling: %d\n"
1202 " up_scaling: %d\n"
1203 " down_scaling: %d\n"
1204 " stall_support: %d\n"
1205 " output_flags: %d\n",
1206 caps->vendor_id,
1207 caps->device_id,
1208 caps->device_rev_id,
1209 caps->sdvo_version_major,
1210 caps->sdvo_version_minor,
1211 caps->sdvo_inputs_mask,
1212 caps->smooth_scaling,
1213 caps->sharp_scaling,
1214 caps->up_scaling,
1215 caps->down_scaling,
1216 caps->stall_support,
1217 caps->output_flags);
1218
1219 return true;
1220 }
1221
1222 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1223 {
1224 struct drm_device *dev = intel_sdvo->base.base.dev;
1225 u8 response[2];
1226
1227 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1228 * on the line. */
1229 if (IS_I945G(dev) || IS_I945GM(dev))
1230 return false;
1231
1232 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1233 &response, 2) && response[0];
1234 }
1235
1236 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1237 {
1238 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1239
1240 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1241 }
1242
1243 static bool
1244 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1245 {
1246 /* Is there more than one type of output? */
1247 return hweight16(intel_sdvo->caps.output_flags) > 1;
1248 }
1249
1250 static struct edid *
1251 intel_sdvo_get_edid(struct drm_connector *connector)
1252 {
1253 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1254 return drm_get_edid(connector, &sdvo->ddc);
1255 }
1256
1257 /* Mac mini hack -- use the same DDC as the analog connector */
1258 static struct edid *
1259 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1260 {
1261 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1262
1263 return drm_get_edid(connector,
1264 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1265 }
1266
1267 enum drm_connector_status
1268 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1269 {
1270 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1271 enum drm_connector_status status;
1272 struct edid *edid;
1273
1274 edid = intel_sdvo_get_edid(connector);
1275
1276 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1277 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1278
1279 /*
1280 * Don't use the 1 as the argument of DDC bus switch to get
1281 * the EDID. It is used for SDVO SPD ROM.
1282 */
1283 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1284 intel_sdvo->ddc_bus = ddc;
1285 edid = intel_sdvo_get_edid(connector);
1286 if (edid)
1287 break;
1288 }
1289 /*
1290 * If we found the EDID on the other bus,
1291 * assume that is the correct DDC bus.
1292 */
1293 if (edid == NULL)
1294 intel_sdvo->ddc_bus = saved_ddc;
1295 }
1296
1297 /*
1298 * When there is no edid and no monitor is connected with VGA
1299 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1300 */
1301 if (edid == NULL)
1302 edid = intel_sdvo_get_analog_edid(connector);
1303
1304 status = connector_status_unknown;
1305 if (edid != NULL) {
1306 /* DDC bus is shared, match EDID to connector type */
1307 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1308 status = connector_status_connected;
1309 if (intel_sdvo->is_hdmi) {
1310 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1311 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1312 }
1313 } else
1314 status = connector_status_disconnected;
1315 connector->display_info.raw_edid = NULL;
1316 kfree(edid);
1317 }
1318
1319 if (status == connector_status_connected) {
1320 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1321 if (intel_sdvo_connector->force_audio)
1322 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1323 }
1324
1325 return status;
1326 }
1327
1328 static bool
1329 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1330 struct edid *edid)
1331 {
1332 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1333 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1334
1335 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1336 connector_is_digital, monitor_is_digital);
1337 return connector_is_digital == monitor_is_digital;
1338 }
1339
1340 static enum drm_connector_status
1341 intel_sdvo_detect(struct drm_connector *connector, bool force)
1342 {
1343 uint16_t response;
1344 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1345 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1346 enum drm_connector_status ret;
1347
1348 if (!intel_sdvo_write_cmd(intel_sdvo,
1349 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1350 return connector_status_unknown;
1351
1352 /* add 30ms delay when the output type might be TV */
1353 if (intel_sdvo->caps.output_flags &
1354 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1355 mdelay(30);
1356
1357 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1358 return connector_status_unknown;
1359
1360 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1361 response & 0xff, response >> 8,
1362 intel_sdvo_connector->output_flag);
1363
1364 if (response == 0)
1365 return connector_status_disconnected;
1366
1367 intel_sdvo->attached_output = response;
1368
1369 intel_sdvo->has_hdmi_monitor = false;
1370 intel_sdvo->has_hdmi_audio = false;
1371
1372 if ((intel_sdvo_connector->output_flag & response) == 0)
1373 ret = connector_status_disconnected;
1374 else if (IS_TMDS(intel_sdvo_connector))
1375 ret = intel_sdvo_tmds_sink_detect(connector);
1376 else {
1377 struct edid *edid;
1378
1379 /* if we have an edid check it matches the connection */
1380 edid = intel_sdvo_get_edid(connector);
1381 if (edid == NULL)
1382 edid = intel_sdvo_get_analog_edid(connector);
1383 if (edid != NULL) {
1384 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1385 edid))
1386 ret = connector_status_connected;
1387 else
1388 ret = connector_status_disconnected;
1389
1390 connector->display_info.raw_edid = NULL;
1391 kfree(edid);
1392 } else
1393 ret = connector_status_connected;
1394 }
1395
1396 /* May update encoder flag for like clock for SDVO TV, etc.*/
1397 if (ret == connector_status_connected) {
1398 intel_sdvo->is_tv = false;
1399 intel_sdvo->is_lvds = false;
1400 intel_sdvo->base.needs_tv_clock = false;
1401
1402 if (response & SDVO_TV_MASK) {
1403 intel_sdvo->is_tv = true;
1404 intel_sdvo->base.needs_tv_clock = true;
1405 }
1406 if (response & SDVO_LVDS_MASK)
1407 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1408 }
1409
1410 return ret;
1411 }
1412
1413 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1414 {
1415 struct edid *edid;
1416
1417 /* set the bus switch and get the modes */
1418 edid = intel_sdvo_get_edid(connector);
1419
1420 /*
1421 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1422 * link between analog and digital outputs. So, if the regular SDVO
1423 * DDC fails, check to see if the analog output is disconnected, in
1424 * which case we'll look there for the digital DDC data.
1425 */
1426 if (edid == NULL)
1427 edid = intel_sdvo_get_analog_edid(connector);
1428
1429 if (edid != NULL) {
1430 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1431 edid)) {
1432 drm_mode_connector_update_edid_property(connector, edid);
1433 drm_add_edid_modes(connector, edid);
1434 }
1435
1436 connector->display_info.raw_edid = NULL;
1437 kfree(edid);
1438 }
1439 }
1440
1441 /*
1442 * Set of SDVO TV modes.
1443 * Note! This is in reply order (see loop in get_tv_modes).
1444 * XXX: all 60Hz refresh?
1445 */
1446 static const struct drm_display_mode sdvo_tv_modes[] = {
1447 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1448 416, 0, 200, 201, 232, 233, 0,
1449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1451 416, 0, 240, 241, 272, 273, 0,
1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1453 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1454 496, 0, 300, 301, 332, 333, 0,
1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1457 736, 0, 350, 351, 382, 383, 0,
1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1459 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1460 736, 0, 400, 401, 432, 433, 0,
1461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1462 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1463 736, 0, 480, 481, 512, 513, 0,
1464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1465 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1466 800, 0, 480, 481, 512, 513, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1469 800, 0, 576, 577, 608, 609, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1472 816, 0, 350, 351, 382, 383, 0,
1473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1474 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1475 816, 0, 400, 401, 432, 433, 0,
1476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1478 816, 0, 480, 481, 512, 513, 0,
1479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1481 816, 0, 540, 541, 572, 573, 0,
1482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1484 816, 0, 576, 577, 608, 609, 0,
1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1487 864, 0, 576, 577, 608, 609, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1490 896, 0, 600, 601, 632, 633, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1493 928, 0, 624, 625, 656, 657, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1496 1016, 0, 766, 767, 798, 799, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1499 1120, 0, 768, 769, 800, 801, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1502 1376, 0, 1024, 1025, 1056, 1057, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 };
1505
1506 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1507 {
1508 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1509 struct intel_sdvo_sdtv_resolution_request tv_res;
1510 uint32_t reply = 0, format_map = 0;
1511 int i;
1512
1513 /* Read the list of supported input resolutions for the selected TV
1514 * format.
1515 */
1516 format_map = 1 << intel_sdvo->tv_format_index;
1517 memcpy(&tv_res, &format_map,
1518 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1519
1520 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1521 return;
1522
1523 BUILD_BUG_ON(sizeof(tv_res) != 3);
1524 if (!intel_sdvo_write_cmd(intel_sdvo,
1525 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1526 &tv_res, sizeof(tv_res)))
1527 return;
1528 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1529 return;
1530
1531 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1532 if (reply & (1 << i)) {
1533 struct drm_display_mode *nmode;
1534 nmode = drm_mode_duplicate(connector->dev,
1535 &sdvo_tv_modes[i]);
1536 if (nmode)
1537 drm_mode_probed_add(connector, nmode);
1538 }
1539 }
1540
1541 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1542 {
1543 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1544 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1545 struct drm_display_mode *newmode;
1546
1547 /*
1548 * Attempt to get the mode list from DDC.
1549 * Assume that the preferred modes are
1550 * arranged in priority order.
1551 */
1552 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1553 if (list_empty(&connector->probed_modes) == false)
1554 goto end;
1555
1556 /* Fetch modes from VBT */
1557 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1558 newmode = drm_mode_duplicate(connector->dev,
1559 dev_priv->sdvo_lvds_vbt_mode);
1560 if (newmode != NULL) {
1561 /* Guarantee the mode is preferred */
1562 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1563 DRM_MODE_TYPE_DRIVER);
1564 drm_mode_probed_add(connector, newmode);
1565 }
1566 }
1567
1568 end:
1569 list_for_each_entry(newmode, &connector->probed_modes, head) {
1570 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1571 intel_sdvo->sdvo_lvds_fixed_mode =
1572 drm_mode_duplicate(connector->dev, newmode);
1573
1574 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1575 0);
1576
1577 intel_sdvo->is_lvds = true;
1578 break;
1579 }
1580 }
1581
1582 }
1583
1584 static int intel_sdvo_get_modes(struct drm_connector *connector)
1585 {
1586 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1587
1588 if (IS_TV(intel_sdvo_connector))
1589 intel_sdvo_get_tv_modes(connector);
1590 else if (IS_LVDS(intel_sdvo_connector))
1591 intel_sdvo_get_lvds_modes(connector);
1592 else
1593 intel_sdvo_get_ddc_modes(connector);
1594
1595 return !list_empty(&connector->probed_modes);
1596 }
1597
1598 static void
1599 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1600 {
1601 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1602 struct drm_device *dev = connector->dev;
1603
1604 if (intel_sdvo_connector->left)
1605 drm_property_destroy(dev, intel_sdvo_connector->left);
1606 if (intel_sdvo_connector->right)
1607 drm_property_destroy(dev, intel_sdvo_connector->right);
1608 if (intel_sdvo_connector->top)
1609 drm_property_destroy(dev, intel_sdvo_connector->top);
1610 if (intel_sdvo_connector->bottom)
1611 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1612 if (intel_sdvo_connector->hpos)
1613 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1614 if (intel_sdvo_connector->vpos)
1615 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1616 if (intel_sdvo_connector->saturation)
1617 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1618 if (intel_sdvo_connector->contrast)
1619 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1620 if (intel_sdvo_connector->hue)
1621 drm_property_destroy(dev, intel_sdvo_connector->hue);
1622 if (intel_sdvo_connector->sharpness)
1623 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1624 if (intel_sdvo_connector->flicker_filter)
1625 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1626 if (intel_sdvo_connector->flicker_filter_2d)
1627 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1628 if (intel_sdvo_connector->flicker_filter_adaptive)
1629 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1630 if (intel_sdvo_connector->tv_luma_filter)
1631 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1632 if (intel_sdvo_connector->tv_chroma_filter)
1633 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1634 if (intel_sdvo_connector->dot_crawl)
1635 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1636 if (intel_sdvo_connector->brightness)
1637 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1638 }
1639
1640 static void intel_sdvo_destroy(struct drm_connector *connector)
1641 {
1642 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1643
1644 if (intel_sdvo_connector->tv_format)
1645 drm_property_destroy(connector->dev,
1646 intel_sdvo_connector->tv_format);
1647
1648 intel_sdvo_destroy_enhance_property(connector);
1649 drm_sysfs_connector_remove(connector);
1650 drm_connector_cleanup(connector);
1651 kfree(connector);
1652 }
1653
1654 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1655 {
1656 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1657 struct edid *edid;
1658 bool has_audio = false;
1659
1660 if (!intel_sdvo->is_hdmi)
1661 return false;
1662
1663 edid = intel_sdvo_get_edid(connector);
1664 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1665 has_audio = drm_detect_monitor_audio(edid);
1666
1667 return has_audio;
1668 }
1669
1670 static int
1671 intel_sdvo_set_property(struct drm_connector *connector,
1672 struct drm_property *property,
1673 uint64_t val)
1674 {
1675 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1676 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1677 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1678 uint16_t temp_value;
1679 uint8_t cmd;
1680 int ret;
1681
1682 ret = drm_connector_property_set_value(connector, property, val);
1683 if (ret)
1684 return ret;
1685
1686 if (property == dev_priv->force_audio_property) {
1687 int i = val;
1688 bool has_audio;
1689
1690 if (i == intel_sdvo_connector->force_audio)
1691 return 0;
1692
1693 intel_sdvo_connector->force_audio = i;
1694
1695 if (i == 0)
1696 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1697 else
1698 has_audio = i > 0;
1699
1700 if (has_audio == intel_sdvo->has_hdmi_audio)
1701 return 0;
1702
1703 intel_sdvo->has_hdmi_audio = has_audio;
1704 goto done;
1705 }
1706
1707 if (property == dev_priv->broadcast_rgb_property) {
1708 if (val == !!intel_sdvo->color_range)
1709 return 0;
1710
1711 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1712 goto done;
1713 }
1714
1715 #define CHECK_PROPERTY(name, NAME) \
1716 if (intel_sdvo_connector->name == property) { \
1717 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1718 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1719 cmd = SDVO_CMD_SET_##NAME; \
1720 intel_sdvo_connector->cur_##name = temp_value; \
1721 goto set_value; \
1722 }
1723
1724 if (property == intel_sdvo_connector->tv_format) {
1725 if (val >= TV_FORMAT_NUM)
1726 return -EINVAL;
1727
1728 if (intel_sdvo->tv_format_index ==
1729 intel_sdvo_connector->tv_format_supported[val])
1730 return 0;
1731
1732 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1733 goto done;
1734 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1735 temp_value = val;
1736 if (intel_sdvo_connector->left == property) {
1737 drm_connector_property_set_value(connector,
1738 intel_sdvo_connector->right, val);
1739 if (intel_sdvo_connector->left_margin == temp_value)
1740 return 0;
1741
1742 intel_sdvo_connector->left_margin = temp_value;
1743 intel_sdvo_connector->right_margin = temp_value;
1744 temp_value = intel_sdvo_connector->max_hscan -
1745 intel_sdvo_connector->left_margin;
1746 cmd = SDVO_CMD_SET_OVERSCAN_H;
1747 goto set_value;
1748 } else if (intel_sdvo_connector->right == property) {
1749 drm_connector_property_set_value(connector,
1750 intel_sdvo_connector->left, val);
1751 if (intel_sdvo_connector->right_margin == temp_value)
1752 return 0;
1753
1754 intel_sdvo_connector->left_margin = temp_value;
1755 intel_sdvo_connector->right_margin = temp_value;
1756 temp_value = intel_sdvo_connector->max_hscan -
1757 intel_sdvo_connector->left_margin;
1758 cmd = SDVO_CMD_SET_OVERSCAN_H;
1759 goto set_value;
1760 } else if (intel_sdvo_connector->top == property) {
1761 drm_connector_property_set_value(connector,
1762 intel_sdvo_connector->bottom, val);
1763 if (intel_sdvo_connector->top_margin == temp_value)
1764 return 0;
1765
1766 intel_sdvo_connector->top_margin = temp_value;
1767 intel_sdvo_connector->bottom_margin = temp_value;
1768 temp_value = intel_sdvo_connector->max_vscan -
1769 intel_sdvo_connector->top_margin;
1770 cmd = SDVO_CMD_SET_OVERSCAN_V;
1771 goto set_value;
1772 } else if (intel_sdvo_connector->bottom == property) {
1773 drm_connector_property_set_value(connector,
1774 intel_sdvo_connector->top, val);
1775 if (intel_sdvo_connector->bottom_margin == temp_value)
1776 return 0;
1777
1778 intel_sdvo_connector->top_margin = temp_value;
1779 intel_sdvo_connector->bottom_margin = temp_value;
1780 temp_value = intel_sdvo_connector->max_vscan -
1781 intel_sdvo_connector->top_margin;
1782 cmd = SDVO_CMD_SET_OVERSCAN_V;
1783 goto set_value;
1784 }
1785 CHECK_PROPERTY(hpos, HPOS)
1786 CHECK_PROPERTY(vpos, VPOS)
1787 CHECK_PROPERTY(saturation, SATURATION)
1788 CHECK_PROPERTY(contrast, CONTRAST)
1789 CHECK_PROPERTY(hue, HUE)
1790 CHECK_PROPERTY(brightness, BRIGHTNESS)
1791 CHECK_PROPERTY(sharpness, SHARPNESS)
1792 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1793 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1794 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1795 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1796 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1797 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1798 }
1799
1800 return -EINVAL; /* unknown property */
1801
1802 set_value:
1803 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1804 return -EIO;
1805
1806
1807 done:
1808 if (intel_sdvo->base.base.crtc) {
1809 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1810 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1811 crtc->y, crtc->fb);
1812 }
1813
1814 return 0;
1815 #undef CHECK_PROPERTY
1816 }
1817
1818 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1819 .dpms = intel_sdvo_dpms,
1820 .mode_fixup = intel_sdvo_mode_fixup,
1821 .prepare = intel_encoder_prepare,
1822 .mode_set = intel_sdvo_mode_set,
1823 .commit = intel_encoder_commit,
1824 };
1825
1826 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1827 .dpms = drm_helper_connector_dpms,
1828 .detect = intel_sdvo_detect,
1829 .fill_modes = drm_helper_probe_single_connector_modes,
1830 .set_property = intel_sdvo_set_property,
1831 .destroy = intel_sdvo_destroy,
1832 };
1833
1834 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1835 .get_modes = intel_sdvo_get_modes,
1836 .mode_valid = intel_sdvo_mode_valid,
1837 .best_encoder = intel_best_encoder,
1838 };
1839
1840 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1841 {
1842 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1843
1844 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1845 drm_mode_destroy(encoder->dev,
1846 intel_sdvo->sdvo_lvds_fixed_mode);
1847
1848 i2c_del_adapter(&intel_sdvo->ddc);
1849 intel_encoder_destroy(encoder);
1850 }
1851
1852 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1853 .destroy = intel_sdvo_enc_destroy,
1854 };
1855
1856 static void
1857 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1858 {
1859 uint16_t mask = 0;
1860 unsigned int num_bits;
1861
1862 /* Make a mask of outputs less than or equal to our own priority in the
1863 * list.
1864 */
1865 switch (sdvo->controlled_output) {
1866 case SDVO_OUTPUT_LVDS1:
1867 mask |= SDVO_OUTPUT_LVDS1;
1868 case SDVO_OUTPUT_LVDS0:
1869 mask |= SDVO_OUTPUT_LVDS0;
1870 case SDVO_OUTPUT_TMDS1:
1871 mask |= SDVO_OUTPUT_TMDS1;
1872 case SDVO_OUTPUT_TMDS0:
1873 mask |= SDVO_OUTPUT_TMDS0;
1874 case SDVO_OUTPUT_RGB1:
1875 mask |= SDVO_OUTPUT_RGB1;
1876 case SDVO_OUTPUT_RGB0:
1877 mask |= SDVO_OUTPUT_RGB0;
1878 break;
1879 }
1880
1881 /* Count bits to find what number we are in the priority list. */
1882 mask &= sdvo->caps.output_flags;
1883 num_bits = hweight16(mask);
1884 /* If more than 3 outputs, default to DDC bus 3 for now. */
1885 if (num_bits > 3)
1886 num_bits = 3;
1887
1888 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1889 sdvo->ddc_bus = 1 << num_bits;
1890 }
1891
1892 /**
1893 * Choose the appropriate DDC bus for control bus switch command for this
1894 * SDVO output based on the controlled output.
1895 *
1896 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1897 * outputs, then LVDS outputs.
1898 */
1899 static void
1900 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1901 struct intel_sdvo *sdvo, u32 reg)
1902 {
1903 struct sdvo_device_mapping *mapping;
1904
1905 if (IS_SDVOB(reg))
1906 mapping = &(dev_priv->sdvo_mappings[0]);
1907 else
1908 mapping = &(dev_priv->sdvo_mappings[1]);
1909
1910 if (mapping->initialized)
1911 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1912 else
1913 intel_sdvo_guess_ddc_bus(sdvo);
1914 }
1915
1916 static void
1917 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1918 struct intel_sdvo *sdvo, u32 reg)
1919 {
1920 struct sdvo_device_mapping *mapping;
1921 u8 pin;
1922
1923 if (IS_SDVOB(reg))
1924 mapping = &dev_priv->sdvo_mappings[0];
1925 else
1926 mapping = &dev_priv->sdvo_mappings[1];
1927
1928 pin = GMBUS_PORT_DPB;
1929 if (mapping->initialized)
1930 pin = mapping->i2c_pin;
1931
1932 if (pin < GMBUS_NUM_PORTS) {
1933 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1934 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1935 intel_gmbus_force_bit(sdvo->i2c, true);
1936 } else {
1937 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1938 }
1939 }
1940
1941 static bool
1942 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1943 {
1944 return intel_sdvo_check_supp_encode(intel_sdvo);
1945 }
1946
1947 static u8
1948 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1949 {
1950 struct drm_i915_private *dev_priv = dev->dev_private;
1951 struct sdvo_device_mapping *my_mapping, *other_mapping;
1952
1953 if (IS_SDVOB(sdvo_reg)) {
1954 my_mapping = &dev_priv->sdvo_mappings[0];
1955 other_mapping = &dev_priv->sdvo_mappings[1];
1956 } else {
1957 my_mapping = &dev_priv->sdvo_mappings[1];
1958 other_mapping = &dev_priv->sdvo_mappings[0];
1959 }
1960
1961 /* If the BIOS described our SDVO device, take advantage of it. */
1962 if (my_mapping->slave_addr)
1963 return my_mapping->slave_addr;
1964
1965 /* If the BIOS only described a different SDVO device, use the
1966 * address that it isn't using.
1967 */
1968 if (other_mapping->slave_addr) {
1969 if (other_mapping->slave_addr == 0x70)
1970 return 0x72;
1971 else
1972 return 0x70;
1973 }
1974
1975 /* No SDVO device info is found for another DVO port,
1976 * so use mapping assumption we had before BIOS parsing.
1977 */
1978 if (IS_SDVOB(sdvo_reg))
1979 return 0x70;
1980 else
1981 return 0x72;
1982 }
1983
1984 static void
1985 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1986 struct intel_sdvo *encoder)
1987 {
1988 drm_connector_init(encoder->base.base.dev,
1989 &connector->base.base,
1990 &intel_sdvo_connector_funcs,
1991 connector->base.base.connector_type);
1992
1993 drm_connector_helper_add(&connector->base.base,
1994 &intel_sdvo_connector_helper_funcs);
1995
1996 connector->base.base.interlace_allowed = 0;
1997 connector->base.base.doublescan_allowed = 0;
1998 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1999
2000 intel_connector_attach_encoder(&connector->base, &encoder->base);
2001 drm_sysfs_connector_add(&connector->base.base);
2002 }
2003
2004 static void
2005 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2006 {
2007 struct drm_device *dev = connector->base.base.dev;
2008
2009 intel_attach_force_audio_property(&connector->base.base);
2010 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2011 intel_attach_broadcast_rgb_property(&connector->base.base);
2012 }
2013
2014 static bool
2015 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2016 {
2017 struct drm_encoder *encoder = &intel_sdvo->base.base;
2018 struct drm_connector *connector;
2019 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2020 struct intel_connector *intel_connector;
2021 struct intel_sdvo_connector *intel_sdvo_connector;
2022
2023 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2024 if (!intel_sdvo_connector)
2025 return false;
2026
2027 if (device == 0) {
2028 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2029 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2030 } else if (device == 1) {
2031 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2032 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2033 }
2034
2035 intel_connector = &intel_sdvo_connector->base;
2036 connector = &intel_connector->base;
2037 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2038 connector->polled = DRM_CONNECTOR_POLL_HPD;
2039 intel_sdvo->hotplug_active[0] |= 1 << device;
2040 /* Some SDVO devices have one-shot hotplug interrupts.
2041 * Ensure that they get re-enabled when an interrupt happens.
2042 */
2043 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2044 intel_sdvo_enable_hotplug(intel_encoder);
2045 }
2046 else
2047 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2048 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2049 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2050
2051 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2052 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2053 intel_sdvo->is_hdmi = true;
2054 }
2055 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2056 (1 << INTEL_ANALOG_CLONE_BIT));
2057
2058 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2059 if (intel_sdvo->is_hdmi)
2060 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2061
2062 return true;
2063 }
2064
2065 static bool
2066 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2067 {
2068 struct drm_encoder *encoder = &intel_sdvo->base.base;
2069 struct drm_connector *connector;
2070 struct intel_connector *intel_connector;
2071 struct intel_sdvo_connector *intel_sdvo_connector;
2072
2073 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2074 if (!intel_sdvo_connector)
2075 return false;
2076
2077 intel_connector = &intel_sdvo_connector->base;
2078 connector = &intel_connector->base;
2079 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2080 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2081
2082 intel_sdvo->controlled_output |= type;
2083 intel_sdvo_connector->output_flag = type;
2084
2085 intel_sdvo->is_tv = true;
2086 intel_sdvo->base.needs_tv_clock = true;
2087 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2088
2089 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2090
2091 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2092 goto err;
2093
2094 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2095 goto err;
2096
2097 return true;
2098
2099 err:
2100 intel_sdvo_destroy(connector);
2101 return false;
2102 }
2103
2104 static bool
2105 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2106 {
2107 struct drm_encoder *encoder = &intel_sdvo->base.base;
2108 struct drm_connector *connector;
2109 struct intel_connector *intel_connector;
2110 struct intel_sdvo_connector *intel_sdvo_connector;
2111
2112 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2113 if (!intel_sdvo_connector)
2114 return false;
2115
2116 intel_connector = &intel_sdvo_connector->base;
2117 connector = &intel_connector->base;
2118 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2119 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2120 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2121
2122 if (device == 0) {
2123 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2124 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2125 } else if (device == 1) {
2126 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2127 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2128 }
2129
2130 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2131 (1 << INTEL_ANALOG_CLONE_BIT));
2132
2133 intel_sdvo_connector_init(intel_sdvo_connector,
2134 intel_sdvo);
2135 return true;
2136 }
2137
2138 static bool
2139 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2140 {
2141 struct drm_encoder *encoder = &intel_sdvo->base.base;
2142 struct drm_connector *connector;
2143 struct intel_connector *intel_connector;
2144 struct intel_sdvo_connector *intel_sdvo_connector;
2145
2146 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2147 if (!intel_sdvo_connector)
2148 return false;
2149
2150 intel_connector = &intel_sdvo_connector->base;
2151 connector = &intel_connector->base;
2152 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2153 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2154
2155 if (device == 0) {
2156 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2157 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2158 } else if (device == 1) {
2159 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2160 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2161 }
2162
2163 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2164 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2165
2166 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2167 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2168 goto err;
2169
2170 return true;
2171
2172 err:
2173 intel_sdvo_destroy(connector);
2174 return false;
2175 }
2176
2177 static bool
2178 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2179 {
2180 intel_sdvo->is_tv = false;
2181 intel_sdvo->base.needs_tv_clock = false;
2182 intel_sdvo->is_lvds = false;
2183
2184 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2185
2186 if (flags & SDVO_OUTPUT_TMDS0)
2187 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2188 return false;
2189
2190 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2191 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2192 return false;
2193
2194 /* TV has no XXX1 function block */
2195 if (flags & SDVO_OUTPUT_SVID0)
2196 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2197 return false;
2198
2199 if (flags & SDVO_OUTPUT_CVBS0)
2200 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2201 return false;
2202
2203 if (flags & SDVO_OUTPUT_RGB0)
2204 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2205 return false;
2206
2207 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2208 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2209 return false;
2210
2211 if (flags & SDVO_OUTPUT_LVDS0)
2212 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2213 return false;
2214
2215 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2216 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2217 return false;
2218
2219 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2220 unsigned char bytes[2];
2221
2222 intel_sdvo->controlled_output = 0;
2223 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2224 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2225 SDVO_NAME(intel_sdvo),
2226 bytes[0], bytes[1]);
2227 return false;
2228 }
2229 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2230
2231 return true;
2232 }
2233
2234 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2235 struct intel_sdvo_connector *intel_sdvo_connector,
2236 int type)
2237 {
2238 struct drm_device *dev = intel_sdvo->base.base.dev;
2239 struct intel_sdvo_tv_format format;
2240 uint32_t format_map, i;
2241
2242 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2243 return false;
2244
2245 BUILD_BUG_ON(sizeof(format) != 6);
2246 if (!intel_sdvo_get_value(intel_sdvo,
2247 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2248 &format, sizeof(format)))
2249 return false;
2250
2251 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2252
2253 if (format_map == 0)
2254 return false;
2255
2256 intel_sdvo_connector->format_supported_num = 0;
2257 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2258 if (format_map & (1 << i))
2259 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2260
2261
2262 intel_sdvo_connector->tv_format =
2263 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2264 "mode", intel_sdvo_connector->format_supported_num);
2265 if (!intel_sdvo_connector->tv_format)
2266 return false;
2267
2268 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2269 drm_property_add_enum(
2270 intel_sdvo_connector->tv_format, i,
2271 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2272
2273 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2274 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2275 intel_sdvo_connector->tv_format, 0);
2276 return true;
2277
2278 }
2279
2280 #define ENHANCEMENT(name, NAME) do { \
2281 if (enhancements.name) { \
2282 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2283 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2284 return false; \
2285 intel_sdvo_connector->max_##name = data_value[0]; \
2286 intel_sdvo_connector->cur_##name = response; \
2287 intel_sdvo_connector->name = \
2288 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2289 if (!intel_sdvo_connector->name) return false; \
2290 intel_sdvo_connector->name->values[0] = 0; \
2291 intel_sdvo_connector->name->values[1] = data_value[0]; \
2292 drm_connector_attach_property(connector, \
2293 intel_sdvo_connector->name, \
2294 intel_sdvo_connector->cur_##name); \
2295 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2296 data_value[0], data_value[1], response); \
2297 } \
2298 } while (0)
2299
2300 static bool
2301 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2302 struct intel_sdvo_connector *intel_sdvo_connector,
2303 struct intel_sdvo_enhancements_reply enhancements)
2304 {
2305 struct drm_device *dev = intel_sdvo->base.base.dev;
2306 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2307 uint16_t response, data_value[2];
2308
2309 /* when horizontal overscan is supported, Add the left/right property */
2310 if (enhancements.overscan_h) {
2311 if (!intel_sdvo_get_value(intel_sdvo,
2312 SDVO_CMD_GET_MAX_OVERSCAN_H,
2313 &data_value, 4))
2314 return false;
2315
2316 if (!intel_sdvo_get_value(intel_sdvo,
2317 SDVO_CMD_GET_OVERSCAN_H,
2318 &response, 2))
2319 return false;
2320
2321 intel_sdvo_connector->max_hscan = data_value[0];
2322 intel_sdvo_connector->left_margin = data_value[0] - response;
2323 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2324 intel_sdvo_connector->left =
2325 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2326 "left_margin", 2);
2327 if (!intel_sdvo_connector->left)
2328 return false;
2329
2330 intel_sdvo_connector->left->values[0] = 0;
2331 intel_sdvo_connector->left->values[1] = data_value[0];
2332 drm_connector_attach_property(connector,
2333 intel_sdvo_connector->left,
2334 intel_sdvo_connector->left_margin);
2335
2336 intel_sdvo_connector->right =
2337 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2338 "right_margin", 2);
2339 if (!intel_sdvo_connector->right)
2340 return false;
2341
2342 intel_sdvo_connector->right->values[0] = 0;
2343 intel_sdvo_connector->right->values[1] = data_value[0];
2344 drm_connector_attach_property(connector,
2345 intel_sdvo_connector->right,
2346 intel_sdvo_connector->right_margin);
2347 DRM_DEBUG_KMS("h_overscan: max %d, "
2348 "default %d, current %d\n",
2349 data_value[0], data_value[1], response);
2350 }
2351
2352 if (enhancements.overscan_v) {
2353 if (!intel_sdvo_get_value(intel_sdvo,
2354 SDVO_CMD_GET_MAX_OVERSCAN_V,
2355 &data_value, 4))
2356 return false;
2357
2358 if (!intel_sdvo_get_value(intel_sdvo,
2359 SDVO_CMD_GET_OVERSCAN_V,
2360 &response, 2))
2361 return false;
2362
2363 intel_sdvo_connector->max_vscan = data_value[0];
2364 intel_sdvo_connector->top_margin = data_value[0] - response;
2365 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2366 intel_sdvo_connector->top =
2367 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2368 "top_margin", 2);
2369 if (!intel_sdvo_connector->top)
2370 return false;
2371
2372 intel_sdvo_connector->top->values[0] = 0;
2373 intel_sdvo_connector->top->values[1] = data_value[0];
2374 drm_connector_attach_property(connector,
2375 intel_sdvo_connector->top,
2376 intel_sdvo_connector->top_margin);
2377
2378 intel_sdvo_connector->bottom =
2379 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2380 "bottom_margin", 2);
2381 if (!intel_sdvo_connector->bottom)
2382 return false;
2383
2384 intel_sdvo_connector->bottom->values[0] = 0;
2385 intel_sdvo_connector->bottom->values[1] = data_value[0];
2386 drm_connector_attach_property(connector,
2387 intel_sdvo_connector->bottom,
2388 intel_sdvo_connector->bottom_margin);
2389 DRM_DEBUG_KMS("v_overscan: max %d, "
2390 "default %d, current %d\n",
2391 data_value[0], data_value[1], response);
2392 }
2393
2394 ENHANCEMENT(hpos, HPOS);
2395 ENHANCEMENT(vpos, VPOS);
2396 ENHANCEMENT(saturation, SATURATION);
2397 ENHANCEMENT(contrast, CONTRAST);
2398 ENHANCEMENT(hue, HUE);
2399 ENHANCEMENT(sharpness, SHARPNESS);
2400 ENHANCEMENT(brightness, BRIGHTNESS);
2401 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2402 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2403 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2404 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2405 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2406
2407 if (enhancements.dot_crawl) {
2408 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2409 return false;
2410
2411 intel_sdvo_connector->max_dot_crawl = 1;
2412 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2413 intel_sdvo_connector->dot_crawl =
2414 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2415 if (!intel_sdvo_connector->dot_crawl)
2416 return false;
2417
2418 intel_sdvo_connector->dot_crawl->values[0] = 0;
2419 intel_sdvo_connector->dot_crawl->values[1] = 1;
2420 drm_connector_attach_property(connector,
2421 intel_sdvo_connector->dot_crawl,
2422 intel_sdvo_connector->cur_dot_crawl);
2423 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2424 }
2425
2426 return true;
2427 }
2428
2429 static bool
2430 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2431 struct intel_sdvo_connector *intel_sdvo_connector,
2432 struct intel_sdvo_enhancements_reply enhancements)
2433 {
2434 struct drm_device *dev = intel_sdvo->base.base.dev;
2435 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2436 uint16_t response, data_value[2];
2437
2438 ENHANCEMENT(brightness, BRIGHTNESS);
2439
2440 return true;
2441 }
2442 #undef ENHANCEMENT
2443
2444 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2445 struct intel_sdvo_connector *intel_sdvo_connector)
2446 {
2447 union {
2448 struct intel_sdvo_enhancements_reply reply;
2449 uint16_t response;
2450 } enhancements;
2451
2452 BUILD_BUG_ON(sizeof(enhancements) != 2);
2453
2454 enhancements.response = 0;
2455 intel_sdvo_get_value(intel_sdvo,
2456 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2457 &enhancements, sizeof(enhancements));
2458 if (enhancements.response == 0) {
2459 DRM_DEBUG_KMS("No enhancement is supported\n");
2460 return true;
2461 }
2462
2463 if (IS_TV(intel_sdvo_connector))
2464 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2465 else if (IS_LVDS(intel_sdvo_connector))
2466 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2467 else
2468 return true;
2469 }
2470
2471 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2472 struct i2c_msg *msgs,
2473 int num)
2474 {
2475 struct intel_sdvo *sdvo = adapter->algo_data;
2476
2477 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2478 return -EIO;
2479
2480 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2481 }
2482
2483 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2484 {
2485 struct intel_sdvo *sdvo = adapter->algo_data;
2486 return sdvo->i2c->algo->functionality(sdvo->i2c);
2487 }
2488
2489 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2490 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2491 .functionality = intel_sdvo_ddc_proxy_func
2492 };
2493
2494 static bool
2495 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2496 struct drm_device *dev)
2497 {
2498 sdvo->ddc.owner = THIS_MODULE;
2499 sdvo->ddc.class = I2C_CLASS_DDC;
2500 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2501 sdvo->ddc.dev.parent = &dev->pdev->dev;
2502 sdvo->ddc.algo_data = sdvo;
2503 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2504
2505 return i2c_add_adapter(&sdvo->ddc) == 0;
2506 }
2507
2508 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2509 {
2510 struct drm_i915_private *dev_priv = dev->dev_private;
2511 struct intel_encoder *intel_encoder;
2512 struct intel_sdvo *intel_sdvo;
2513 int i;
2514
2515 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2516 if (!intel_sdvo)
2517 return false;
2518
2519 intel_sdvo->sdvo_reg = sdvo_reg;
2520 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2521 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2522 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2523 kfree(intel_sdvo);
2524 return false;
2525 }
2526
2527 /* encoder type will be decided later */
2528 intel_encoder = &intel_sdvo->base;
2529 intel_encoder->type = INTEL_OUTPUT_SDVO;
2530 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2531
2532 /* Read the regs to test if we can talk to the device */
2533 for (i = 0; i < 0x40; i++) {
2534 u8 byte;
2535
2536 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2537 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2538 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2539 goto err;
2540 }
2541 }
2542
2543 if (IS_SDVOB(sdvo_reg))
2544 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2545 else
2546 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2547
2548 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2549
2550 /* In default case sdvo lvds is false */
2551 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2552 goto err;
2553
2554 /* Set up hotplug command - note paranoia about contents of reply.
2555 * We assume that the hardware is in a sane state, and only touch
2556 * the bits we think we understand.
2557 */
2558 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2559 &intel_sdvo->hotplug_active, 2);
2560 intel_sdvo->hotplug_active[0] &= ~0x3;
2561
2562 if (intel_sdvo_output_setup(intel_sdvo,
2563 intel_sdvo->caps.output_flags) != true) {
2564 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2565 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2566 goto err;
2567 }
2568
2569 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2570
2571 /* Set the input timing to the screen. Assume always input 0. */
2572 if (!intel_sdvo_set_target_input(intel_sdvo))
2573 goto err;
2574
2575 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2576 &intel_sdvo->pixel_clock_min,
2577 &intel_sdvo->pixel_clock_max))
2578 goto err;
2579
2580 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2581 "clock range %dMHz - %dMHz, "
2582 "input 1: %c, input 2: %c, "
2583 "output 1: %c, output 2: %c\n",
2584 SDVO_NAME(intel_sdvo),
2585 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2586 intel_sdvo->caps.device_rev_id,
2587 intel_sdvo->pixel_clock_min / 1000,
2588 intel_sdvo->pixel_clock_max / 1000,
2589 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2590 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2591 /* check currently supported outputs */
2592 intel_sdvo->caps.output_flags &
2593 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2594 intel_sdvo->caps.output_flags &
2595 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2596 return true;
2597
2598 err:
2599 drm_encoder_cleanup(&intel_encoder->base);
2600 i2c_del_adapter(&intel_sdvo->ddc);
2601 kfree(intel_sdvo);
2602
2603 return false;
2604 }