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Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / infiniband / hw / mthca / mthca_main.c
blobaa12a533ae9e426c4d4dc66d5ca255a0d2e2e6a4
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #include <linux/module.h>
36 #include <linux/init.h>
37 #include <linux/errno.h>
38 #include <linux/pci.h>
39 #include <linux/interrupt.h>
40 #include <linux/gfp.h>
41
42 #include "mthca_dev.h"
43 #include "mthca_config_reg.h"
44 #include "mthca_cmd.h"
45 #include "mthca_profile.h"
46 #include "mthca_memfree.h"
47 #include "mthca_wqe.h"
48
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION);
53
54 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
55
56 int mthca_debug_level = 0;
57 module_param_named(debug_level, mthca_debug_level, int, 0644);
58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
59
60 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
61
62 #ifdef CONFIG_PCI_MSI
63
64 static int msi_x = 1;
65 module_param(msi_x, int, 0444);
66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
67
68 #else /* CONFIG_PCI_MSI */
69
70 #define msi_x (0)
71
72 #endif /* CONFIG_PCI_MSI */
73
74 static int tune_pci = 0;
75 module_param(tune_pci, int, 0444);
76 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
77
78 DEFINE_MUTEX(mthca_device_mutex);
79
80 #define MTHCA_DEFAULT_NUM_QP (1 << 16)
81 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
82 #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
83 #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
84 #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
85 #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
86 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
87 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
88 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
89
90 static struct mthca_profile hca_profile = {
91 .num_qp = MTHCA_DEFAULT_NUM_QP,
92 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
93 .num_cq = MTHCA_DEFAULT_NUM_CQ,
94 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
95 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
96 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
97 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
98 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
99 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
100 };
101
102 module_param_named(num_qp, hca_profile.num_qp, int, 0444);
103 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
104
105 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
106 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
107
108 module_param_named(num_cq, hca_profile.num_cq, int, 0444);
109 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
110
111 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
112 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
113
114 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
115 MODULE_PARM_DESC(num_mpt,
116 "maximum number of memory protection table entries per HCA");
117
118 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
119 MODULE_PARM_DESC(num_mtt,
120 "maximum number of memory translation table segments per HCA");
121
122 module_param_named(num_udav, hca_profile.num_udav, int, 0444);
123 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
124
125 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
126 MODULE_PARM_DESC(fmr_reserved_mtts,
127 "number of memory translation table segments reserved for FMR");
128
129 static int log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8);
130 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
131 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)");
132
133 static char mthca_version[] __devinitdata =
134 DRV_NAME ": Mellanox InfiniBand HCA driver v"
135 DRV_VERSION " (" DRV_RELDATE ")\n";
136
137 static int mthca_tune_pci(struct mthca_dev *mdev)
138 {
139 if (!tune_pci)
140 return 0;
141
142 /* First try to max out Read Byte Count */
143 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
144 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
145 mthca_err(mdev, "Couldn't set PCI-X max read count, "
146 "aborting.\n");
147 return -ENODEV;
148 }
149 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
150 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
151
152 if (pci_is_pcie(mdev->pdev)) {
153 if (pcie_set_readrq(mdev->pdev, 4096)) {
154 mthca_err(mdev, "Couldn't write PCI Express read request, "
155 "aborting.\n");
156 return -ENODEV;
157 }
158 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
159 mthca_info(mdev, "No PCI Express capability, "
160 "not setting Max Read Request Size.\n");
161
162 return 0;
163 }
164
165 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
166 {
167 int err;
168
169 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8;
170 err = mthca_QUERY_DEV_LIM(mdev, dev_lim);
171 if (err) {
172 mthca_err(mdev, "QUERY_DEV_LIM command returned %d"
173 ", aborting.\n", err);
174 return err;
175 }
176 if (dev_lim->min_page_sz > PAGE_SIZE) {
177 mthca_err(mdev, "HCA minimum page size of %d bigger than "
178 "kernel PAGE_SIZE of %ld, aborting.\n",
179 dev_lim->min_page_sz, PAGE_SIZE);
180 return -ENODEV;
181 }
182 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
183 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
184 "aborting.\n",
185 dev_lim->num_ports, MTHCA_MAX_PORTS);
186 return -ENODEV;
187 }
188
189 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
190 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
191 "PCI resource 2 size of 0x%llx, aborting.\n",
192 dev_lim->uar_size,
193 (unsigned long long)pci_resource_len(mdev->pdev, 2));
194 return -ENODEV;
195 }
196
197 mdev->limits.num_ports = dev_lim->num_ports;
198 mdev->limits.vl_cap = dev_lim->max_vl;
199 mdev->limits.mtu_cap = dev_lim->max_mtu;
200 mdev->limits.gid_table_len = dev_lim->max_gids;
201 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
202 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
203 /*
204 * Need to allow for worst case send WQE overhead and check
205 * whether max_desc_sz imposes a lower limit than max_sg; UD
206 * send has the biggest overhead.
207 */
208 mdev->limits.max_sg = min_t(int, dev_lim->max_sg,
209 (dev_lim->max_desc_sz -
210 sizeof (struct mthca_next_seg) -
211 (mthca_is_memfree(mdev) ?
212 sizeof (struct mthca_arbel_ud_seg) :
213 sizeof (struct mthca_tavor_ud_seg))) /
214 sizeof (struct mthca_data_seg));
215 mdev->limits.max_wqes = dev_lim->max_qp_sz;
216 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
217 mdev->limits.reserved_qps = dev_lim->reserved_qps;
218 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
219 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
220 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
221 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
222 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
223 /*
224 * Subtract 1 from the limit because we need to allocate a
225 * spare CQE so the HCA HW can tell the difference between an
226 * empty CQ and a full CQ.
227 */
228 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
229 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
230 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
231 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
232 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
233 mdev->limits.reserved_uars = dev_lim->reserved_uars;
234 mdev->limits.reserved_pds = dev_lim->reserved_pds;
235 mdev->limits.port_width_cap = dev_lim->max_port_width;
236 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
237 mdev->limits.flags = dev_lim->flags;
238 /*
239 * For old FW that doesn't return static rate support, use a
240 * value of 0x3 (only static rate values of 0 or 1 are handled),
241 * except on Sinai, where even old FW can handle static rate
242 * values of 2 and 3.
243 */
244 if (dev_lim->stat_rate_support)
245 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
246 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
247 mdev->limits.stat_rate_support = 0xf;
248 else
249 mdev->limits.stat_rate_support = 0x3;
250
251 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
252 May be doable since hardware supports it for SRQ.
253
254 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
255
256 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
257 supported by driver. */
258 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
259 IB_DEVICE_PORT_ACTIVE_EVENT |
260 IB_DEVICE_SYS_IMAGE_GUID |
261 IB_DEVICE_RC_RNR_NAK_GEN;
262
263 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
264 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
265
266 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
267 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
268
269 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
270 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
271
272 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
273 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
274
275 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
276 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
277
278 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
279 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
280
281 if (mthca_is_memfree(mdev))
282 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM)
283 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
284
285 return 0;
286 }
287
288 static int mthca_init_tavor(struct mthca_dev *mdev)
289 {
290 s64 size;
291 int err;
292 struct mthca_dev_lim dev_lim;
293 struct mthca_profile profile;
294 struct mthca_init_hca_param init_hca;
295
296 err = mthca_SYS_EN(mdev);
297 if (err) {
298 mthca_err(mdev, "SYS_EN command returned %d, aborting.\n", err);
299 return err;
300 }
301
302 err = mthca_QUERY_FW(mdev);
303 if (err) {
304 mthca_err(mdev, "QUERY_FW command returned %d,"
305 " aborting.\n", err);
306 goto err_disable;
307 }
308 err = mthca_QUERY_DDR(mdev);
309 if (err) {
310 mthca_err(mdev, "QUERY_DDR command returned %d, aborting.\n", err);
311 goto err_disable;
312 }
313
314 err = mthca_dev_lim(mdev, &dev_lim);
315 if (err) {
316 mthca_err(mdev, "QUERY_DEV_LIM command returned %d, aborting.\n", err);
317 goto err_disable;
318 }
319
320 profile = hca_profile;
321 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
322 profile.uarc_size = 0;
323 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
324 profile.num_srq = dev_lim.max_srqs;
325
326 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
327 if (size < 0) {
328 err = size;
329 goto err_disable;
330 }
331
332 err = mthca_INIT_HCA(mdev, &init_hca);
333 if (err) {
334 mthca_err(mdev, "INIT_HCA command returned %d, aborting.\n", err);
335 goto err_disable;
336 }
337
338 return 0;
339
340 err_disable:
341 mthca_SYS_DIS(mdev);
342
343 return err;
344 }
345
346 static int mthca_load_fw(struct mthca_dev *mdev)
347 {
348 int err;
349
350 /* FIXME: use HCA-attached memory for FW if present */
351
352 mdev->fw.arbel.fw_icm =
353 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
354 GFP_HIGHUSER | __GFP_NOWARN, 0);
355 if (!mdev->fw.arbel.fw_icm) {
356 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
357 return -ENOMEM;
358 }
359
360 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm);
361 if (err) {
362 mthca_err(mdev, "MAP_FA command returned %d, aborting.\n", err);
363 goto err_free;
364 }
365 err = mthca_RUN_FW(mdev);
366 if (err) {
367 mthca_err(mdev, "RUN_FW command returned %d, aborting.\n", err);
368 goto err_unmap_fa;
369 }
370
371 return 0;
372
373 err_unmap_fa:
374 mthca_UNMAP_FA(mdev);
375
376 err_free:
377 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
378 return err;
379 }
380
381 static int mthca_init_icm(struct mthca_dev *mdev,
382 struct mthca_dev_lim *dev_lim,
383 struct mthca_init_hca_param *init_hca,
384 u64 icm_size)
385 {
386 u64 aux_pages;
387 int err;
388
389 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages);
390 if (err) {
391 mthca_err(mdev, "SET_ICM_SIZE command returned %d, aborting.\n", err);
392 return err;
393 }
394
395 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
396 (unsigned long long) icm_size >> 10,
397 (unsigned long long) aux_pages << 2);
398
399 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
400 GFP_HIGHUSER | __GFP_NOWARN, 0);
401 if (!mdev->fw.arbel.aux_icm) {
402 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
403 return -ENOMEM;
404 }
405
406 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm);
407 if (err) {
408 mthca_err(mdev, "MAP_ICM_AUX returned %d, aborting.\n", err);
409 goto err_free_aux;
410 }
411
412 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
413 if (err) {
414 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
415 goto err_unmap_aux;
416 }
417
418 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
419 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * mdev->limits.mtt_seg_size,
420 dma_get_cache_alignment()) / mdev->limits.mtt_seg_size;
421
422 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
423 mdev->limits.mtt_seg_size,
424 mdev->limits.num_mtt_segs,
425 mdev->limits.reserved_mtts,
426 1, 0);
427 if (!mdev->mr_table.mtt_table) {
428 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
429 err = -ENOMEM;
430 goto err_unmap_eq;
431 }
432
433 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
434 dev_lim->mpt_entry_sz,
435 mdev->limits.num_mpts,
436 mdev->limits.reserved_mrws,
437 1, 1);
438 if (!mdev->mr_table.mpt_table) {
439 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
440 err = -ENOMEM;
441 goto err_unmap_mtt;
442 }
443
444 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
445 dev_lim->qpc_entry_sz,
446 mdev->limits.num_qps,
447 mdev->limits.reserved_qps,
448 0, 0);
449 if (!mdev->qp_table.qp_table) {
450 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
451 err = -ENOMEM;
452 goto err_unmap_mpt;
453 }
454
455 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
456 dev_lim->eqpc_entry_sz,
457 mdev->limits.num_qps,
458 mdev->limits.reserved_qps,
459 0, 0);
460 if (!mdev->qp_table.eqp_table) {
461 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
462 err = -ENOMEM;
463 goto err_unmap_qp;
464 }
465
466 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
467 MTHCA_RDB_ENTRY_SIZE,
468 mdev->limits.num_qps <<
469 mdev->qp_table.rdb_shift, 0,
470 0, 0);
471 if (!mdev->qp_table.rdb_table) {
472 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
473 err = -ENOMEM;
474 goto err_unmap_eqp;
475 }
476
477 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
478 dev_lim->cqc_entry_sz,
479 mdev->limits.num_cqs,
480 mdev->limits.reserved_cqs,
481 0, 0);
482 if (!mdev->cq_table.table) {
483 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
484 err = -ENOMEM;
485 goto err_unmap_rdb;
486 }
487
488 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
489 mdev->srq_table.table =
490 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
491 dev_lim->srq_entry_sz,
492 mdev->limits.num_srqs,
493 mdev->limits.reserved_srqs,
494 0, 0);
495 if (!mdev->srq_table.table) {
496 mthca_err(mdev, "Failed to map SRQ context memory, "
497 "aborting.\n");
498 err = -ENOMEM;
499 goto err_unmap_cq;
500 }
501 }
502
503 /*
504 * It's not strictly required, but for simplicity just map the
505 * whole multicast group table now. The table isn't very big
506 * and it's a lot easier than trying to track ref counts.
507 */
508 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
509 MTHCA_MGM_ENTRY_SIZE,
510 mdev->limits.num_mgms +
511 mdev->limits.num_amgms,
512 mdev->limits.num_mgms +
513 mdev->limits.num_amgms,
514 0, 0);
515 if (!mdev->mcg_table.table) {
516 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
517 err = -ENOMEM;
518 goto err_unmap_srq;
519 }
520
521 return 0;
522
523 err_unmap_srq:
524 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
525 mthca_free_icm_table(mdev, mdev->srq_table.table);
526
527 err_unmap_cq:
528 mthca_free_icm_table(mdev, mdev->cq_table.table);
529
530 err_unmap_rdb:
531 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
532
533 err_unmap_eqp:
534 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
535
536 err_unmap_qp:
537 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
538
539 err_unmap_mpt:
540 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
541
542 err_unmap_mtt:
543 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
544
545 err_unmap_eq:
546 mthca_unmap_eq_icm(mdev);
547
548 err_unmap_aux:
549 mthca_UNMAP_ICM_AUX(mdev);
550
551 err_free_aux:
552 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
553
554 return err;
555 }
556
557 static void mthca_free_icms(struct mthca_dev *mdev)
558 {
559
560 mthca_free_icm_table(mdev, mdev->mcg_table.table);
561 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
562 mthca_free_icm_table(mdev, mdev->srq_table.table);
563 mthca_free_icm_table(mdev, mdev->cq_table.table);
564 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
565 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
566 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
567 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
568 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
569 mthca_unmap_eq_icm(mdev);
570
571 mthca_UNMAP_ICM_AUX(mdev);
572 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
573 }
574
575 static int mthca_init_arbel(struct mthca_dev *mdev)
576 {
577 struct mthca_dev_lim dev_lim;
578 struct mthca_profile profile;
579 struct mthca_init_hca_param init_hca;
580 s64 icm_size;
581 int err;
582
583 err = mthca_QUERY_FW(mdev);
584 if (err) {
585 mthca_err(mdev, "QUERY_FW command failed %d, aborting.\n", err);
586 return err;
587 }
588
589 err = mthca_ENABLE_LAM(mdev);
590 if (err == -EAGAIN) {
591 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
592 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
593 } else if (err) {
594 mthca_err(mdev, "ENABLE_LAM returned %d, aborting.\n", err);
595 return err;
596 }
597
598 err = mthca_load_fw(mdev);
599 if (err) {
600 mthca_err(mdev, "Loading FW returned %d, aborting.\n", err);
601 goto err_disable;
602 }
603
604 err = mthca_dev_lim(mdev, &dev_lim);
605 if (err) {
606 mthca_err(mdev, "QUERY_DEV_LIM returned %d, aborting.\n", err);
607 goto err_stop_fw;
608 }
609
610 profile = hca_profile;
611 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
612 profile.num_udav = 0;
613 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
614 profile.num_srq = dev_lim.max_srqs;
615
616 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
617 if (icm_size < 0) {
618 err = icm_size;
619 goto err_stop_fw;
620 }
621
622 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
623 if (err)
624 goto err_stop_fw;
625
626 err = mthca_INIT_HCA(mdev, &init_hca);
627 if (err) {
628 mthca_err(mdev, "INIT_HCA command returned %d, aborting.\n", err);
629 goto err_free_icm;
630 }
631
632 return 0;
633
634 err_free_icm:
635 mthca_free_icms(mdev);
636
637 err_stop_fw:
638 mthca_UNMAP_FA(mdev);
639 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
640
641 err_disable:
642 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
643 mthca_DISABLE_LAM(mdev);
644
645 return err;
646 }
647
648 static void mthca_close_hca(struct mthca_dev *mdev)
649 {
650 mthca_CLOSE_HCA(mdev, 0);
651
652 if (mthca_is_memfree(mdev)) {
653 mthca_free_icms(mdev);
654
655 mthca_UNMAP_FA(mdev);
656 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
657
658 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
659 mthca_DISABLE_LAM(mdev);
660 } else
661 mthca_SYS_DIS(mdev);
662 }
663
664 static int mthca_init_hca(struct mthca_dev *mdev)
665 {
666 int err;
667 struct mthca_adapter adapter;
668
669 if (mthca_is_memfree(mdev))
670 err = mthca_init_arbel(mdev);
671 else
672 err = mthca_init_tavor(mdev);
673
674 if (err)
675 return err;
676
677 err = mthca_QUERY_ADAPTER(mdev, &adapter);
678 if (err) {
679 mthca_err(mdev, "QUERY_ADAPTER command returned %d, aborting.\n", err);
680 goto err_close;
681 }
682
683 mdev->eq_table.inta_pin = adapter.inta_pin;
684 if (!mthca_is_memfree(mdev))
685 mdev->rev_id = adapter.revision_id;
686 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
687
688 return 0;
689
690 err_close:
691 mthca_close_hca(mdev);
692 return err;
693 }
694
695 static int mthca_setup_hca(struct mthca_dev *dev)
696 {
697 int err;
698
699 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
700
701 err = mthca_init_uar_table(dev);
702 if (err) {
703 mthca_err(dev, "Failed to initialize "
704 "user access region table, aborting.\n");
705 return err;
706 }
707
708 err = mthca_uar_alloc(dev, &dev->driver_uar);
709 if (err) {
710 mthca_err(dev, "Failed to allocate driver access region, "
711 "aborting.\n");
712 goto err_uar_table_free;
713 }
714
715 dev->kar = ioremap((phys_addr_t) dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
716 if (!dev->kar) {
717 mthca_err(dev, "Couldn't map kernel access region, "
718 "aborting.\n");
719 err = -ENOMEM;
720 goto err_uar_free;
721 }
722
723 err = mthca_init_pd_table(dev);
724 if (err) {
725 mthca_err(dev, "Failed to initialize "
726 "protection domain table, aborting.\n");
727 goto err_kar_unmap;
728 }
729
730 err = mthca_init_mr_table(dev);
731 if (err) {
732 mthca_err(dev, "Failed to initialize "
733 "memory region table, aborting.\n");
734 goto err_pd_table_free;
735 }
736
737 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
738 if (err) {
739 mthca_err(dev, "Failed to create driver PD, "
740 "aborting.\n");
741 goto err_mr_table_free;
742 }
743
744 err = mthca_init_eq_table(dev);
745 if (err) {
746 mthca_err(dev, "Failed to initialize "
747 "event queue table, aborting.\n");
748 goto err_pd_free;
749 }
750
751 err = mthca_cmd_use_events(dev);
752 if (err) {
753 mthca_err(dev, "Failed to switch to event-driven "
754 "firmware commands, aborting.\n");
755 goto err_eq_table_free;
756 }
757
758 err = mthca_NOP(dev);
759 if (err) {
760 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) {
761 mthca_warn(dev, "NOP command failed to generate interrupt "
762 "(IRQ %d).\n",
763 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector);
764 mthca_warn(dev, "Trying again with MSI-X disabled.\n");
765 } else {
766 mthca_err(dev, "NOP command failed to generate interrupt "
767 "(IRQ %d), aborting.\n",
768 dev->pdev->irq);
769 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
770 }
771
772 goto err_cmd_poll;
773 }
774
775 mthca_dbg(dev, "NOP command IRQ test passed\n");
776
777 err = mthca_init_cq_table(dev);
778 if (err) {
779 mthca_err(dev, "Failed to initialize "
780 "completion queue table, aborting.\n");
781 goto err_cmd_poll;
782 }
783
784 err = mthca_init_srq_table(dev);
785 if (err) {
786 mthca_err(dev, "Failed to initialize "
787 "shared receive queue table, aborting.\n");
788 goto err_cq_table_free;
789 }
790
791 err = mthca_init_qp_table(dev);
792 if (err) {
793 mthca_err(dev, "Failed to initialize "
794 "queue pair table, aborting.\n");
795 goto err_srq_table_free;
796 }
797
798 err = mthca_init_av_table(dev);
799 if (err) {
800 mthca_err(dev, "Failed to initialize "
801 "address vector table, aborting.\n");
802 goto err_qp_table_free;
803 }
804
805 err = mthca_init_mcg_table(dev);
806 if (err) {
807 mthca_err(dev, "Failed to initialize "
808 "multicast group table, aborting.\n");
809 goto err_av_table_free;
810 }
811
812 return 0;
813
814 err_av_table_free:
815 mthca_cleanup_av_table(dev);
816
817 err_qp_table_free:
818 mthca_cleanup_qp_table(dev);
819
820 err_srq_table_free:
821 mthca_cleanup_srq_table(dev);
822
823 err_cq_table_free:
824 mthca_cleanup_cq_table(dev);
825
826 err_cmd_poll:
827 mthca_cmd_use_polling(dev);
828
829 err_eq_table_free:
830 mthca_cleanup_eq_table(dev);
831
832 err_pd_free:
833 mthca_pd_free(dev, &dev->driver_pd);
834
835 err_mr_table_free:
836 mthca_cleanup_mr_table(dev);
837
838 err_pd_table_free:
839 mthca_cleanup_pd_table(dev);
840
841 err_kar_unmap:
842 iounmap(dev->kar);
843
844 err_uar_free:
845 mthca_uar_free(dev, &dev->driver_uar);
846
847 err_uar_table_free:
848 mthca_cleanup_uar_table(dev);
849 return err;
850 }
851
852 static int mthca_enable_msi_x(struct mthca_dev *mdev)
853 {
854 struct msix_entry entries[3];
855 int err;
856
857 entries[0].entry = 0;
858 entries[1].entry = 1;
859 entries[2].entry = 2;
860
861 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
862 if (err) {
863 if (err > 0)
864 mthca_info(mdev, "Only %d MSI-X vectors available, "
865 "not using MSI-X\n", err);
866 return err;
867 }
868
869 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
870 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
871 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
872
873 return 0;
874 }
875
876 /* Types of supported HCA */
877 enum {
878 TAVOR, /* MT23108 */
879 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
880 ARBEL_NATIVE, /* MT25208 with extended features */
881 SINAI /* MT25204 */
882 };
883
884 #define MTHCA_FW_VER(major, minor, subminor) \
885 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
886
887 static struct {
888 u64 latest_fw;
889 u32 flags;
890 } mthca_hca_table[] = {
891 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
892 .flags = 0 },
893 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
894 .flags = MTHCA_FLAG_PCIE },
895 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0),
896 .flags = MTHCA_FLAG_MEMFREE |
897 MTHCA_FLAG_PCIE },
898 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
899 .flags = MTHCA_FLAG_MEMFREE |
900 MTHCA_FLAG_PCIE |
901 MTHCA_FLAG_SINAI_OPT }
902 };
903
904 static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
905 {
906 int ddr_hidden = 0;
907 int err;
908 struct mthca_dev *mdev;
909
910 printk(KERN_INFO PFX "Initializing %s\n",
911 pci_name(pdev));
912
913 err = pci_enable_device(pdev);
914 if (err) {
915 dev_err(&pdev->dev, "Cannot enable PCI device, "
916 "aborting.\n");
917 return err;
918 }
919
920 /*
921 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
922 * be present)
923 */
924 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
925 pci_resource_len(pdev, 0) != 1 << 20) {
926 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
927 err = -ENODEV;
928 goto err_disable_pdev;
929 }
930 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
931 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
932 err = -ENODEV;
933 goto err_disable_pdev;
934 }
935 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
936 ddr_hidden = 1;
937
938 err = pci_request_regions(pdev, DRV_NAME);
939 if (err) {
940 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
941 "aborting.\n");
942 goto err_disable_pdev;
943 }
944
945 pci_set_master(pdev);
946
947 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
948 if (err) {
949 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
950 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
951 if (err) {
952 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
953 goto err_free_res;
954 }
955 }
956 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
957 if (err) {
958 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
959 "consistent PCI DMA mask.\n");
960 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
961 if (err) {
962 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
963 "aborting.\n");
964 goto err_free_res;
965 }
966 }
967
968 /* We can handle large RDMA requests, so allow larger segments. */
969 dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
970
971 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
972 if (!mdev) {
973 dev_err(&pdev->dev, "Device struct alloc failed, "
974 "aborting.\n");
975 err = -ENOMEM;
976 goto err_free_res;
977 }
978
979 mdev->pdev = pdev;
980
981 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
982 if (ddr_hidden)
983 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
984
985 /*
986 * Now reset the HCA before we touch the PCI capabilities or
987 * attempt a firmware command, since a boot ROM may have left
988 * the HCA in an undefined state.
989 */
990 err = mthca_reset(mdev);
991 if (err) {
992 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
993 goto err_free_dev;
994 }
995
996 if (mthca_cmd_init(mdev)) {
997 mthca_err(mdev, "Failed to init command interface, aborting.\n");
998 goto err_free_dev;
999 }
1000
1001 err = mthca_tune_pci(mdev);
1002 if (err)
1003 goto err_cmd;
1004
1005 err = mthca_init_hca(mdev);
1006 if (err)
1007 goto err_cmd;
1008
1009 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
1010 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
1011 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1012 (int) (mdev->fw_ver & 0xffff),
1013 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1014 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1015 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
1016 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1017 }
1018
1019 if (msi_x && !mthca_enable_msi_x(mdev))
1020 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1021
1022 err = mthca_setup_hca(mdev);
1023 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) {
1024 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1025 pci_disable_msix(pdev);
1026 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X;
1027
1028 err = mthca_setup_hca(mdev);
1029 }
1030
1031 if (err)
1032 goto err_close;
1033
1034 err = mthca_register_device(mdev);
1035 if (err)
1036 goto err_cleanup;
1037
1038 err = mthca_create_agents(mdev);
1039 if (err)
1040 goto err_unregister;
1041
1042 pci_set_drvdata(pdev, mdev);
1043 mdev->hca_type = hca_type;
1044
1045 mdev->active = true;
1046
1047 return 0;
1048
1049 err_unregister:
1050 mthca_unregister_device(mdev);
1051
1052 err_cleanup:
1053 mthca_cleanup_mcg_table(mdev);
1054 mthca_cleanup_av_table(mdev);
1055 mthca_cleanup_qp_table(mdev);
1056 mthca_cleanup_srq_table(mdev);
1057 mthca_cleanup_cq_table(mdev);
1058 mthca_cmd_use_polling(mdev);
1059 mthca_cleanup_eq_table(mdev);
1060
1061 mthca_pd_free(mdev, &mdev->driver_pd);
1062
1063 mthca_cleanup_mr_table(mdev);
1064 mthca_cleanup_pd_table(mdev);
1065 mthca_cleanup_uar_table(mdev);
1066
1067 err_close:
1068 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1069 pci_disable_msix(pdev);
1070
1071 mthca_close_hca(mdev);
1072
1073 err_cmd:
1074 mthca_cmd_cleanup(mdev);
1075
1076 err_free_dev:
1077 ib_dealloc_device(&mdev->ib_dev);
1078
1079 err_free_res:
1080 pci_release_regions(pdev);
1081
1082 err_disable_pdev:
1083 pci_disable_device(pdev);
1084 pci_set_drvdata(pdev, NULL);
1085 return err;
1086 }
1087
1088 static void __mthca_remove_one(struct pci_dev *pdev)
1089 {
1090 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1091 int p;
1092
1093 if (mdev) {
1094 mthca_free_agents(mdev);
1095 mthca_unregister_device(mdev);
1096
1097 for (p = 1; p <= mdev->limits.num_ports; ++p)
1098 mthca_CLOSE_IB(mdev, p);
1099
1100 mthca_cleanup_mcg_table(mdev);
1101 mthca_cleanup_av_table(mdev);
1102 mthca_cleanup_qp_table(mdev);
1103 mthca_cleanup_srq_table(mdev);
1104 mthca_cleanup_cq_table(mdev);
1105 mthca_cmd_use_polling(mdev);
1106 mthca_cleanup_eq_table(mdev);
1107
1108 mthca_pd_free(mdev, &mdev->driver_pd);
1109
1110 mthca_cleanup_mr_table(mdev);
1111 mthca_cleanup_pd_table(mdev);
1112
1113 iounmap(mdev->kar);
1114 mthca_uar_free(mdev, &mdev->driver_uar);
1115 mthca_cleanup_uar_table(mdev);
1116 mthca_close_hca(mdev);
1117 mthca_cmd_cleanup(mdev);
1118
1119 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1120 pci_disable_msix(pdev);
1121
1122 ib_dealloc_device(&mdev->ib_dev);
1123 pci_release_regions(pdev);
1124 pci_disable_device(pdev);
1125 pci_set_drvdata(pdev, NULL);
1126 }
1127 }
1128
1129 int __mthca_restart_one(struct pci_dev *pdev)
1130 {
1131 struct mthca_dev *mdev;
1132 int hca_type;
1133
1134 mdev = pci_get_drvdata(pdev);
1135 if (!mdev)
1136 return -ENODEV;
1137 hca_type = mdev->hca_type;
1138 __mthca_remove_one(pdev);
1139 return __mthca_init_one(pdev, hca_type);
1140 }
1141
1142 static int __devinit mthca_init_one(struct pci_dev *pdev,
1143 const struct pci_device_id *id)
1144 {
1145 int ret;
1146
1147 mutex_lock(&mthca_device_mutex);
1148
1149 printk_once(KERN_INFO "%s", mthca_version);
1150
1151 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1152 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
1153 pci_name(pdev), id->driver_data);
1154 mutex_unlock(&mthca_device_mutex);
1155 return -ENODEV;
1156 }
1157
1158 ret = __mthca_init_one(pdev, id->driver_data);
1159
1160 mutex_unlock(&mthca_device_mutex);
1161
1162 return ret;
1163 }
1164
1165 static void __devexit mthca_remove_one(struct pci_dev *pdev)
1166 {
1167 mutex_lock(&mthca_device_mutex);
1168 __mthca_remove_one(pdev);
1169 mutex_unlock(&mthca_device_mutex);
1170 }
1171
1172 static struct pci_device_id mthca_pci_table[] = {
1173 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1174 .driver_data = TAVOR },
1175 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1176 .driver_data = TAVOR },
1177 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1178 .driver_data = ARBEL_COMPAT },
1179 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1180 .driver_data = ARBEL_COMPAT },
1181 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1182 .driver_data = ARBEL_NATIVE },
1183 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1184 .driver_data = ARBEL_NATIVE },
1185 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1186 .driver_data = SINAI },
1187 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1188 .driver_data = SINAI },
1189 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1190 .driver_data = SINAI },
1191 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1192 .driver_data = SINAI },
1193 { 0, }
1194 };
1195
1196 MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1197
1198 static struct pci_driver mthca_driver = {
1199 .name = DRV_NAME,
1200 .id_table = mthca_pci_table,
1201 .probe = mthca_init_one,
1202 .remove = __devexit_p(mthca_remove_one)
1203 };
1204
1205 static void __init __mthca_check_profile_val(const char *name, int *pval,
1206 int pval_default)
1207 {
1208 /* value must be positive and power of 2 */
1209 int old_pval = *pval;
1210
1211 if (old_pval <= 0)
1212 *pval = pval_default;
1213 else
1214 *pval = roundup_pow_of_two(old_pval);
1215
1216 if (old_pval != *pval) {
1217 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1218 old_pval, name);
1219 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1220 }
1221 }
1222
1223 #define mthca_check_profile_val(name, default) \
1224 __mthca_check_profile_val(#name, &hca_profile.name, default)
1225
1226 static void __init mthca_validate_profile(void)
1227 {
1228 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1229 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1230 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1231 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1232 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1233 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1234 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1235 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1236
1237 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1238 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1239 hca_profile.fmr_reserved_mtts);
1240 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1241 hca_profile.num_mtt);
1242 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1243 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1244 hca_profile.fmr_reserved_mtts);
1245 }
1246
1247 if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) {
1248 printk(KERN_WARNING PFX "bad log_mtts_per_seg (%d). Using default - %d\n",
1249 log_mtts_per_seg, ilog2(MTHCA_MTT_SEG_SIZE / 8));
1250 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8);
1251 }
1252 }
1253
1254 static int __init mthca_init(void)
1255 {
1256 int ret;
1257
1258 mthca_validate_profile();
1259
1260 ret = mthca_catas_init();
1261 if (ret)
1262 return ret;
1263
1264 ret = pci_register_driver(&mthca_driver);
1265 if (ret < 0) {
1266 mthca_catas_cleanup();
1267 return ret;
1268 }
1269
1270 return 0;
1271 }
1272
1273 static void __exit mthca_cleanup(void)
1274 {
1275 pci_unregister_driver(&mthca_driver);
1276 mthca_catas_cleanup();
1277 }
1278
1279 module_init(mthca_init);
1280 module_exit(mthca_cleanup);