drivers/media/common/tuners/max2165.c

   1 /*
   2  *  Driver for Maxim MAX2165 silicon tuner
   3  *
   4  *  Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/videodev2.h>
  25 #include <linux/delay.h>
  26 #include <linux/dvb/frontend.h>
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29
  30 #include "dvb_frontend.h"
  31
  32 #include "max2165.h"
  33 #include "max2165_priv.h"
  34 #include "tuner-i2c.h"
  35
  36 #define dprintk(args...) \
  37         do { \
  38                 if (debug) \
  39                         printk(KERN_DEBUG "max2165: " args); \
  40         } while (0)
  41
  42 static int debug;
  43 module_param(debug, int, 0644);
  44 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  45
  46 static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data)
  47 {
  48         int ret;
  49         u8 buf[] = { reg, data };
  50         struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };
  51
  52         msg.addr = priv->config->i2c_address;
  53
  54         if (debug >= 2)
  55                 dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
  56
  57         ret = i2c_transfer(priv->i2c, &msg, 1);
  58
  59         if (ret != 1)
  60                 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
  61                         __func__, reg, data, ret);
  62
  63         return (ret != 1) ? -EIO : 0;
  64 }
  65
  66 static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data)
  67 {
  68         int ret;
  69         u8 dev_addr = priv->config->i2c_address;
  70
  71         u8 b0[] = { reg };
  72         u8 b1[] = { 0 };
  73         struct i2c_msg msg[] = {
  74                 { .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 },
  75                 { .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 },
  76         };
  77
  78         ret = i2c_transfer(priv->i2c, msg, 2);
  79         if (ret != 2) {
  80                 dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
  81                 return -EIO;
  82         }
  83
  84         *p_data = b1[0];
  85         if (debug >= 2)
  86                 dprintk("%s: reg=0x%02X, data=0x%02X\n",
  87                         __func__, reg, b1[0]);
  88         return 0;
  89 }
  90
  91 static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg,
  92         u8 mask, u8 data)
  93 {
  94         int ret;
  95         u8 v;
  96
  97         data &= mask;
  98         ret = max2165_read_reg(priv, reg, &v);
  99         if (ret != 0)
 100                 return ret;
 101         v &= ~mask;
 102         v |= data;
 103         ret = max2165_write_reg(priv, reg, v);
 104
 105         return ret;
 106 }
 107
 108 static int max2165_read_rom_table(struct max2165_priv *priv)
 109 {
 110         u8 dat[3];
 111         int i;
 112
 113         for (i = 0; i < 3; i++) {
 114                 max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1);
 115                 max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]);
 116         }
 117
 118         priv->tf_ntch_low_cfg = dat[0] >> 4;
 119         priv->tf_ntch_hi_cfg = dat[0] & 0x0F;
 120         priv->tf_balun_low_ref = dat[1] & 0x0F;
 121         priv->tf_balun_hi_ref = dat[1] >> 4;
 122         priv->bb_filter_7mhz_cfg = dat[2] & 0x0F;
 123         priv->bb_filter_8mhz_cfg = dat[2] >> 4;
 124
 125         dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg);
 126         dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg);
 127         dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref);
 128         dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref);
 129         dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg);
 130         dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg);
 131
 132         return 0;
 133 }
 134
 135 static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/)
 136 {
 137         u8 v;
 138
 139         v = (osc / 2);
 140         if (v == 2)
 141                 v = 0x7;
 142         else
 143                 v -= 8;
 144
 145         max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v);
 146
 147         return 0;
 148 }
 149
 150 static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw)
 151 {
 152         u8 val;
 153
 154         if (bw == 8000000)
 155                 val = priv->bb_filter_8mhz_cfg;
 156         else
 157                 val = priv->bb_filter_7mhz_cfg;
 158
 159         max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4);
 160
 161         return 0;
 162 }
 163
 164 int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction)
 165 {
 166         u32 remainder;
 167         u32 q, f = 0;
 168         int i;
 169
 170         if (0 == divisor)
 171                 return -1;
 172
 173         q = dividend / divisor;
 174         remainder = dividend - q * divisor;
 175
 176         for (i = 0; i < 31; i++) {
 177                 remainder <<= 1;
 178                 if (remainder >= divisor) {
 179                         f += 1;
 180                         remainder -= divisor;
 181                 }
 182                 f <<= 1;
 183         }
 184
 185         *quotient = q;
 186         *fraction = f;
 187
 188         return 0;
 189 }
 190
 191 static int max2165_set_rf(struct max2165_priv *priv, u32 freq)
 192 {
 193         u8 tf;
 194         u8 tf_ntch;
 195         u32 t;
 196         u32 quotient, fraction;
 197
 198         /* Set PLL divider according to RF frequency */
 199         fixpt_div32(freq / 1000, priv->config->osc_clk * 1000,
 200                 &quotient, &fraction);
 201
 202         /* 20-bit fraction */
 203         fraction >>= 12;
 204
 205         max2165_write_reg(priv, REG_NDIV_INT, quotient);
 206         max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16);
 207         max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8);
 208         max2165_write_reg(priv, REG_NDIV_FRAC0, fraction);
 209
 210         /* Norch Filter */
 211         tf_ntch = (freq < 725000000) ?
 212                 priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg;
 213
 214         /* Tracking filter balun */
 215         t = priv->tf_balun_low_ref;
 216         t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref)
 217                 * (freq / 1000 - 470000) / (780000 - 470000);
 218
 219         tf = t;
 220         dprintk("tf = %X\n", tf);
 221         tf |= tf_ntch << 4;
 222
 223         max2165_write_reg(priv, REG_TRACK_FILTER, tf);
 224
 225         return 0;
 226 }
 227
 228 static void max2165_debug_status(struct max2165_priv *priv)
 229 {
 230         u8 status, autotune;
 231         u8 auto_vco_success, auto_vco_active;
 232         u8 pll_locked;
 233         u8 dc_offset_low, dc_offset_hi;
 234         u8 signal_lv_over_threshold;
 235         u8 vco, vco_sub_band, adc;
 236
 237         max2165_read_reg(priv, REG_STATUS, &status);
 238         max2165_read_reg(priv, REG_AUTOTUNE, &autotune);
 239
 240         auto_vco_success = (status >> 6) & 0x01;
 241         auto_vco_active = (status >> 5) & 0x01;
 242         pll_locked = (status >> 4) & 0x01;
 243         dc_offset_low = (status >> 3) & 0x01;
 244         dc_offset_hi = (status >> 2) & 0x01;
 245         signal_lv_over_threshold = status & 0x01;
 246
 247         vco = autotune >> 6;
 248         vco_sub_band = (autotune >> 3) & 0x7;
 249         adc = autotune & 0x7;
 250
 251         dprintk("auto VCO active: %d, auto VCO success: %d\n",
 252                 auto_vco_active, auto_vco_success);
 253         dprintk("PLL locked: %d\n", pll_locked);
 254         dprintk("DC offset low: %d, DC offset high: %d\n",
 255                 dc_offset_low, dc_offset_hi);
 256         dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold);
 257         dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc);
 258 }
 259
 260 static int max2165_set_params(struct dvb_frontend *fe)
 261 {
 262         struct max2165_priv *priv = fe->tuner_priv;
 263         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 264         int ret;
 265
 266         switch (c->bandwidth_hz) {
 267         case 7000000:
 268         case 8000000:
 269                 priv->frequency = c->frequency;
 270                 break;
 271         default:
 272                 printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n",
 273                        c->bandwidth_hz);
 274                 return -EINVAL;
 275         }
 276
 277         dprintk("%s() frequency=%d\n", __func__, c->frequency);
 278
 279         if (fe->ops.i2c_gate_ctrl)
 280                 fe->ops.i2c_gate_ctrl(fe, 1);
 281         max2165_set_bandwidth(priv, c->bandwidth_hz);
 282         ret = max2165_set_rf(priv, priv->frequency);
 283         mdelay(50);
 284         max2165_debug_status(priv);
 285         if (fe->ops.i2c_gate_ctrl)
 286                 fe->ops.i2c_gate_ctrl(fe, 0);
 287
 288         if (ret != 0)
 289                 return -EREMOTEIO;
 290
 291         return 0;
 292 }
 293
 294 static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq)
 295 {
 296         struct max2165_priv *priv = fe->tuner_priv;
 297         dprintk("%s()\n", __func__);
 298         *freq = priv->frequency;
 299         return 0;
 300 }
 301
 302 static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
 303 {
 304         struct max2165_priv *priv = fe->tuner_priv;
 305         dprintk("%s()\n", __func__);
 306
 307         *bw = priv->bandwidth;
 308         return 0;
 309 }
 310
 311 static int max2165_get_status(struct dvb_frontend *fe, u32 *status)
 312 {
 313         struct max2165_priv *priv = fe->tuner_priv;
 314         u16 lock_status = 0;
 315
 316         dprintk("%s()\n", __func__);
 317
 318         if (fe->ops.i2c_gate_ctrl)
 319                         fe->ops.i2c_gate_ctrl(fe, 1);
 320
 321         max2165_debug_status(priv);
 322         *status = lock_status;
 323
 324         if (fe->ops.i2c_gate_ctrl)
 325                         fe->ops.i2c_gate_ctrl(fe, 0);
 326
 327         return 0;
 328 }
 329
 330 static int max2165_sleep(struct dvb_frontend *fe)
 331 {
 332         dprintk("%s()\n", __func__);
 333         return 0;
 334 }
 335
 336 static int max2165_init(struct dvb_frontend *fe)
 337 {
 338         struct max2165_priv *priv = fe->tuner_priv;
 339         dprintk("%s()\n", __func__);
 340
 341         if (fe->ops.i2c_gate_ctrl)
 342                 fe->ops.i2c_gate_ctrl(fe, 1);
 343
 344         /* Setup initial values */
 345         /* Fractional Mode on */
 346         max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18);
 347         /* LNA on */
 348         max2165_write_reg(priv, REG_LNA, 0x01);
 349         max2165_write_reg(priv, REG_PLL_CFG, 0x7A);
 350         max2165_write_reg(priv, REG_TEST, 0x08);
 351         max2165_write_reg(priv, REG_SHUTDOWN, 0x40);
 352         max2165_write_reg(priv, REG_VCO_CTRL, 0x84);
 353         max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3);
 354         max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75);
 355         max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00);
 356         max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00);
 357
 358         max2165_set_osc(priv, priv->config->osc_clk);
 359
 360         max2165_read_rom_table(priv);
 361
 362         max2165_set_bandwidth(priv, 8000000);
 363
 364         if (fe->ops.i2c_gate_ctrl)
 365                         fe->ops.i2c_gate_ctrl(fe, 0);
 366
 367         return 0;
 368 }
 369
 370 static int max2165_release(struct dvb_frontend *fe)
 371 {
 372         struct max2165_priv *priv = fe->tuner_priv;
 373         dprintk("%s()\n", __func__);
 374
 375         kfree(priv);
 376         fe->tuner_priv = NULL;
 377
 378         return 0;
 379 }
 380
 381 static const struct dvb_tuner_ops max2165_tuner_ops = {
 382         .info = {
 383                 .name           = "Maxim MAX2165",
 384                 .frequency_min  = 470000000,
 385                 .frequency_max  = 780000000,
 386                 .frequency_step =     50000,
 387         },
 388
 389         .release           = max2165_release,
 390         .init              = max2165_init,
 391         .sleep             = max2165_sleep,
 392
 393         .set_params        = max2165_set_params,
 394         .set_analog_params = NULL,
 395         .get_frequency     = max2165_get_frequency,
 396         .get_bandwidth     = max2165_get_bandwidth,
 397         .get_status        = max2165_get_status
 398 };
 399
 400 struct dvb_frontend *max2165_attach(struct dvb_frontend *fe,
 401                                    struct i2c_adapter *i2c,
 402                                    struct max2165_config *cfg)
 403 {
 404         struct max2165_priv *priv = NULL;
 405
 406         dprintk("%s(%d-%04x)\n", __func__,
 407                 i2c ? i2c_adapter_id(i2c) : -1,
 408                 cfg ? cfg->i2c_address : -1);
 409
 410         priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL);
 411         if (priv == NULL)
 412                 return NULL;
 413
 414         memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops,
 415                 sizeof(struct dvb_tuner_ops));
 416
 417         priv->config = cfg;
 418         priv->i2c = i2c;
 419         fe->tuner_priv = priv;
 420
 421         max2165_init(fe);
 422         max2165_debug_status(priv);
 423
 424         return fe;
 425 }
 426 EXPORT_SYMBOL(max2165_attach);
 427
 428 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
 429 MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver");
 430 MODULE_LICENSE("GPL");