drivers/media/dvb/frontends/hd29l2.c

   1 /*
   2  * HDIC HD29L2 DMB-TH demodulator driver
   3  *
   4  * Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D
   5  *
   6  * Author: Antti Palosaari <crope@iki.fi>
   7  *
   8  *    This program is free software; you can redistribute it and/or modify
   9  *    it under the terms of the GNU General Public License as published by
  10  *    the Free Software Foundation; either version 2 of the License, or
  11  *    (at your option) any later version.
  12  *
  13  *    This program is distributed in the hope that it will be useful,
  14  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *    GNU General Public License for more details.
  17  *
  18  *    You should have received a copy of the GNU General Public License
  19  *    along with this program; if not, write to the Free Software
  20  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include "hd29l2_priv.h"
  24
  25 int hd29l2_debug;
  26 module_param_named(debug, hd29l2_debug, int, 0644);
  27 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  28
  29 /* write multiple registers */
  30 static int hd29l2_wr_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
  31 {
  32         int ret;
  33         u8 buf[2 + len];
  34         struct i2c_msg msg[1] = {
  35                 {
  36                         .addr = priv->cfg.i2c_addr,
  37                         .flags = 0,
  38                         .len = sizeof(buf),
  39                         .buf = buf,
  40                 }
  41         };
  42
  43         buf[0] = 0x00;
  44         buf[1] = reg;
  45         memcpy(&buf[2], val, len);
  46
  47         ret = i2c_transfer(priv->i2c, msg, 1);
  48         if (ret == 1) {
  49                 ret = 0;
  50         } else {
  51                 warn("i2c wr failed=%d reg=%02x len=%d", ret, reg, len);
  52                 ret = -EREMOTEIO;
  53         }
  54
  55         return ret;
  56 }
  57
  58 /* read multiple registers */
  59 static int hd29l2_rd_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
  60 {
  61         int ret;
  62         u8 buf[2] = { 0x00, reg };
  63         struct i2c_msg msg[2] = {
  64                 {
  65                         .addr = priv->cfg.i2c_addr,
  66                         .flags = 0,
  67                         .len = 2,
  68                         .buf = buf,
  69                 }, {
  70                         .addr = priv->cfg.i2c_addr,
  71                         .flags = I2C_M_RD,
  72                         .len = len,
  73                         .buf = val,
  74                 }
  75         };
  76
  77         ret = i2c_transfer(priv->i2c, msg, 2);
  78         if (ret == 2) {
  79                 ret = 0;
  80         } else {
  81                 warn("i2c rd failed=%d reg=%02x len=%d", ret, reg, len);
  82                 ret = -EREMOTEIO;
  83         }
  84
  85         return ret;
  86 }
  87
  88 /* write single register */
  89 static int hd29l2_wr_reg(struct hd29l2_priv *priv, u8 reg, u8 val)
  90 {
  91         return hd29l2_wr_regs(priv, reg, &val, 1);
  92 }
  93
  94 /* read single register */
  95 static int hd29l2_rd_reg(struct hd29l2_priv *priv, u8 reg, u8 *val)
  96 {
  97         return hd29l2_rd_regs(priv, reg, val, 1);
  98 }
  99
 100 /* write single register with mask */
 101 static int hd29l2_wr_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 val, u8 mask)
 102 {
 103         int ret;
 104         u8 tmp;
 105
 106         /* no need for read if whole reg is written */
 107         if (mask != 0xff) {
 108                 ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
 109                 if (ret)
 110                         return ret;
 111
 112                 val &= mask;
 113                 tmp &= ~mask;
 114                 val |= tmp;
 115         }
 116
 117         return hd29l2_wr_regs(priv, reg, &val, 1);
 118 }
 119
 120 /* read single register with mask */
 121 int hd29l2_rd_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 *val, u8 mask)
 122 {
 123         int ret, i;
 124         u8 tmp;
 125
 126         ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
 127         if (ret)
 128                 return ret;
 129
 130         tmp &= mask;
 131
 132         /* find position of the first bit */
 133         for (i = 0; i < 8; i++) {
 134                 if ((mask >> i) & 0x01)
 135                         break;
 136         }
 137         *val = tmp >> i;
 138
 139         return 0;
 140 }
 141
 142 static int hd29l2_soft_reset(struct hd29l2_priv *priv)
 143 {
 144         int ret;
 145         u8 tmp;
 146
 147         ret = hd29l2_rd_reg(priv, 0x26, &tmp);
 148         if (ret)
 149                 goto err;
 150
 151         ret = hd29l2_wr_reg(priv, 0x26, 0x0d);
 152         if (ret)
 153                 goto err;
 154
 155         usleep_range(10000, 20000);
 156
 157         ret = hd29l2_wr_reg(priv, 0x26, tmp);
 158         if (ret)
 159                 goto err;
 160
 161         return 0;
 162 err:
 163         dbg("%s: failed=%d", __func__, ret);
 164         return ret;
 165 }
 166
 167 static int hd29l2_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 168 {
 169         int ret, i;
 170         struct hd29l2_priv *priv = fe->demodulator_priv;
 171         u8 tmp;
 172
 173         dbg("%s: enable=%d", __func__, enable);
 174
 175         /* set tuner address for demod */
 176         if (!priv->tuner_i2c_addr_programmed && enable) {
 177                 /* no need to set tuner address every time, once is enough */
 178                 ret = hd29l2_wr_reg(priv, 0x9d, priv->cfg.tuner_i2c_addr << 1);
 179                 if (ret)
 180                         goto err;
 181
 182                 priv->tuner_i2c_addr_programmed = true;
 183         }
 184
 185         /* open / close gate */
 186         ret = hd29l2_wr_reg(priv, 0x9f, enable);
 187         if (ret)
 188                 goto err;
 189
 190         /* wait demod ready */
 191         for (i = 10; i; i--) {
 192                 ret = hd29l2_rd_reg(priv, 0x9e, &tmp);
 193                 if (ret)
 194                         goto err;
 195
 196                 if (tmp == enable)
 197                         break;
 198
 199                 usleep_range(5000, 10000);
 200         }
 201
 202         dbg("%s: loop=%d", __func__, i);
 203
 204         return ret;
 205 err:
 206         dbg("%s: failed=%d", __func__, ret);
 207         return ret;
 208 }
 209
 210 static int hd29l2_read_status(struct dvb_frontend *fe, fe_status_t *status)
 211 {
 212         int ret;
 213         struct hd29l2_priv *priv = fe->demodulator_priv;
 214         u8 buf[2];
 215
 216         *status = 0;
 217
 218         ret = hd29l2_rd_reg(priv, 0x05, &buf[0]);
 219         if (ret)
 220                 goto err;
 221
 222         if (buf[0] & 0x01) {
 223                 /* full lock */
 224                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
 225                         FE_HAS_SYNC | FE_HAS_LOCK;
 226         } else {
 227                 ret = hd29l2_rd_reg(priv, 0x0d, &buf[1]);
 228                 if (ret)
 229                         goto err;
 230
 231                 if ((buf[1] & 0xfe) == 0x78)
 232                         /* partial lock */
 233                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 234                                 FE_HAS_VITERBI | FE_HAS_SYNC;
 235         }
 236
 237         priv->fe_status = *status;
 238
 239         return 0;
 240 err:
 241         dbg("%s: failed=%d", __func__, ret);
 242         return ret;
 243 }
 244
 245 static int hd29l2_read_snr(struct dvb_frontend *fe, u16 *snr)
 246 {
 247         int ret;
 248         struct hd29l2_priv *priv = fe->demodulator_priv;
 249         u8 buf[2];
 250         u16 tmp;
 251
 252         if (!(priv->fe_status & FE_HAS_LOCK)) {
 253                 *snr = 0;
 254                 ret = 0;
 255                 goto err;
 256         }
 257
 258         ret = hd29l2_rd_regs(priv, 0x0b, buf, 2);
 259         if (ret)
 260                 goto err;
 261
 262         tmp = (buf[0] << 8) | buf[1];
 263
 264         /* report SNR in dB * 10 */
 265         #define LOG10_20736_24 72422627 /* log10(20736) << 24 */
 266         if (tmp)
 267                 *snr = (LOG10_20736_24 - intlog10(tmp)) / ((1 << 24) / 100);
 268         else
 269                 *snr = 0;
 270
 271         return 0;
 272 err:
 273         dbg("%s: failed=%d", __func__, ret);
 274         return ret;
 275 }
 276
 277 static int hd29l2_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 278 {
 279         int ret;
 280         struct hd29l2_priv *priv = fe->demodulator_priv;
 281         u8 buf[2];
 282         u16 tmp;
 283
 284         *strength = 0;
 285
 286         ret = hd29l2_rd_regs(priv, 0xd5, buf, 2);
 287         if (ret)
 288                 goto err;
 289
 290         tmp = buf[0] << 8 | buf[1];
 291         tmp = ~tmp & 0x0fff;
 292
 293         /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
 294         *strength = tmp * 0xffff / 0x0fff;
 295
 296         return 0;
 297 err:
 298         dbg("%s: failed=%d", __func__, ret);
 299         return ret;
 300 }
 301
 302 static int hd29l2_read_ber(struct dvb_frontend *fe, u32 *ber)
 303 {
 304         int ret;
 305         struct hd29l2_priv *priv = fe->demodulator_priv;
 306         u8 buf[2];
 307
 308         if (!(priv->fe_status & FE_HAS_SYNC)) {
 309                 *ber = 0;
 310                 ret = 0;
 311                 goto err;
 312         }
 313
 314         ret = hd29l2_rd_regs(priv, 0xd9, buf, 2);
 315         if (ret) {
 316                 *ber = 0;
 317                 goto err;
 318         }
 319
 320         /* LDPC BER */
 321         *ber = ((buf[0] & 0x0f) << 8) | buf[1];
 322
 323         return 0;
 324 err:
 325         dbg("%s: failed=%d", __func__, ret);
 326         return ret;
 327 }
 328
 329 static int hd29l2_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 330 {
 331         /* no way to read? */
 332         *ucblocks = 0;
 333         return 0;
 334 }
 335
 336 static enum dvbfe_search hd29l2_search(struct dvb_frontend *fe)
 337 {
 338         int ret, i;
 339         struct hd29l2_priv *priv = fe->demodulator_priv;
 340         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 341         u8 tmp, buf[3];
 342         u8 modulation, carrier, guard_interval, interleave, code_rate;
 343         u64 num64;
 344         u32 if_freq, if_ctl;
 345         bool auto_mode;
 346
 347         dbg("%s: delivery_system=%d frequency=%d bandwidth_hz=%d " \
 348                 "modulation=%d inversion=%d fec_inner=%d guard_interval=%d",
 349                  __func__,
 350                 c->delivery_system, c->frequency, c->bandwidth_hz,
 351                 c->modulation, c->inversion, c->fec_inner, c->guard_interval);
 352
 353         /* as for now we detect always params automatically */
 354         auto_mode = true;
 355
 356         /* program tuner */
 357         if (fe->ops.tuner_ops.set_params)
 358                 fe->ops.tuner_ops.set_params(fe);
 359
 360         /* get and program IF */
 361         if (fe->ops.tuner_ops.get_if_frequency)
 362                 fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
 363         else
 364                 if_freq = 0;
 365
 366         if (if_freq) {
 367                 /* normal IF */
 368
 369                 /* calc IF control value */
 370                 num64 = if_freq;
 371                 num64 *= 0x800000;
 372                 num64 = div_u64(num64, HD29L2_XTAL);
 373                 num64 -= 0x800000;
 374                 if_ctl = num64;
 375
 376                 tmp = 0xfc; /* tuner type normal */
 377         } else {
 378                 /* zero IF */
 379                 if_ctl = 0;
 380                 tmp = 0xfe; /* tuner type Zero-IF */
 381         }
 382
 383         buf[0] = ((if_ctl >>  0) & 0xff);
 384         buf[1] = ((if_ctl >>  8) & 0xff);
 385         buf[2] = ((if_ctl >> 16) & 0xff);
 386
 387         /* program IF control */
 388         ret = hd29l2_wr_regs(priv, 0x14, buf, 3);
 389         if (ret)
 390                 goto err;
 391
 392         /* program tuner type */
 393         ret = hd29l2_wr_reg(priv, 0xab, tmp);
 394         if (ret)
 395                 goto err;
 396
 397         dbg("%s: if_freq=%d if_ctl=%x", __func__, if_freq, if_ctl);
 398
 399         if (auto_mode) {
 400                 /*
 401                  * use auto mode
 402                  */
 403
 404                 /* disable quick mode */
 405                 ret = hd29l2_wr_reg_mask(priv, 0xac, 0 << 7, 0x80);
 406                 if (ret)
 407                         goto err;
 408
 409                 ret = hd29l2_wr_reg_mask(priv, 0x82, 1 << 1, 0x02);
 410                 if (ret)
 411                         goto err;
 412
 413                 /* enable auto mode */
 414                 ret = hd29l2_wr_reg_mask(priv, 0x7d, 1 << 6, 0x40);
 415                 if (ret)
 416                         goto err;
 417
 418                 ret = hd29l2_wr_reg_mask(priv, 0x81, 1 << 3, 0x08);
 419                 if (ret)
 420                         goto err;
 421
 422                 /* soft reset */
 423                 ret = hd29l2_soft_reset(priv);
 424                 if (ret)
 425                         goto err;
 426
 427                 /* detect modulation */
 428                 for (i = 30; i; i--) {
 429                         msleep(100);
 430
 431                         ret = hd29l2_rd_reg(priv, 0x0d, &tmp);
 432                         if (ret)
 433                                 goto err;
 434
 435                         if ((((tmp & 0xf0) >= 0x10) &&
 436                                 ((tmp & 0x0f) == 0x08)) || (tmp >= 0x2c))
 437                                 break;
 438                 }
 439
 440                 dbg("%s: loop=%d", __func__, i);
 441
 442                 if (i == 0)
 443                         /* detection failed */
 444                         return DVBFE_ALGO_SEARCH_FAILED;
 445
 446                 /* read modulation */
 447                 ret = hd29l2_rd_reg_mask(priv, 0x7d, &modulation, 0x07);
 448                 if (ret)
 449                         goto err;
 450         } else {
 451                 /*
 452                  * use manual mode
 453                  */
 454
 455                 modulation = HD29L2_QAM64;
 456                 carrier = HD29L2_CARRIER_MULTI;
 457                 guard_interval = HD29L2_PN945;
 458                 interleave = HD29L2_INTERLEAVER_420;
 459                 code_rate = HD29L2_CODE_RATE_08;
 460
 461                 tmp = (code_rate << 3) | modulation;
 462                 ret = hd29l2_wr_reg_mask(priv, 0x7d, tmp, 0x5f);
 463                 if (ret)
 464                         goto err;
 465
 466                 tmp = (carrier << 2) | guard_interval;
 467                 ret = hd29l2_wr_reg_mask(priv, 0x81, tmp, 0x0f);
 468                 if (ret)
 469                         goto err;
 470
 471                 tmp = interleave;
 472                 ret = hd29l2_wr_reg_mask(priv, 0x82, tmp, 0x03);
 473                 if (ret)
 474                         goto err;
 475         }
 476
 477         /* ensure modulation validy */
 478         /* 0=QAM4_NR, 1=QAM4, 2=QAM16, 3=QAM32, 4=QAM64 */
 479         if (modulation > (ARRAY_SIZE(reg_mod_vals_tab[0].val) - 1)) {
 480                 dbg("%s: modulation=%d not valid", __func__, modulation);
 481                 goto err;
 482         }
 483
 484         /* program registers according to modulation */
 485         for (i = 0; i < ARRAY_SIZE(reg_mod_vals_tab); i++) {
 486                 ret = hd29l2_wr_reg(priv, reg_mod_vals_tab[i].reg,
 487                         reg_mod_vals_tab[i].val[modulation]);
 488                 if (ret)
 489                         goto err;
 490         }
 491
 492         /* read guard interval */
 493         ret = hd29l2_rd_reg_mask(priv, 0x81, &guard_interval, 0x03);
 494         if (ret)
 495                 goto err;
 496
 497         /* read carrier mode */
 498         ret = hd29l2_rd_reg_mask(priv, 0x81, &carrier, 0x04);
 499         if (ret)
 500                 goto err;
 501
 502         dbg("%s: modulation=%d guard_interval=%d carrier=%d",
 503                 __func__, modulation, guard_interval, carrier);
 504
 505         if ((carrier == HD29L2_CARRIER_MULTI) && (modulation == HD29L2_QAM64) &&
 506                 (guard_interval == HD29L2_PN945)) {
 507                 dbg("%s: C=3780 && QAM64 && PN945", __func__);
 508
 509                 ret = hd29l2_wr_reg(priv, 0x42, 0x33);
 510                 if (ret)
 511                         goto err;
 512
 513                 ret = hd29l2_wr_reg(priv, 0xdd, 0x01);
 514                 if (ret)
 515                         goto err;
 516         }
 517
 518         usleep_range(10000, 20000);
 519
 520         /* soft reset */
 521         ret = hd29l2_soft_reset(priv);
 522         if (ret)
 523                 goto err;
 524
 525         /* wait demod lock */
 526         for (i = 30; i; i--) {
 527                 msleep(100);
 528
 529                 /* read lock bit */
 530                 ret = hd29l2_rd_reg_mask(priv, 0x05, &tmp, 0x01);
 531                 if (ret)
 532                         goto err;
 533
 534                 if (tmp)
 535                         break;
 536         }
 537
 538         dbg("%s: loop=%d", __func__, i);
 539
 540         if (i == 0)
 541                 return DVBFE_ALGO_SEARCH_AGAIN;
 542
 543         return DVBFE_ALGO_SEARCH_SUCCESS;
 544 err:
 545         dbg("%s: failed=%d", __func__, ret);
 546         return DVBFE_ALGO_SEARCH_ERROR;
 547 }
 548
 549 static int hd29l2_get_frontend_algo(struct dvb_frontend *fe)
 550 {
 551         return DVBFE_ALGO_CUSTOM;
 552 }
 553
 554 static int hd29l2_get_frontend(struct dvb_frontend *fe)
 555 {
 556         int ret;
 557         struct hd29l2_priv *priv = fe->demodulator_priv;
 558         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 559         u8 buf[3];
 560         u32 if_ctl;
 561         char *str_constellation, *str_code_rate, *str_constellation_code_rate,
 562                 *str_guard_interval, *str_carrier, *str_guard_interval_carrier,
 563                 *str_interleave, *str_interleave_;
 564
 565         ret = hd29l2_rd_reg(priv, 0x7d, &buf[0]);
 566         if (ret)
 567                 goto err;
 568
 569         ret = hd29l2_rd_regs(priv, 0x81, &buf[1], 2);
 570         if (ret)
 571                 goto err;
 572
 573         /* constellation, 0x7d[2:0] */
 574         switch ((buf[0] >> 0) & 0x07) {
 575         case 0: /* QAM4NR */
 576                 str_constellation = "QAM4NR";
 577                 c->modulation = QAM_AUTO; /* FIXME */
 578                 break;
 579         case 1: /* QAM4 */
 580                 str_constellation = "QAM4";
 581                 c->modulation = QPSK; /* FIXME */
 582                 break;
 583         case 2:
 584                 str_constellation = "QAM16";
 585                 c->modulation = QAM_16;
 586                 break;
 587         case 3:
 588                 str_constellation = "QAM32";
 589                 c->modulation = QAM_32;
 590                 break;
 591         case 4:
 592                 str_constellation = "QAM64";
 593                 c->modulation = QAM_64;
 594                 break;
 595         default:
 596                 str_constellation = "?";
 597         }
 598
 599         /* LDPC code rate, 0x7d[4:3] */
 600         switch ((buf[0] >> 3) & 0x03) {
 601         case 0: /* 0.4 */
 602                 str_code_rate = "0.4";
 603                 c->fec_inner = FEC_AUTO; /* FIXME */
 604                 break;
 605         case 1: /* 0.6 */
 606                 str_code_rate = "0.6";
 607                 c->fec_inner = FEC_3_5;
 608                 break;
 609         case 2: /* 0.8 */
 610                 str_code_rate = "0.8";
 611                 c->fec_inner = FEC_4_5;
 612                 break;
 613         default:
 614                 str_code_rate = "?";
 615         }
 616
 617         /* constellation & code rate set, 0x7d[6] */
 618         switch ((buf[0] >> 6) & 0x01) {
 619         case 0:
 620                 str_constellation_code_rate = "manual";
 621                 break;
 622         case 1:
 623                 str_constellation_code_rate = "auto";
 624                 break;
 625         default:
 626                 str_constellation_code_rate = "?";
 627         }
 628
 629         /* frame header, 0x81[1:0] */
 630         switch ((buf[1] >> 0) & 0x03) {
 631         case 0: /* PN945 */
 632                 str_guard_interval = "PN945";
 633                 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
 634                 break;
 635         case 1: /* PN595 */
 636                 str_guard_interval = "PN595";
 637                 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
 638                 break;
 639         case 2: /* PN420 */
 640                 str_guard_interval = "PN420";
 641                 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
 642                 break;
 643         default:
 644                 str_guard_interval = "?";
 645         }
 646
 647         /* carrier, 0x81[2] */
 648         switch ((buf[1] >> 2) & 0x01) {
 649         case 0:
 650                 str_carrier = "C=1";
 651                 break;
 652         case 1:
 653                 str_carrier = "C=3780";
 654                 break;
 655         default:
 656                 str_carrier = "?";
 657         }
 658
 659         /* frame header & carrier set, 0x81[3] */
 660         switch ((buf[1] >> 3) & 0x01) {
 661         case 0:
 662                 str_guard_interval_carrier = "manual";
 663                 break;
 664         case 1:
 665                 str_guard_interval_carrier = "auto";
 666                 break;
 667         default:
 668                 str_guard_interval_carrier = "?";
 669         }
 670
 671         /* interleave, 0x82[0] */
 672         switch ((buf[2] >> 0) & 0x01) {
 673         case 0:
 674                 str_interleave = "M=720";
 675                 break;
 676         case 1:
 677                 str_interleave = "M=240";
 678                 break;
 679         default:
 680                 str_interleave = "?";
 681         }
 682
 683         /* interleave set, 0x82[1] */
 684         switch ((buf[2] >> 1) & 0x01) {
 685         case 0:
 686                 str_interleave_ = "manual";
 687                 break;
 688         case 1:
 689                 str_interleave_ = "auto";
 690                 break;
 691         default:
 692                 str_interleave_ = "?";
 693         }
 694
 695         /*
 696          * We can read out current detected NCO and use that value next
 697          * time instead of calculating new value from targed IF.
 698          * I think it will not effect receiver sensitivity but gaining lock
 699          * after tune could be easier...
 700          */
 701         ret = hd29l2_rd_regs(priv, 0xb1, &buf[0], 3);
 702         if (ret)
 703                 goto err;
 704
 705         if_ctl = (buf[0] << 16) | ((buf[1] - 7) << 8) | buf[2];
 706
 707         dbg("%s: %s %s %s | %s %s %s | %s %s | NCO=%06x", __func__,
 708                 str_constellation, str_code_rate, str_constellation_code_rate,
 709                 str_guard_interval, str_carrier, str_guard_interval_carrier,
 710                 str_interleave, str_interleave_, if_ctl);
 711
 712         return 0;
 713 err:
 714         dbg("%s: failed=%d", __func__, ret);
 715         return ret;
 716 }
 717
 718 static int hd29l2_init(struct dvb_frontend *fe)
 719 {
 720         int ret, i;
 721         struct hd29l2_priv *priv = fe->demodulator_priv;
 722         u8 tmp;
 723         static const struct reg_val tab[] = {
 724                 { 0x3a, 0x06 },
 725                 { 0x3b, 0x03 },
 726                 { 0x3c, 0x04 },
 727                 { 0xaf, 0x06 },
 728                 { 0xb0, 0x1b },
 729                 { 0x80, 0x64 },
 730                 { 0x10, 0x38 },
 731         };
 732
 733         dbg("%s:", __func__);
 734
 735         /* reset demod */
 736         /* it is recommended to HW reset chip using RST_N pin */
 737         if (fe->callback) {
 738                 ret = fe->callback(fe, DVB_FRONTEND_COMPONENT_DEMOD, 0, 0);
 739                 if (ret)
 740                         goto err;
 741
 742                 /* reprogramming needed because HW reset clears registers */
 743                 priv->tuner_i2c_addr_programmed = false;
 744         }
 745
 746         /* init */
 747         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 748                 ret = hd29l2_wr_reg(priv, tab[i].reg, tab[i].val);
 749                 if (ret)
 750                         goto err;
 751         }
 752
 753         /* TS params */
 754         ret = hd29l2_rd_reg(priv, 0x36, &tmp);
 755         if (ret)
 756                 goto err;
 757
 758         tmp &= 0x1b;
 759         tmp |= priv->cfg.ts_mode;
 760         ret = hd29l2_wr_reg(priv, 0x36, tmp);
 761         if (ret)
 762                 goto err;
 763
 764         ret = hd29l2_rd_reg(priv, 0x31, &tmp);
 765         tmp &= 0xef;
 766
 767         if (!(priv->cfg.ts_mode >> 7))
 768                 /* set b4 for serial TS */
 769                 tmp |= 0x10;
 770
 771         ret = hd29l2_wr_reg(priv, 0x31, tmp);
 772         if (ret)
 773                 goto err;
 774
 775         return ret;
 776 err:
 777         dbg("%s: failed=%d", __func__, ret);
 778         return ret;
 779 }
 780
 781 static void hd29l2_release(struct dvb_frontend *fe)
 782 {
 783         struct hd29l2_priv *priv = fe->demodulator_priv;
 784         kfree(priv);
 785 }
 786
 787 static struct dvb_frontend_ops hd29l2_ops;
 788
 789 struct dvb_frontend *hd29l2_attach(const struct hd29l2_config *config,
 790         struct i2c_adapter *i2c)
 791 {
 792         int ret;
 793         struct hd29l2_priv *priv = NULL;
 794         u8 tmp;
 795
 796         /* allocate memory for the internal state */
 797         priv = kzalloc(sizeof(struct hd29l2_priv), GFP_KERNEL);
 798         if (priv == NULL)
 799                 goto err;
 800
 801         /* setup the state */
 802         priv->i2c = i2c;
 803         memcpy(&priv->cfg, config, sizeof(struct hd29l2_config));
 804
 805
 806         /* check if the demod is there */
 807         ret = hd29l2_rd_reg(priv, 0x00, &tmp);
 808         if (ret)
 809                 goto err;
 810
 811         /* create dvb_frontend */
 812         memcpy(&priv->fe.ops, &hd29l2_ops, sizeof(struct dvb_frontend_ops));
 813         priv->fe.demodulator_priv = priv;
 814
 815         return &priv->fe;
 816 err:
 817         kfree(priv);
 818         return NULL;
 819 }
 820 EXPORT_SYMBOL(hd29l2_attach);
 821
 822 static struct dvb_frontend_ops hd29l2_ops = {
 823         .delsys = { SYS_DVBT },
 824         .info = {
 825                 .name = "HDIC HD29L2 DMB-TH",
 826                 .frequency_min = 474000000,
 827                 .frequency_max = 858000000,
 828                 .frequency_stepsize = 10000,
 829                 .caps = FE_CAN_FEC_AUTO |
 830                         FE_CAN_QPSK |
 831                         FE_CAN_QAM_16 |
 832                         FE_CAN_QAM_32 |
 833                         FE_CAN_QAM_64 |
 834                         FE_CAN_QAM_AUTO |
 835                         FE_CAN_TRANSMISSION_MODE_AUTO |
 836                         FE_CAN_BANDWIDTH_AUTO |
 837                         FE_CAN_GUARD_INTERVAL_AUTO |
 838                         FE_CAN_HIERARCHY_AUTO |
 839                         FE_CAN_RECOVER
 840         },
 841
 842         .release = hd29l2_release,
 843
 844         .init = hd29l2_init,
 845
 846         .get_frontend_algo = hd29l2_get_frontend_algo,
 847         .search = hd29l2_search,
 848         .get_frontend = hd29l2_get_frontend,
 849
 850         .read_status = hd29l2_read_status,
 851         .read_snr = hd29l2_read_snr,
 852         .read_signal_strength = hd29l2_read_signal_strength,
 853         .read_ber = hd29l2_read_ber,
 854         .read_ucblocks = hd29l2_read_ucblocks,
 855
 856         .i2c_gate_ctrl = hd29l2_i2c_gate_ctrl,
 857 };
 858
 859 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
 860 MODULE_DESCRIPTION("HDIC HD29L2 DMB-TH demodulator driver");
 861 MODULE_LICENSE("GPL");