Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / media / video / omap3isp / isph3a.h
blobfb09fd4ca7559f744ed49a4554a00e38f2d88933
1 /*
2 * isph3a.h
4 * TI OMAP3 ISP - H3A AF module
6 * Copyright (C) 2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
9 * Contacts: David Cohen <dacohen@gmail.com>
10 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
28 #ifndef OMAP3_ISP_H3A_H
29 #define OMAP3_ISP_H3A_H
31 #include <linux/omap3isp.h>
34 * ----------
35 * -H3A AEWB-
36 * ----------
39 #define AEWB_PACKET_SIZE 16
40 #define AEWB_SATURATION_LIMIT 0x3ff
42 /* Flags for changed registers */
43 #define PCR_CHNG (1 << 0)
44 #define AEWWIN1_CHNG (1 << 1)
45 #define AEWINSTART_CHNG (1 << 2)
46 #define AEWINBLK_CHNG (1 << 3)
47 #define AEWSUBWIN_CHNG (1 << 4)
48 #define PRV_WBDGAIN_CHNG (1 << 5)
49 #define PRV_WBGAIN_CHNG (1 << 6)
51 /* ISPH3A REGISTERS bits */
52 #define ISPH3A_PCR_AF_EN (1 << 0)
53 #define ISPH3A_PCR_AF_ALAW_EN (1 << 1)
54 #define ISPH3A_PCR_AF_MED_EN (1 << 2)
55 #define ISPH3A_PCR_AF_BUSY (1 << 15)
56 #define ISPH3A_PCR_AEW_EN (1 << 16)
57 #define ISPH3A_PCR_AEW_ALAW_EN (1 << 17)
58 #define ISPH3A_PCR_AEW_BUSY (1 << 18)
59 #define ISPH3A_PCR_AEW_MASK (ISPH3A_PCR_AEW_ALAW_EN | \
60 ISPH3A_PCR_AEW_AVE2LMT_MASK)
63 * --------
64 * -H3A AF-
65 * --------
68 /* Peripheral Revision */
69 #define AFPID 0x0
71 #define AFCOEF_OFFSET 0x00000004 /* COEF base address */
73 /* PCR fields */
74 #define AF_BUSYAF (1 << 15)
75 #define AF_FVMODE (1 << 14)
76 #define AF_RGBPOS (0x7 << 11)
77 #define AF_MED_TH (0xFF << 3)
78 #define AF_MED_EN (1 << 2)
79 #define AF_ALAW_EN (1 << 1)
80 #define AF_EN (1 << 0)
81 #define AF_PCR_MASK (AF_FVMODE | AF_RGBPOS | AF_MED_TH | \
82 AF_MED_EN | AF_ALAW_EN)
84 /* AFPAX1 fields */
85 #define AF_PAXW (0x7F << 16)
86 #define AF_PAXH 0x7F
88 /* AFPAX2 fields */
89 #define AF_AFINCV (0xF << 13)
90 #define AF_PAXVC (0x7F << 6)
91 #define AF_PAXHC 0x3F
93 /* AFPAXSTART fields */
94 #define AF_PAXSH (0xFFF<<16)
95 #define AF_PAXSV 0xFFF
97 /* COEFFICIENT MASK */
98 #define AF_COEF_MASK0 0xFFF
99 #define AF_COEF_MASK1 (0xFFF<<16)
101 /* BIT SHIFTS */
102 #define AF_RGBPOS_SHIFT 11
103 #define AF_MED_TH_SHIFT 3
104 #define AF_PAXW_SHIFT 16
105 #define AF_LINE_INCR_SHIFT 13
106 #define AF_VT_COUNT_SHIFT 6
107 #define AF_HZ_START_SHIFT 16
108 #define AF_COEF_SHIFT 16
110 /* Init and cleanup functions */
111 int omap3isp_h3a_aewb_init(struct isp_device *isp);
112 int omap3isp_h3a_af_init(struct isp_device *isp);
114 void omap3isp_h3a_aewb_cleanup(struct isp_device *isp);
115 void omap3isp_h3a_af_cleanup(struct isp_device *isp);
117 #endif /* OMAP3_ISP_H3A_H */