drivers/media/video/s5p-mfc/s5p_mfc_opr.h

   1 /*
   2  * drivers/media/video/samsung/mfc5/s5p_mfc_opr.h
   3  *
   4  * Header file for Samsung MFC (Multi Function Codec - FIMV) driver
   5  * Contains declarations of hw related functions.
   6  *
   7  * Kamil Debski, Copyright (C) 2011 Samsung Electronics
   8  * http://www.samsung.com/
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #ifndef S5P_MFC_OPR_H_
  16 #define S5P_MFC_OPR_H_
  17
  18 #include "s5p_mfc_common.h"
  19
  20 int s5p_mfc_init_decode(struct s5p_mfc_ctx *ctx);
  21 int s5p_mfc_init_encode(struct s5p_mfc_ctx *mfc_ctx);
  22
  23 /* Decoding functions */
  24 int s5p_mfc_set_dec_frame_buffer(struct s5p_mfc_ctx *ctx);
  25 int s5p_mfc_set_dec_stream_buffer(struct s5p_mfc_ctx *ctx, int buf_addr,
  26                                                   unsigned int start_num_byte,
  27                                                   unsigned int buf_size);
  28
  29 /* Encoding functions */
  30 void s5p_mfc_set_enc_frame_buffer(struct s5p_mfc_ctx *ctx,
  31                 unsigned long y_addr, unsigned long c_addr);
  32 int s5p_mfc_set_enc_stream_buffer(struct s5p_mfc_ctx *ctx,
  33                 unsigned long addr, unsigned int size);
  34 void s5p_mfc_get_enc_frame_buffer(struct s5p_mfc_ctx *ctx,
  35                 unsigned long *y_addr, unsigned long *c_addr);
  36 int s5p_mfc_set_enc_ref_buffer(struct s5p_mfc_ctx *mfc_ctx);
  37
  38 int s5p_mfc_decode_one_frame(struct s5p_mfc_ctx *ctx,
  39                                         enum s5p_mfc_decode_arg last_frame);
  40 int s5p_mfc_encode_one_frame(struct s5p_mfc_ctx *mfc_ctx);
  41
  42 /* Memory allocation */
  43 int s5p_mfc_alloc_dec_temp_buffers(struct s5p_mfc_ctx *ctx);
  44 void s5p_mfc_set_dec_desc_buffer(struct s5p_mfc_ctx *ctx);
  45 void s5p_mfc_release_dec_desc_buffer(struct s5p_mfc_ctx *ctx);
  46
  47 int s5p_mfc_alloc_codec_buffers(struct s5p_mfc_ctx *ctx);
  48 void s5p_mfc_release_codec_buffers(struct s5p_mfc_ctx *ctx);
  49
  50 int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx);
  51 void s5p_mfc_release_instance_buffer(struct s5p_mfc_ctx *ctx);
  52
  53 void s5p_mfc_try_run(struct s5p_mfc_dev *dev);
  54 void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
  55
  56 #define s5p_mfc_get_dspl_y_adr()        (readl(dev->regs_base + \
  57                                         S5P_FIMV_SI_DISPLAY_Y_ADR) << \
  58                                         MFC_OFFSET_SHIFT)
  59 #define s5p_mfc_get_dec_y_adr()         (readl(dev->regs_base + \
  60                                         S5P_FIMV_SI_DISPLAY_Y_ADR) << \
  61                                         MFC_OFFSET_SHIFT)
  62 #define s5p_mfc_get_dspl_status()       readl(dev->regs_base + \
  63                                                 S5P_FIMV_SI_DISPLAY_STATUS)
  64 #define s5p_mfc_get_frame_type()        (readl(dev->regs_base + \
  65                                                 S5P_FIMV_DECODE_FRAME_TYPE) \
  66                                         & S5P_FIMV_DECODE_FRAME_MASK)
  67 #define s5p_mfc_get_consumed_stream()   readl(dev->regs_base + \
  68                                                 S5P_FIMV_SI_CONSUMED_BYTES)
  69 #define s5p_mfc_get_int_reason()        (readl(dev->regs_base + \
  70                                         S5P_FIMV_RISC2HOST_CMD) & \
  71                                         S5P_FIMV_RISC2HOST_CMD_MASK)
  72 #define s5p_mfc_get_int_err()           readl(dev->regs_base + \
  73                                                 S5P_FIMV_RISC2HOST_ARG2)
  74 #define s5p_mfc_err_dec(x)              (((x) & S5P_FIMV_ERR_DEC_MASK) >> \
  75                                                         S5P_FIMV_ERR_DEC_SHIFT)
  76 #define s5p_mfc_err_dspl(x)             (((x) & S5P_FIMV_ERR_DSPL_MASK) >> \
  77                                                         S5P_FIMV_ERR_DSPL_SHIFT)
  78 #define s5p_mfc_get_img_width()         readl(dev->regs_base + \
  79                                                 S5P_FIMV_SI_HRESOL)
  80 #define s5p_mfc_get_img_height()        readl(dev->regs_base + \
  81                                                 S5P_FIMV_SI_VRESOL)
  82 #define s5p_mfc_get_dpb_count()         readl(dev->regs_base + \
  83                                                 S5P_FIMV_SI_BUF_NUMBER)
  84 #define s5p_mfc_get_inst_no()           readl(dev->regs_base + \
  85                                                 S5P_FIMV_RISC2HOST_ARG1)
  86 #define s5p_mfc_get_enc_strm_size()     readl(dev->regs_base + \
  87                                                 S5P_FIMV_ENC_SI_STRM_SIZE)
  88 #define s5p_mfc_get_enc_slice_type()    readl(dev->regs_base + \
  89                                                 S5P_FIMV_ENC_SI_SLICE_TYPE)
  90
  91 #endif /* S5P_MFC_OPR_H_ */