Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / net / can / softing / softing.h
blobafd7d85b69155a4259748b2c2648bc2739835d38
1 /*
2 * softing common interfaces
4 * by Kurt Van Dijck, 2008-2010
5 */
7 #include <linux/atomic.h>
8 #include <linux/netdevice.h>
9 #include <linux/ktime.h>
10 #include <linux/mutex.h>
11 #include <linux/spinlock.h>
12 #include <linux/can.h>
13 #include <linux/can/dev.h>
15 #include "softing_platform.h"
17 struct softing;
19 struct softing_priv {
20 struct can_priv can; /* must be the first member! */
21 struct net_device *netdev;
22 struct softing *card;
23 struct {
24 int pending;
25 /* variables which hold the circular buffer */
26 int echo_put;
27 int echo_get;
28 } tx;
29 struct can_bittiming_const btr_const;
30 int index;
31 uint8_t output;
32 uint16_t chip;
34 #define netdev2softing(netdev) ((struct softing_priv *)netdev_priv(netdev))
36 struct softing {
37 const struct softing_platform_data *pdat;
38 struct platform_device *pdev;
39 struct net_device *net[2];
40 spinlock_t spin; /* protect this structure & DPRAM access */
41 ktime_t ts_ref;
42 ktime_t ts_overflow; /* timestamp overflow value, in ktime */
44 struct {
45 /* indication of firmware status */
46 int up;
47 /* protection of the 'up' variable */
48 struct mutex lock;
49 } fw;
50 struct {
51 int nr;
52 int requested;
53 int svc_count;
54 unsigned int dpram_position;
55 } irq;
56 struct {
57 int pending;
58 int last_bus;
60 * keep the bus that last tx'd a message,
61 * in order to let every netdev queue resume
63 } tx;
64 __iomem uint8_t *dpram;
65 unsigned long dpram_phys;
66 unsigned long dpram_size;
67 struct {
68 uint16_t fw_version, hw_version, license, serial;
69 uint16_t chip[2];
70 unsigned int freq; /* remote cpu's operating frequency */
71 } id;
74 extern int softing_default_output(struct net_device *netdev);
76 extern ktime_t softing_raw2ktime(struct softing *card, u32 raw);
78 extern int softing_chip_poweron(struct softing *card);
80 extern int softing_bootloader_command(struct softing *card, int16_t cmd,
81 const char *msg);
83 /* Load firmware after reset */
84 extern int softing_load_fw(const char *file, struct softing *card,
85 __iomem uint8_t *virt, unsigned int size, int offset);
87 /* Load final application firmware after bootloader */
88 extern int softing_load_app_fw(const char *file, struct softing *card);
91 * enable or disable irq
92 * only called with fw.lock locked
94 extern int softing_enable_irq(struct softing *card, int enable);
96 /* start/stop 1 bus on card */
97 extern int softing_startstop(struct net_device *netdev, int up);
99 /* netif_rx() */
100 extern int softing_netdev_rx(struct net_device *netdev,
101 const struct can_frame *msg, ktime_t ktime);
103 /* SOFTING DPRAM mappings */
104 #define DPRAM_RX 0x0000
105 #define DPRAM_RX_SIZE 32
106 #define DPRAM_RX_CNT 16
107 #define DPRAM_RX_RD 0x0201 /* uint8_t */
108 #define DPRAM_RX_WR 0x0205 /* uint8_t */
109 #define DPRAM_RX_LOST 0x0207 /* uint8_t */
111 #define DPRAM_FCT_PARAM 0x0300 /* int16_t [20] */
112 #define DPRAM_FCT_RESULT 0x0328 /* int16_t */
113 #define DPRAM_FCT_HOST 0x032b /* uint16_t */
115 #define DPRAM_INFO_BUSSTATE 0x0331 /* uint16_t */
116 #define DPRAM_INFO_BUSSTATE2 0x0335 /* uint16_t */
117 #define DPRAM_INFO_ERRSTATE 0x0339 /* uint16_t */
118 #define DPRAM_INFO_ERRSTATE2 0x033d /* uint16_t */
119 #define DPRAM_RESET 0x0341 /* uint16_t */
120 #define DPRAM_CLR_RECV_FIFO 0x0345 /* uint16_t */
121 #define DPRAM_RESET_TIME 0x034d /* uint16_t */
122 #define DPRAM_TIME 0x0350 /* uint64_t */
123 #define DPRAM_WR_START 0x0358 /* uint8_t */
124 #define DPRAM_WR_END 0x0359 /* uint8_t */
125 #define DPRAM_RESET_RX_FIFO 0x0361 /* uint16_t */
126 #define DPRAM_RESET_TX_FIFO 0x0364 /* uint8_t */
127 #define DPRAM_READ_FIFO_LEVEL 0x0365 /* uint8_t */
128 #define DPRAM_RX_FIFO_LEVEL 0x0366 /* uint16_t */
129 #define DPRAM_TX_FIFO_LEVEL 0x0366 /* uint16_t */
131 #define DPRAM_TX 0x0400 /* uint16_t */
132 #define DPRAM_TX_SIZE 16
133 #define DPRAM_TX_CNT 32
134 #define DPRAM_TX_RD 0x0601 /* uint8_t */
135 #define DPRAM_TX_WR 0x0605 /* uint8_t */
137 #define DPRAM_COMMAND 0x07e0 /* uint16_t */
138 #define DPRAM_RECEIPT 0x07f0 /* uint16_t */
139 #define DPRAM_IRQ_TOHOST 0x07fe /* uint8_t */
140 #define DPRAM_IRQ_TOCARD 0x07ff /* uint8_t */
142 #define DPRAM_V2_RESET 0x0e00 /* uint8_t */
143 #define DPRAM_V2_IRQ_TOHOST 0x0e02 /* uint8_t */
145 #define TXMAX (DPRAM_TX_CNT - 1)
147 /* DPRAM return codes */
148 #define RES_NONE 0
149 #define RES_OK 1
150 #define RES_NOK 2
151 #define RES_UNKNOWN 3
152 /* DPRAM flags */
153 #define CMD_TX 0x01
154 #define CMD_ACK 0x02
155 #define CMD_XTD 0x04
156 #define CMD_RTR 0x08
157 #define CMD_ERR 0x10
158 #define CMD_BUS2 0x80
160 /* returned fifo entry bus state masks */
161 #define SF_MASK_BUSOFF 0x80
162 #define SF_MASK_EPASSIVE 0x60
164 /* bus states */
165 #define STATE_BUSOFF 2
166 #define STATE_EPASSIVE 1
167 #define STATE_EACTIVE 0