drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #ifndef _IXGBE_MBX_H_
  29 #define _IXGBE_MBX_H_
  30
  31 #include "ixgbe_type.h"
  32
  33 #define IXGBE_VFMAILBOX_SIZE        16 /* 16 32 bit words - 64 bytes */
  34 #define IXGBE_ERR_MBX               -100
  35
  36 #define IXGBE_VFMAILBOX             0x002FC
  37 #define IXGBE_VFMBMEM               0x00200
  38
  39 #define IXGBE_PFMAILBOX_STS   0x00000001 /* Initiate message send to VF */
  40 #define IXGBE_PFMAILBOX_ACK   0x00000002 /* Ack message recv'd from VF */
  41 #define IXGBE_PFMAILBOX_VFU   0x00000004 /* VF owns the mailbox buffer */
  42 #define IXGBE_PFMAILBOX_PFU   0x00000008 /* PF owns the mailbox buffer */
  43 #define IXGBE_PFMAILBOX_RVFU  0x00000010 /* Reset VFU - used when VF stuck */
  44
  45 #define IXGBE_MBVFICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */
  46 #define IXGBE_MBVFICR_VFREQ_VF1  0x00000001 /* bit for VF 1 message */
  47 #define IXGBE_MBVFICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */
  48 #define IXGBE_MBVFICR_VFACK_VF1  0x00010000 /* bit for VF 1 ack */
  49
  50
  51 /* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the
  52  * PF.  The reverse is true if it is IXGBE_PF_*.
  53  * Message ACK's are the value or'd with 0xF0000000
  54  */
  55 #define IXGBE_VT_MSGTYPE_ACK      0x80000000  /* Messages below or'd with
  56                                                * this are the ACK */
  57 #define IXGBE_VT_MSGTYPE_NACK     0x40000000  /* Messages below or'd with
  58                                                * this are the NACK */
  59 #define IXGBE_VT_MSGTYPE_CTS      0x20000000  /* Indicates that VF is still
  60                                                  clear to send requests */
  61 #define IXGBE_VT_MSGINFO_SHIFT    16
  62 /* bits 23:16 are used for exra info for certain messages */
  63 #define IXGBE_VT_MSGINFO_MASK     (0xFF << IXGBE_VT_MSGINFO_SHIFT)
  64
  65 #define IXGBE_VF_RESET            0x01 /* VF requests reset */
  66 #define IXGBE_VF_SET_MAC_ADDR     0x02 /* VF requests PF to set MAC addr */
  67 #define IXGBE_VF_SET_MULTICAST    0x03 /* VF requests PF to set MC addr */
  68 #define IXGBE_VF_SET_VLAN         0x04 /* VF requests PF to set VLAN */
  69 #define IXGBE_VF_SET_LPE          0x05 /* VF requests PF to set VMOLR.LPE */
  70 #define IXGBE_VF_SET_MACVLAN      0x06 /* VF requests PF for unicast filter */
  71
  72 /* length of permanent address message returned from PF */
  73 #define IXGBE_VF_PERMADDR_MSG_LEN 4
  74 /* word in permanent address message with the current multicast type */
  75 #define IXGBE_VF_MC_TYPE_WORD     3
  76
  77 #define IXGBE_PF_CONTROL_MSG      0x0100 /* PF control message */
  78
  79 #define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */
  80 #define IXGBE_VF_MBX_INIT_DELAY   500  /* microseconds between retries */
  81
  82 s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
  83 s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
  84 s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
  85 s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
  86 s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
  87 #ifdef CONFIG_PCI_IOV
  88 void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);
  89 #endif /* CONFIG_PCI_IOV */
  90
  91 extern struct ixgbe_mbx_operations mbx_ops_generic;
  92
  93 #endif /* _IXGBE_MBX_H_ */