drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c

   1 /*******************************************************************************
   2   This is the driver for the MAC 10/100 on-chip Ethernet controller
   3   currently tested on all the ST boards based on STb7109 and stx7200 SoCs.
   4
   5   DWC Ether MAC 10/100 Universal version 4.0 has been used for developing
   6   this code.
   7
   8   This only implements the mac core functions for this chip.
   9
  10   Copyright (C) 2007-2009  STMicroelectronics Ltd
  11
  12   This program is free software; you can redistribute it and/or modify it
  13   under the terms and conditions of the GNU General Public License,
  14   version 2, as published by the Free Software Foundation.
  15
  16   This program is distributed in the hope it will be useful, but WITHOUT
  17   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19   more details.
  20
  21   You should have received a copy of the GNU General Public License along with
  22   this program; if not, write to the Free Software Foundation, Inc.,
  23   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24
  25   The full GNU General Public License is included in this distribution in
  26   the file called "COPYING".
  27
  28   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  29 *******************************************************************************/
  30
  31 #include <linux/crc32.h>
  32 #include <asm/io.h>
  33 #include "dwmac100.h"
  34
  35 static void dwmac100_core_init(void __iomem *ioaddr)
  36 {
  37         u32 value = readl(ioaddr + MAC_CONTROL);
  38
  39         writel((value | MAC_CORE_INIT), ioaddr + MAC_CONTROL);
  40
  41 #ifdef STMMAC_VLAN_TAG_USED
  42         writel(ETH_P_8021Q, ioaddr + MAC_VLAN1);
  43 #endif
  44 }
  45
  46 static int dwmac100_rx_coe_supported(void __iomem *ioaddr)
  47 {
  48         return 0;
  49 }
  50
  51 static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
  52 {
  53         pr_info("\t----------------------------------------------\n"
  54                 "\t  DWMAC 100 CSR (base addr = 0x%p)\n"
  55                 "\t----------------------------------------------\n",
  56                 ioaddr);
  57         pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL,
  58                 readl(ioaddr + MAC_CONTROL));
  59         pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH,
  60                 readl(ioaddr + MAC_ADDR_HIGH));
  61         pr_info("\taddr LO (offset 0x%x): 0x%08x\n", MAC_ADDR_LOW,
  62                 readl(ioaddr + MAC_ADDR_LOW));
  63         pr_info("\tmulticast hash HI (offset 0x%x): 0x%08x\n",
  64                 MAC_HASH_HIGH, readl(ioaddr + MAC_HASH_HIGH));
  65         pr_info("\tmulticast hash LO (offset 0x%x): 0x%08x\n",
  66                 MAC_HASH_LOW, readl(ioaddr + MAC_HASH_LOW));
  67         pr_info("\tflow control (offset 0x%x): 0x%08x\n",
  68                 MAC_FLOW_CTRL, readl(ioaddr + MAC_FLOW_CTRL));
  69         pr_info("\tVLAN1 tag (offset 0x%x): 0x%08x\n", MAC_VLAN1,
  70                 readl(ioaddr + MAC_VLAN1));
  71         pr_info("\tVLAN2 tag (offset 0x%x): 0x%08x\n", MAC_VLAN2,
  72                 readl(ioaddr + MAC_VLAN2));
  73 }
  74
  75 static void dwmac100_irq_status(void __iomem *ioaddr)
  76 {
  77         return;
  78 }
  79
  80 static void dwmac100_set_umac_addr(void __iomem *ioaddr, unsigned char *addr,
  81                                    unsigned int reg_n)
  82 {
  83         stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
  84 }
  85
  86 static void dwmac100_get_umac_addr(void __iomem *ioaddr, unsigned char *addr,
  87                                    unsigned int reg_n)
  88 {
  89         stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
  90 }
  91
  92 static void dwmac100_set_filter(struct net_device *dev)
  93 {
  94         void __iomem *ioaddr = (void __iomem *) dev->base_addr;
  95         u32 value = readl(ioaddr + MAC_CONTROL);
  96
  97         if (dev->flags & IFF_PROMISC) {
  98                 value |= MAC_CONTROL_PR;
  99                 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_IF | MAC_CONTROL_HO |
 100                            MAC_CONTROL_HP);
 101         } else if ((netdev_mc_count(dev) > HASH_TABLE_SIZE)
 102                    || (dev->flags & IFF_ALLMULTI)) {
 103                 value |= MAC_CONTROL_PM;
 104                 value &= ~(MAC_CONTROL_PR | MAC_CONTROL_IF | MAC_CONTROL_HO);
 105                 writel(0xffffffff, ioaddr + MAC_HASH_HIGH);
 106                 writel(0xffffffff, ioaddr + MAC_HASH_LOW);
 107         } else if (netdev_mc_empty(dev)) {      /* no multicast */
 108                 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR | MAC_CONTROL_IF |
 109                            MAC_CONTROL_HO | MAC_CONTROL_HP);
 110         } else {
 111                 u32 mc_filter[2];
 112                 struct netdev_hw_addr *ha;
 113
 114                 /* Perfect filter mode for physical address and Hash
 115                    filter for multicast */
 116                 value |= MAC_CONTROL_HP;
 117                 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR |
 118                            MAC_CONTROL_IF | MAC_CONTROL_HO);
 119
 120                 memset(mc_filter, 0, sizeof(mc_filter));
 121                 netdev_for_each_mc_addr(ha, dev) {
 122                         /* The upper 6 bits of the calculated CRC are used to
 123                          * index the contens of the hash table */
 124                         int bit_nr =
 125                             ether_crc(ETH_ALEN, ha->addr) >> 26;
 126                         /* The most significant bit determines the register to
 127                          * use (H/L) while the other 5 bits determine the bit
 128                          * within the register. */
 129                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
 130                 }
 131                 writel(mc_filter[0], ioaddr + MAC_HASH_LOW);
 132                 writel(mc_filter[1], ioaddr + MAC_HASH_HIGH);
 133         }
 134
 135         writel(value, ioaddr + MAC_CONTROL);
 136
 137         CHIP_DBG(KERN_INFO "%s: CTRL reg: 0x%08x Hash regs: "
 138             "HI 0x%08x, LO 0x%08x\n",
 139             __func__, readl(ioaddr + MAC_CONTROL),
 140             readl(ioaddr + MAC_HASH_HIGH), readl(ioaddr + MAC_HASH_LOW));
 141 }
 142
 143 static void dwmac100_flow_ctrl(void __iomem *ioaddr, unsigned int duplex,
 144                                unsigned int fc, unsigned int pause_time)
 145 {
 146         unsigned int flow = MAC_FLOW_CTRL_ENABLE;
 147
 148         if (duplex)
 149                 flow |= (pause_time << MAC_FLOW_CTRL_PT_SHIFT);
 150         writel(flow, ioaddr + MAC_FLOW_CTRL);
 151 }
 152
 153 /* No PMT module supported for this Ethernet Controller.
 154  * Tested on ST platforms only.
 155  */
 156 static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode)
 157 {
 158         return;
 159 }
 160
 161 static const struct stmmac_ops dwmac100_ops = {
 162         .core_init = dwmac100_core_init,
 163         .rx_coe = dwmac100_rx_coe_supported,
 164         .dump_regs = dwmac100_dump_mac_regs,
 165         .host_irq_status = dwmac100_irq_status,
 166         .set_filter = dwmac100_set_filter,
 167         .flow_ctrl = dwmac100_flow_ctrl,
 168         .pmt = dwmac100_pmt,
 169         .set_umac_addr = dwmac100_set_umac_addr,
 170         .get_umac_addr = dwmac100_get_umac_addr,
 171 };
 172
 173 struct mac_device_info *dwmac100_setup(void __iomem *ioaddr)
 174 {
 175         struct mac_device_info *mac;
 176
 177         mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
 178         if (!mac)
 179                 return NULL;
 180
 181         pr_info("\tDWMAC100\n");
 182
 183         mac->mac = &dwmac100_ops;
 184         mac->dma = &dwmac100_dma_ops;
 185
 186         mac->link.port = MAC_CONTROL_PS;
 187         mac->link.duplex = MAC_CONTROL_F;
 188         mac->link.speed = 0;
 189         mac->mii.addr = MAC_MII_ADDR;
 190         mac->mii.data = MAC_MII_DATA;
 191         mac->synopsys_uid = 0;
 192
 193         return mac;
 194 }