drivers/net/wireless/ath/ath6kl/bmi.h

   1 /*
   2  * Copyright (c) 2004-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef BMI_H
  18 #define BMI_H
  19
  20 /*
  21  * Bootloader Messaging Interface (BMI)
  22  *
  23  * BMI is a very simple messaging interface used during initialization
  24  * to read memory, write memory, execute code, and to define an
  25  * application entry PC.
  26  *
  27  * It is used to download an application to ATH6KL, to provide
  28  * patches to code that is already resident on ATH6KL, and generally
  29  * to examine and modify state.  The Host has an opportunity to use
  30  * BMI only once during bootup.  Once the Host issues a BMI_DONE
  31  * command, this opportunity ends.
  32  *
  33  * The Host writes BMI requests to mailbox0, and reads BMI responses
  34  * from mailbox0.   BMI requests all begin with a command
  35  * (see below for specific commands), and are followed by
  36  * command-specific data.
  37  *
  38  * Flow control:
  39  * The Host can only issue a command once the Target gives it a
  40  * "BMI Command Credit", using ATH6KL Counter #4.  As soon as the
  41  * Target has completed a command, it issues another BMI Command
  42  * Credit (so the Host can issue the next command).
  43  *
  44  * BMI handles all required Target-side cache flushing.
  45  */
  46
  47 /* BMI Commands */
  48
  49 #define BMI_NO_COMMAND                      0
  50
  51 #define BMI_DONE                            1
  52 /*
  53  * Semantics: Host is done using BMI
  54  * Request format:
  55  *    u32 command (BMI_DONE)
  56  * Response format: none
  57  */
  58
  59 #define BMI_READ_MEMORY                     2
  60 /*
  61  * Semantics: Host reads ATH6KL memory
  62  * Request format:
  63  *    u32 command (BMI_READ_MEMORY)
  64  *    u32 address
  65  *    u32 length, at most BMI_DATASZ_MAX
  66  * Response format:
  67  *    u8 data[length]
  68  */
  69
  70 #define BMI_WRITE_MEMORY                    3
  71 /*
  72  * Semantics: Host writes ATH6KL memory
  73  * Request format:
  74  *    u32 command (BMI_WRITE_MEMORY)
  75  *    u32 address
  76  *    u32 length, at most BMI_DATASZ_MAX
  77  *    u8 data[length]
  78  * Response format: none
  79  */
  80
  81 #define BMI_EXECUTE                         4
  82 /*
  83  * Semantics: Causes ATH6KL to execute code
  84  * Request format:
  85  *    u32 command (BMI_EXECUTE)
  86  *    u32 address
  87  *    u32 parameter
  88  * Response format:
  89  *    u32 return value
  90  */
  91
  92 #define BMI_SET_APP_START                   5
  93 /*
  94  * Semantics: Set Target application starting address
  95  * Request format:
  96  *    u32 command (BMI_SET_APP_START)
  97  *    u32 address
  98  * Response format: none
  99  */
 100
 101 #define BMI_READ_SOC_REGISTER               6
 102 /*
 103  * Semantics: Read a 32-bit Target SOC register.
 104  * Request format:
 105  *    u32 command (BMI_READ_REGISTER)
 106  *    u32 address
 107  * Response format:
 108  *    u32 value
 109  */
 110
 111 #define BMI_WRITE_SOC_REGISTER              7
 112 /*
 113  * Semantics: Write a 32-bit Target SOC register.
 114  * Request format:
 115  *    u32 command (BMI_WRITE_REGISTER)
 116  *    u32 address
 117  *    u32 value
 118  *
 119  * Response format: none
 120  */
 121
 122 #define BMI_GET_TARGET_ID                  8
 123 #define BMI_GET_TARGET_INFO                8
 124 /*
 125  * Semantics: Fetch the 4-byte Target information
 126  * Request format:
 127  *    u32 command (BMI_GET_TARGET_ID/INFO)
 128  * Response format1 (old firmware):
 129  *    u32 TargetVersionID
 130  * Response format2 (newer firmware):
 131  *    u32 TARGET_VERSION_SENTINAL
 132  *    struct bmi_target_info;
 133  */
 134
 135 #define TARGET_VERSION_SENTINAL 0xffffffff
 136 #define TARGET_TYPE_AR6003      3
 137 #define TARGET_TYPE_AR6004      5
 138 #define BMI_ROMPATCH_INSTALL               9
 139 /*
 140  * Semantics: Install a ROM Patch.
 141  * Request format:
 142  *    u32 command (BMI_ROMPATCH_INSTALL)
 143  *    u32 Target ROM Address
 144  *    u32 Target RAM Address or Value (depending on Target Type)
 145  *    u32 Size, in bytes
 146  *    u32 Activate? 1-->activate;
 147  *                            0-->install but do not activate
 148  * Response format:
 149  *    u32 PatchID
 150  */
 151
 152 #define BMI_ROMPATCH_UNINSTALL             10
 153 /*
 154  * Semantics: Uninstall a previously-installed ROM Patch,
 155  * automatically deactivating, if necessary.
 156  * Request format:
 157  *    u32 command (BMI_ROMPATCH_UNINSTALL)
 158  *    u32 PatchID
 159  *
 160  * Response format: none
 161  */
 162
 163 #define BMI_ROMPATCH_ACTIVATE              11
 164 /*
 165  * Semantics: Activate a list of previously-installed ROM Patches.
 166  * Request format:
 167  *    u32 command (BMI_ROMPATCH_ACTIVATE)
 168  *    u32 rompatch_count
 169  *    u32 PatchID[rompatch_count]
 170  *
 171  * Response format: none
 172  */
 173
 174 #define BMI_ROMPATCH_DEACTIVATE            12
 175 /*
 176  * Semantics: Deactivate a list of active ROM Patches.
 177  * Request format:
 178  *    u32 command (BMI_ROMPATCH_DEACTIVATE)
 179  *    u32 rompatch_count
 180  *    u32 PatchID[rompatch_count]
 181  *
 182  * Response format: none
 183  */
 184
 185
 186 #define BMI_LZ_STREAM_START                13
 187 /*
 188  * Semantics: Begin an LZ-compressed stream of input
 189  * which is to be uncompressed by the Target to an
 190  * output buffer at address.  The output buffer must
 191  * be sufficiently large to hold the uncompressed
 192  * output from the compressed input stream.  This BMI
 193  * command should be followed by a series of 1 or more
 194  * BMI_LZ_DATA commands.
 195  *    u32 command (BMI_LZ_STREAM_START)
 196  *    u32 address
 197  * Note: Not supported on all versions of ROM firmware.
 198  */
 199
 200 #define BMI_LZ_DATA                        14
 201 /*
 202  * Semantics: Host writes ATH6KL memory with LZ-compressed
 203  * data which is uncompressed by the Target.  This command
 204  * must be preceded by a BMI_LZ_STREAM_START command. A series
 205  * of BMI_LZ_DATA commands are considered part of a single
 206  * input stream until another BMI_LZ_STREAM_START is issued.
 207  * Request format:
 208  *    u32 command (BMI_LZ_DATA)
 209  *    u32 length (of compressed data),
 210  *                  at most BMI_DATASZ_MAX
 211  *    u8 CompressedData[length]
 212  * Response format: none
 213  * Note: Not supported on all versions of ROM firmware.
 214  */
 215
 216 #define BMI_COMMUNICATION_TIMEOUT       1000 /* in msec */
 217
 218 struct ath6kl;
 219 struct ath6kl_bmi_target_info {
 220         __le32 byte_count;   /* size of this structure */
 221         __le32 version;      /* target version id */
 222         __le32 type;         /* target type */
 223 } __packed;
 224
 225 int ath6kl_bmi_init(struct ath6kl *ar);
 226 void ath6kl_bmi_cleanup(struct ath6kl *ar);
 227 void ath6kl_bmi_reset(struct ath6kl *ar);
 228
 229 int ath6kl_bmi_done(struct ath6kl *ar);
 230 int ath6kl_bmi_get_target_info(struct ath6kl *ar,
 231                                struct ath6kl_bmi_target_info *targ_info);
 232 int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
 233 int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
 234 int ath6kl_bmi_execute(struct ath6kl *ar,
 235                        u32 addr, u32 *param);
 236 int ath6kl_bmi_set_app_start(struct ath6kl *ar,
 237                              u32 addr);
 238 int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param);
 239 int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param);
 240 int ath6kl_bmi_lz_data(struct ath6kl *ar,
 241                        u8 *buf, u32 len);
 242 int ath6kl_bmi_lz_stream_start(struct ath6kl *ar,
 243                                u32 addr);
 244 int ath6kl_bmi_fast_download(struct ath6kl *ar,
 245                              u32 addr, u8 *buf, u32 len);
 246 #endif