Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / net / wireless / brcm80211 / brcmfmac / sdio_host.h
blob0281d207d998faff6ce51441d9284606a36bf9d1
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef _BRCM_SDH_H_
18 #define _BRCM_SDH_H_
20 #include <linux/skbuff.h>
22 #define SDIO_FUNC_0 0
23 #define SDIO_FUNC_1 1
24 #define SDIO_FUNC_2 2
26 #define SDIOD_FBR_SIZE 0x100
28 /* io_en */
29 #define SDIO_FUNC_ENABLE_1 0x02
30 #define SDIO_FUNC_ENABLE_2 0x04
32 /* io_rdys */
33 #define SDIO_FUNC_READY_1 0x02
34 #define SDIO_FUNC_READY_2 0x04
36 /* intr_status */
37 #define INTR_STATUS_FUNC1 0x2
38 #define INTR_STATUS_FUNC2 0x4
40 /* Maximum number of I/O funcs */
41 #define SDIOD_MAX_IOFUNCS 7
43 /* as of sdiod rev 0, supports 3 functions */
44 #define SBSDIO_NUM_FUNCTION 3
46 /* function 1 miscellaneous registers */
48 /* sprom command and status */
49 #define SBSDIO_SPROM_CS 0x10000
50 /* sprom info register */
51 #define SBSDIO_SPROM_INFO 0x10001
52 /* sprom indirect access data byte 0 */
53 #define SBSDIO_SPROM_DATA_LOW 0x10002
54 /* sprom indirect access data byte 1 */
55 #define SBSDIO_SPROM_DATA_HIGH 0x10003
56 /* sprom indirect access addr byte 0 */
57 #define SBSDIO_SPROM_ADDR_LOW 0x10004
58 /* sprom indirect access addr byte 0 */
59 #define SBSDIO_SPROM_ADDR_HIGH 0x10005
60 /* xtal_pu (gpio) output */
61 #define SBSDIO_CHIP_CTRL_DATA 0x10006
62 /* xtal_pu (gpio) enable */
63 #define SBSDIO_CHIP_CTRL_EN 0x10007
64 /* rev < 7, watermark for sdio device */
65 #define SBSDIO_WATERMARK 0x10008
66 /* control busy signal generation */
67 #define SBSDIO_DEVICE_CTL 0x10009
69 /* SB Address Window Low (b15) */
70 #define SBSDIO_FUNC1_SBADDRLOW 0x1000A
71 /* SB Address Window Mid (b23:b16) */
72 #define SBSDIO_FUNC1_SBADDRMID 0x1000B
73 /* SB Address Window High (b31:b24) */
74 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
75 /* Frame Control (frame term/abort) */
76 #define SBSDIO_FUNC1_FRAMECTRL 0x1000D
77 /* ChipClockCSR (ALP/HT ctl/status) */
78 #define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
79 /* SdioPullUp (on cmd, d0-d2) */
80 #define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
81 /* Write Frame Byte Count Low */
82 #define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
83 /* Write Frame Byte Count High */
84 #define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
85 /* Read Frame Byte Count Low */
86 #define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
87 /* Read Frame Byte Count High */
88 #define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
90 #define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
91 #define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
93 /* function 1 OCP space */
95 /* sb offset addr is <= 15 bits, 32k */
96 #define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
97 #define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
98 /* with b15, maps to 32-bit SB access */
99 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
101 /* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
103 #define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
104 #define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
105 #define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
106 /* Address bits from SBADDR regs */
107 #define SBSDIO_SBWINDOW_MASK 0xffff8000
109 #define SDIOH_READ 0 /* Read request */
110 #define SDIOH_WRITE 1 /* Write request */
112 #define SDIOH_DATA_FIX 0 /* Fixed addressing */
113 #define SDIOH_DATA_INC 1 /* Incremental addressing */
115 /* internal return code */
116 #define SUCCESS 0
117 #define ERROR 1
119 /* Packet alignment for most efficient SDIO (can change based on platform) */
120 #define BRCMF_SDALIGN (1 << 6)
122 /* watchdog polling interval in ms */
123 #define BRCMF_WD_POLL_MS 10
125 struct brcmf_sdreg {
126 int func;
127 int offset;
128 int value;
131 struct brcmf_sdio;
133 struct brcmf_sdio_dev {
134 struct sdio_func *func[SDIO_MAX_FUNCS];
135 u8 num_funcs; /* Supported funcs on client */
136 u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
137 u32 sbwad; /* Save backplane window address */
138 bool regfail; /* status of last reg_r/w call */
139 void *bus;
140 atomic_t suspend; /* suspend flag */
141 wait_queue_head_t request_byte_wait;
142 wait_queue_head_t request_word_wait;
143 wait_queue_head_t request_chain_wait;
144 wait_queue_head_t request_buffer_wait;
145 struct device *dev;
146 struct brcmf_bus *bus_if;
149 /* Register/deregister device interrupt handler. */
150 extern int
151 brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev);
153 extern int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev);
155 /* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface).
156 * fn: function number
157 * addr: unmodified SDIO-space address
158 * data: data byte to write
159 * err: pointer to error code (or NULL)
161 extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint func,
162 u32 addr, int *err);
163 extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint func,
164 u32 addr, u8 data, int *err);
166 /* Synchronous access to device (client) core registers via CMD53 to F1.
167 * addr: backplane address (i.e. >= regsva from attach)
168 * size: register width in bytes (2 or 4)
169 * data: data for register write
171 extern u32
172 brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size);
174 extern u32
175 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
176 u32 data);
178 /* Indicate if last reg read/write failed */
179 extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev);
181 /* Buffer transfer to/from device (client) core via cmd53.
182 * fn: function number
183 * addr: backplane address (i.e. >= regsva from attach)
184 * flags: backplane width, address increment, sync/async
185 * buf: pointer to memory data buffer
186 * nbytes: number of bytes to transfer to/from buf
187 * pkt: pointer to packet associated with buf (if any)
188 * complete: callback function for command completion (async only)
189 * handle: handle for completion callback (first arg in callback)
190 * Returns 0 or error code.
191 * NOTE: Async operation is not currently supported.
193 extern int
194 brcmf_sdcard_send_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
195 uint flags, struct sk_buff *pkt);
196 extern int
197 brcmf_sdcard_send_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
198 uint flags, u8 *buf, uint nbytes);
200 extern int
201 brcmf_sdcard_recv_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
202 uint flags, struct sk_buff *pkt);
203 extern int
204 brcmf_sdcard_recv_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
205 uint flags, u8 *buf, uint nbytes);
206 extern int
207 brcmf_sdcard_recv_chain(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
208 uint flags, struct sk_buff_head *pktq);
210 /* Flags bits */
212 /* Four-byte target (backplane) width (vs. two-byte) */
213 #define SDIO_REQ_4BYTE 0x1
214 /* Fixed address (FIFO) (vs. incrementing address) */
215 #define SDIO_REQ_FIXED 0x2
216 /* Async request (vs. sync request) */
217 #define SDIO_REQ_ASYNC 0x4
219 /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
220 * rw: read or write (0/1)
221 * addr: direct SDIO address
222 * buf: pointer to memory data buffer
223 * nbytes: number of bytes to transfer to/from buf
224 * Returns 0 or error code.
226 extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev *sdiodev, uint rw,
227 u32 addr, u8 *buf, uint nbytes);
229 /* Issue an abort to the specified function */
230 extern int brcmf_sdcard_abort(struct brcmf_sdio_dev *sdiodev, uint fn);
232 /* platform specific/high level functions */
233 extern int brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev);
234 extern int brcmf_sdio_remove(struct brcmf_sdio_dev *sdiodev);
236 extern int brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev,
237 u32 address);
239 /* attach, return handler on success, NULL if failed.
240 * The handler shall be provided by all subsequent calls. No local cache
241 * cfghdl points to the starting address of pci device mapped memory
243 extern int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev);
244 extern void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev);
246 /* read or write one byte using cmd52 */
247 extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw,
248 uint fnc, uint addr, u8 *byte);
250 /* read or write 2/4 bytes using cmd53 */
251 extern int
252 brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
253 uint rw, uint fnc, uint addr,
254 u32 *word, uint nbyte);
256 /* read or write any buffer using cmd53 */
257 extern int
258 brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
259 uint fix_inc, uint rw, uint fnc_num, u32 addr,
260 struct sk_buff *pkt);
261 extern int
262 brcmf_sdioh_request_chain(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
263 uint write, uint func, uint addr,
264 struct sk_buff_head *pktq);
266 /* Watchdog timer interface for pm ops */
267 extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev *sdiodev,
268 bool enable);
270 extern void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev);
271 extern void brcmf_sdbrcm_disconnect(void *ptr);
272 extern void brcmf_sdbrcm_isr(void *arg);
274 extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick);
275 #endif /* _BRCM_SDH_H_ */