2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
18 #ifndef BEISCSI_CMDS_H
19 #define BEISCSI_CMDS_H
22 * The driver sends configuration and managements command requests to the
23 * firmware in the BE. These requests are communicated to the processor
24 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
25 * WRB inside a MAILBOX.
26 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
34 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
35 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
37 u32 embedded
; /* dword 0 */
38 u32 payload_length
; /* dword 1 */
39 u32 tag0
; /* dword 2 */
40 u32 tag1
; /* dword 3 */
41 u32 rsvd
; /* dword 4 */
43 u8 embedded_payload
[236]; /* used by embedded cmds */
44 struct be_sge sgl
[19]; /* used by non-embedded cmds */
48 #define CQE_FLAGS_VALID_MASK (1 << 31)
49 #define CQE_FLAGS_ASYNC_MASK (1 << 30)
50 #define CQE_FLAGS_COMPLETED_MASK (1 << 28)
51 #define CQE_FLAGS_CONSUMED_MASK (1 << 27)
53 /* Completion Status */
54 #define MCC_STATUS_SUCCESS 0x0
56 #define CQE_STATUS_COMPL_MASK 0xFFFF
57 #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
58 #define CQE_STATUS_EXTD_MASK 0xFFFF
59 #define CQE_STATUS_EXTD_SHIFT 16 /* bits 0 - 15 */
62 u32 status
; /* dword 0 */
63 u32 tag0
; /* dword 1 */
64 u32 tag1
; /* dword 2 */
65 u32 flags
; /* dword 3 */
68 /********* Mailbox door bell *************/
70 * Used for driver communication with the FW.
71 * The software must write this register twice to post any command. First,
72 * it writes the register with hi=1 and the upper bits of the physical address
73 * for the MAILBOX structure. Software must poll the ready bit until this
74 * is acknowledged. Then, sotware writes the register with hi=0 with the lower
75 * bits in the address. It must poll the ready bit until the command is
76 * complete. Upon completion, the MAILBOX will contain a valid completion
79 #define MPU_MAILBOX_DB_OFFSET 0x160
80 #define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
81 #define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
83 /********** MPU semphore ******************/
84 #define MPU_EP_SEMAPHORE_OFFSET 0xac
85 #define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
86 #define EP_SEMAPHORE_POST_ERR_MASK 0x1
87 #define EP_SEMAPHORE_POST_ERR_SHIFT 31
89 /********** MCC door bell ************/
90 #define DB_MCCQ_OFFSET 0x140
91 #define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */
92 /* Number of entries posted */
93 #define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */
95 /* MPU semphore POST stage values */
96 #define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
99 * When the async bit of mcc_compl is set, the last 4 bytes of
100 * mcc_compl is interpreted as follows:
102 #define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
103 #define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF
104 #define ASYNC_EVENT_CODE_LINK_STATE 0x1
105 struct be_async_event_trailer
{
110 ASYNC_EVENT_LINK_DOWN
= 0x0,
111 ASYNC_EVENT_LINK_UP
= 0x1
115 * When the event code of an async trailer is link-state, the mcc_compl
116 * must be interpreted as follows
118 struct be_async_event_link_state
{
125 struct be_async_event_trailer trailer
;
128 struct be_mcc_mailbox
{
129 struct be_mcc_wrb wrb
;
130 struct be_mcc_compl
compl;
133 /* Type of subsystems supported by FW */
134 #define CMD_SUBSYSTEM_COMMON 0x1
135 #define CMD_SUBSYSTEM_ISCSI 0x2
136 #define CMD_SUBSYSTEM_ETH 0x3
137 #define CMD_SUBSYSTEM_ISCSI_INI 0x6
138 #define CMD_COMMON_TCP_UPLOAD 0x1
141 * List of common opcodes subsystem CMD_SUBSYSTEM_COMMON
142 * These opcodes are unique for each subsystem defined above
144 #define OPCODE_COMMON_CQ_CREATE 12
145 #define OPCODE_COMMON_EQ_CREATE 13
146 #define OPCODE_COMMON_MCC_CREATE 21
147 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
148 #define OPCODE_COMMON_GET_FW_VERSION 35
149 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
150 #define OPCODE_COMMON_FIRMWARE_CONFIG 42
151 #define OPCODE_COMMON_MCC_DESTROY 53
152 #define OPCODE_COMMON_CQ_DESTROY 54
153 #define OPCODE_COMMON_EQ_DESTROY 55
154 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
155 #define OPCODE_COMMON_FUNCTION_RESET 61
158 * LIST of opcodes that are common between Initiator and Target
159 * used by CMD_SUBSYSTEM_ISCSI
160 * These opcodes are unique for each subsystem defined above
162 #define OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES 2
163 #define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES 3
164 #define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG 7
165 #define OPCODE_COMMON_ISCSI_NTWK_SET_VLAN 14
166 #define OPCODE_COMMON_ISCSI_NTWK_CONFIGURE_STATELESS_IP_ADDR 17
167 #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_IP_ADDR 21
168 #define OPCODE_COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY 22
169 #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY 23
170 #define OPCODE_COMMON_ISCSI_NTWK_GET_ALL_IF_ID 24
171 #define OPCODE_COMMON_ISCSI_NTWK_GET_IF_INFO 25
172 #define OPCODE_COMMON_ISCSI_SET_FRAGNUM_BITS_FOR_SGL_CRA 61
173 #define OPCODE_COMMON_ISCSI_DEFQ_CREATE 64
174 #define OPCODE_COMMON_ISCSI_DEFQ_DESTROY 65
175 #define OPCODE_COMMON_ISCSI_WRBQ_CREATE 66
176 #define OPCODE_COMMON_ISCSI_WRBQ_DESTROY 67
178 struct be_cmd_req_hdr
{
179 u8 opcode
; /* dword 0 */
180 u8 subsystem
; /* dword 0 */
181 u8 port_number
; /* dword 0 */
182 u8 domain
; /* dword 0 */
183 u32 timeout
; /* dword 1 */
184 u32 request_length
; /* dword 2 */
185 u32 rsvd0
; /* dword 3 */
188 struct be_cmd_resp_hdr
{
189 u32 info
; /* dword 0 */
190 u32 status
; /* dword 1 */
191 u32 response_length
; /* dword 2 */
192 u32 actual_resp_len
; /* dword 3 */
200 /**************************
201 * BE Command definitions *
202 **************************/
205 * Pseudo amap definition in which each bit of the actual structure is defined
206 * as a byte - used to calculate offset/shift/mask of each field
208 struct amap_eq_context
{
209 u8 cidx
[13]; /* dword 0 */
210 u8 rsvd0
[3]; /* dword 0 */
211 u8 epidx
[13]; /* dword 0 */
212 u8 valid
; /* dword 0 */
213 u8 rsvd1
; /* dword 0 */
214 u8 size
; /* dword 0 */
215 u8 pidx
[13]; /* dword 1 */
216 u8 rsvd2
[3]; /* dword 1 */
217 u8 pd
[10]; /* dword 1 */
218 u8 count
[3]; /* dword 1 */
219 u8 solevent
; /* dword 1 */
220 u8 stalled
; /* dword 1 */
221 u8 armed
; /* dword 1 */
222 u8 rsvd3
[4]; /* dword 2 */
223 u8 func
[8]; /* dword 2 */
224 u8 rsvd4
; /* dword 2 */
225 u8 delaymult
[10]; /* dword 2 */
226 u8 rsvd5
[2]; /* dword 2 */
227 u8 phase
[2]; /* dword 2 */
228 u8 nodelay
; /* dword 2 */
229 u8 rsvd6
[4]; /* dword 2 */
230 u8 rsvd7
[32]; /* dword 3 */
233 struct be_cmd_req_eq_create
{
234 struct be_cmd_req_hdr hdr
; /* dw[4] */
235 u16 num_pages
; /* sword */
236 u16 rsvd0
; /* sword */
237 u8 context
[sizeof(struct amap_eq_context
) / 8]; /* dw[4] */
238 struct phys_addr pages
[8];
241 struct be_cmd_resp_eq_create
{
242 struct be_cmd_resp_hdr resp_hdr
;
243 u16 eq_id
; /* sword */
244 u16 rsvd0
; /* sword */
247 struct mgmt_chap_format
{
249 u8 intr_chap_name
[256];
251 u8 target_chap_name
[256];
252 u8 target_secret
[16];
253 u16 intr_chap_name_length
;
254 u16 intr_secret_length
;
255 u16 target_chap_name_length
;
256 u16 target_secret_length
;
259 struct mgmt_auth_method_format
{
262 struct mgmt_chap_format chap
;
265 struct mgmt_conn_login_options
{
270 u32 max_recv_datasegment_len_ini
;
271 u32 max_recv_datasegment_len_tgt
;
274 struct mgmt_auth_method_format auth_data
;
277 struct ip_address_format
{
278 u16 size_of_structure
;
285 struct mgmt_conn_info
{
286 u32 connection_handle
;
287 u32 connection_status
;
290 u16 dest_port_redirected
;
292 u32 estimated_throughput
;
293 struct ip_address_format src_ipaddr
;
294 struct ip_address_format dest_ipaddr
;
295 struct ip_address_format dest_ipaddr_redirected
;
296 struct mgmt_conn_login_options negotiated_login_options
;
299 struct mgmt_session_login_options
{
301 u8 error_recovery_level
;
303 u32 first_burst_length
;
304 u32 max_burst_length
;
306 u16 max_outstanding_r2t
;
307 u16 default_time2wait
;
308 u16 default_time2retain
;
311 struct mgmt_session_info
{
320 u8 initiator_iscsiname
[224];
321 struct mgmt_session_login_options negotiated_login_options
;
322 struct mgmt_conn_info conn_list
[1];
325 struct be_cmd_req_get_session
{
326 struct be_cmd_req_hdr hdr
;
330 struct be_cmd_resp_get_session
{
331 struct be_cmd_resp_hdr hdr
;
332 struct mgmt_session_info session_info
;
340 struct be_cmd_req_get_boot_target
{
341 struct be_cmd_req_hdr hdr
;
344 struct be_cmd_resp_get_boot_target
{
345 struct be_cmd_resp_hdr hdr
;
346 u32 boot_session_count
;
347 int boot_session_handle
;
350 struct be_cmd_req_mac_query
{
351 struct be_cmd_req_hdr hdr
;
357 struct be_cmd_resp_mac_query
{
358 struct be_cmd_resp_hdr hdr
;
362 /******************** Create CQ ***************************/
364 * Pseudo amap definition in which each bit of the actual structure is defined
365 * as a byte - used to calculate offset/shift/mask of each field
367 struct amap_cq_context
{
368 u8 cidx
[11]; /* dword 0 */
369 u8 rsvd0
; /* dword 0 */
370 u8 coalescwm
[2]; /* dword 0 */
371 u8 nodelay
; /* dword 0 */
372 u8 epidx
[11]; /* dword 0 */
373 u8 rsvd1
; /* dword 0 */
374 u8 count
[2]; /* dword 0 */
375 u8 valid
; /* dword 0 */
376 u8 solevent
; /* dword 0 */
377 u8 eventable
; /* dword 0 */
378 u8 pidx
[11]; /* dword 1 */
379 u8 rsvd2
; /* dword 1 */
380 u8 pd
[10]; /* dword 1 */
381 u8 eqid
[8]; /* dword 1 */
382 u8 stalled
; /* dword 1 */
383 u8 armed
; /* dword 1 */
384 u8 rsvd3
[4]; /* dword 2 */
385 u8 func
[8]; /* dword 2 */
386 u8 rsvd4
[20]; /* dword 2 */
387 u8 rsvd5
[32]; /* dword 3 */
390 struct be_cmd_req_cq_create
{
391 struct be_cmd_req_hdr hdr
;
394 u8 context
[sizeof(struct amap_cq_context
) / 8];
395 struct phys_addr pages
[4];
398 struct be_cmd_resp_cq_create
{
399 struct be_cmd_resp_hdr hdr
;
404 /******************** Create MCCQ ***************************/
406 * Pseudo amap definition in which each bit of the actual structure is defined
407 * as a byte - used to calculate offset/shift/mask of each field
409 struct amap_mcc_context
{
424 struct be_cmd_req_mcc_create
{
425 struct be_cmd_req_hdr hdr
;
428 u8 context
[sizeof(struct amap_mcc_context
) / 8];
429 struct phys_addr pages
[8];
432 struct be_cmd_resp_mcc_create
{
433 struct be_cmd_resp_hdr hdr
;
438 /******************** Q Destroy ***************************/
439 /* Type of Queue to be destroyed */
449 struct be_cmd_req_q_destroy
{
450 struct be_cmd_req_hdr hdr
;
452 u16 bypass_flush
; /* valid only for rx q destroy */
459 struct be_cmd_req_mcast_mac_config
{
460 struct be_cmd_req_hdr hdr
;
464 struct macaddr mac
[32];
467 static inline void *embedded_payload(struct be_mcc_wrb
*wrb
)
469 return wrb
->payload
.embedded_payload
;
472 static inline struct be_sge
*nonembedded_sgl(struct be_mcc_wrb
*wrb
)
474 return &wrb
->payload
.sgl
[0];
477 /******************** Modify EQ Delay *******************/
478 struct be_cmd_req_modify_eq_delay
{
479 struct be_cmd_req_hdr hdr
;
484 u32 delay_multiplier
;
488 /******************** Get MAC ADDR *******************/
492 struct be_cmd_req_get_mac_addr
{
493 struct be_cmd_req_hdr hdr
;
499 u16 size_of_structure
;
500 u8 mac_address
[ETH_ALEN
];
504 struct be_cmd_resp_get_mac_addr
{
505 struct be_cmd_resp_hdr hdr
;
511 u16 size_of_structure
;
516 int beiscsi_cmd_eq_create(struct be_ctrl_info
*ctrl
,
517 struct be_queue_info
*eq
, int eq_delay
);
519 int beiscsi_cmd_cq_create(struct be_ctrl_info
*ctrl
,
520 struct be_queue_info
*cq
, struct be_queue_info
*eq
,
521 bool sol_evts
, bool no_delay
,
522 int num_cqe_dma_coalesce
);
524 int beiscsi_cmd_q_destroy(struct be_ctrl_info
*ctrl
, struct be_queue_info
*q
,
526 int beiscsi_cmd_mccq_create(struct beiscsi_hba
*phba
,
527 struct be_queue_info
*mccq
,
528 struct be_queue_info
*cq
);
530 int be_poll_mcc(struct be_ctrl_info
*ctrl
);
531 int mgmt_check_supported_fw(struct be_ctrl_info
*ctrl
,
532 struct beiscsi_hba
*phba
);
533 unsigned int be_cmd_get_mac_addr(struct beiscsi_hba
*phba
);
534 unsigned int beiscsi_get_boot_target(struct beiscsi_hba
*phba
);
535 unsigned int beiscsi_get_session_info(struct beiscsi_hba
*phba
,
536 u32 boot_session_handle
,
537 struct be_dma_mem
*nonemb_cmd
);
539 void free_mcc_tag(struct be_ctrl_info
*ctrl
, unsigned int tag
);
540 /*ISCSI Functuions */
541 int be_cmd_fw_initialize(struct be_ctrl_info
*ctrl
);
543 struct be_mcc_wrb
*wrb_from_mbox(struct be_dma_mem
*mbox_mem
);
544 struct be_mcc_wrb
*wrb_from_mccq(struct beiscsi_hba
*phba
);
545 int be_mcc_notify_wait(struct beiscsi_hba
*phba
);
546 void be_mcc_notify(struct beiscsi_hba
*phba
);
547 unsigned int alloc_mcc_tag(struct beiscsi_hba
*phba
);
548 void beiscsi_async_link_state_process(struct beiscsi_hba
*phba
,
549 struct be_async_event_link_state
*evt
);
550 int be_mcc_compl_process_isr(struct be_ctrl_info
*ctrl
,
551 struct be_mcc_compl
*compl);
553 int be_mbox_notify(struct be_ctrl_info
*ctrl
);
555 int be_cmd_create_default_pdu_queue(struct be_ctrl_info
*ctrl
,
556 struct be_queue_info
*cq
,
557 struct be_queue_info
*dq
, int length
,
560 int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info
*ctrl
,
561 struct be_dma_mem
*q_mem
, u32 page_offset
,
564 int beiscsi_cmd_reset_function(struct beiscsi_hba
*phba
);
566 int be_cmd_wrbq_create(struct be_ctrl_info
*ctrl
, struct be_dma_mem
*q_mem
,
567 struct be_queue_info
*wrbq
);
569 bool is_link_state_evt(u32 trailer
);
571 struct be_default_pdu_context
{
575 struct amap_be_default_pdu_context
{
576 u8 dbuf_cindex
[13]; /* dword 0 */
577 u8 rsvd0
[3]; /* dword 0 */
578 u8 ring_size
[4]; /* dword 0 */
579 u8 ring_state
[4]; /* dword 0 */
580 u8 rsvd1
[8]; /* dword 0 */
581 u8 dbuf_pindex
[13]; /* dword 1 */
582 u8 rsvd2
; /* dword 1 */
583 u8 pci_func_id
[8]; /* dword 1 */
584 u8 rx_pdid
[9]; /* dword 1 */
585 u8 rx_pdid_valid
; /* dword 1 */
586 u8 default_buffer_size
[16]; /* dword 2 */
587 u8 cq_id_recv
[10]; /* dword 2 */
588 u8 rx_pdid_not_valid
; /* dword 2 */
589 u8 rsvd3
[5]; /* dword 2 */
590 u8 rsvd4
[32]; /* dword 3 */
593 struct be_defq_create_req
{
594 struct be_cmd_req_hdr hdr
;
598 struct be_default_pdu_context context
;
599 struct phys_addr pages
[8];
602 struct be_defq_create_resp
{
603 struct be_cmd_req_hdr hdr
;
608 struct be_post_sgl_pages_req
{
609 struct be_cmd_req_hdr hdr
;
613 struct phys_addr pages
[26];
617 struct be_wrbq_create_req
{
618 struct be_cmd_req_hdr hdr
;
622 struct phys_addr pages
[8];
625 struct be_wrbq_create_resp
{
626 struct be_cmd_resp_hdr resp_hdr
;
631 #define SOL_CID_MASK 0x0000FFC0
632 #define SOL_CODE_MASK 0x0000003F
633 #define SOL_WRB_INDEX_MASK 0x00FF0000
634 #define SOL_CMD_WND_MASK 0xFF000000
635 #define SOL_RES_CNT_MASK 0x7FFFFFFF
636 #define SOL_EXP_CMD_SN_MASK 0xFFFFFFFF
637 #define SOL_HW_STS_MASK 0x000000FF
638 #define SOL_STS_MASK 0x0000FF00
639 #define SOL_RESP_MASK 0x00FF0000
640 #define SOL_FLAGS_MASK 0x7F000000
641 #define SOL_S_MASK 0x80000000
647 struct amap_sol_cqe
{
648 u8 hw_sts
[8]; /* dword 0 */
649 u8 i_sts
[8]; /* dword 0 */
650 u8 i_resp
[8]; /* dword 0 */
651 u8 i_flags
[7]; /* dword 0 */
653 u8 i_exp_cmd_sn
[32]; /* dword 1 */
654 u8 code
[6]; /* dword 2 */
655 u8 cid
[10]; /* dword 2 */
656 u8 wrb_index
[8]; /* dword 2 */
657 u8 i_cmd_wnd
[8]; /* dword 2 */
658 u8 i_res_cnt
[31]; /* dword 3 */
659 u8 valid
; /* dword 3 */
662 #define SOL_ICD_INDEX_MASK 0x0003FFC0
663 struct amap_sol_cqe_ring
{
664 u8 hw_sts
[8]; /* dword 0 */
665 u8 i_sts
[8]; /* dword 0 */
666 u8 i_resp
[8]; /* dword 0 */
667 u8 i_flags
[7]; /* dword 0 */
669 u8 i_exp_cmd_sn
[32]; /* dword 1 */
670 u8 code
[6]; /* dword 2 */
671 u8 icd_index
[12]; /* dword 2 */
672 u8 rsvd
[6]; /* dword 2 */
673 u8 i_cmd_wnd
[8]; /* dword 2 */
674 u8 i_res_cnt
[31]; /* dword 3 */
675 u8 valid
; /* dword 3 */
681 * Post WRB Queue Doorbell Register used by the host Storage
682 * stack to notify the
683 * controller of a posted Work Request Block
685 #define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */
686 #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */
688 #define DB_DEF_PDU_WRB_INDEX_SHIFT 16
689 #define DB_DEF_PDU_NUM_POSTED_SHIFT 24
691 struct fragnum_bits_for_sgl_cra_in
{
692 struct be_cmd_req_hdr hdr
;
696 struct iscsi_cleanup_req
{
697 struct be_cmd_req_hdr hdr
;
707 u32 delay_multiplier
;
710 struct be_eq_delay_params_in
{
711 struct be_cmd_req_hdr hdr
;
713 struct eq_delay delay
[8];
716 struct tcp_connect_and_offload_in
{
717 struct be_cmd_req_hdr hdr
;
718 struct ip_address_format ip_address
;
723 struct phys_addr dataout_template_pa
;
730 struct tcp_connect_and_offload_out
{
731 struct be_cmd_resp_hdr hdr
;
732 u32 connection_handle
;
738 struct be_mcc_wrb_context
{
740 int *users_final_status
;
743 #define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */
744 #define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */
745 #define DB_DEF_PDU_REARM_SHIFT 14
746 #define DB_DEF_PDU_EVENT_SHIFT 15
747 #define DB_DEF_PDU_CQPROC_SHIFT 16
753 struct tcp_upload_params_in
{
754 struct be_cmd_req_hdr hdr
;
760 struct tcp_upload_params_out
{
764 union tcp_upload_params
{
765 struct tcp_upload_params_in request
;
766 struct tcp_upload_params_out response
;
769 struct be_ulp_fw_cfg
{
786 struct be_cmd_req_hdr hdr
;
787 u32 be_config_number
;
791 struct be_ulp_fw_cfg ulp
[2];
795 struct be_all_if_id
{
796 struct be_cmd_req_hdr hdr
;
801 #define ISCSI_OPCODE_SCSI_DATA_OUT 5
802 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
803 #define OPCODE_COMMON_ISCSI_CLEANUP 59
804 #define OPCODE_COMMON_TCP_UPLOAD 56
805 #define OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD 70
806 #define OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS 1
807 #define OPCODE_ISCSI_INI_CFG_GET_HBA_NAME 6
808 #define OPCODE_ISCSI_INI_CFG_SET_HBA_NAME 7
809 #define OPCODE_ISCSI_INI_SESSION_GET_A_SESSION 14
810 #define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41
811 #define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42
812 #define OPCODE_ISCSI_INI_BOOT_GET_BOOT_TARGET 52
814 /* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */
815 #define CMD_ISCSI_COMMAND_INVALIDATE 1
816 #define CMD_ISCSI_CONNECTION_INVALIDATE 0x8001
817 #define CMD_ISCSI_CONNECTION_ISSUE_TCP_RST 0x8002
819 #define INI_WR_CMD 1 /* Initiator write command */
820 #define INI_TMF_CMD 2 /* Initiator TMF command */
821 #define INI_NOPOUT_CMD 3 /* Initiator; Send a NOP-OUT */
822 #define INI_RD_CMD 5 /* Initiator requesting to send
825 #define TGT_CTX_UPDT_CMD 7 /* Target context update */
826 #define TGT_STS_CMD 8 /* Target R2T and other BHS
827 * where only the status number
830 #define TGT_DATAIN_CMD 9 /* Target Data-Ins in response
833 #define TGT_SOS_PDU 10 /* Target:standalone status
836 #define TGT_DM_CMD 11 /* Indicates that the bhs
838 * driver should not be touched
840 /* --- CMD_CHUTE_TYPE --- */
841 #define CMD_CONNECTION_CHUTE_0 1
842 #define CMD_CONNECTION_CHUTE_1 2
843 #define CMD_CONNECTION_CHUTE_2 3
845 #define EQ_MAJOR_CODE_COMPLETION 0
847 #define CMD_ISCSI_SESSION_DEL_CFG_FROM_FLASH 0
848 #define CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH 1
850 /* --- CONNECTION_UPLOAD_PARAMS --- */
851 /* These parameters are used to define the type of upload desired. */
852 #define CONNECTION_UPLOAD_GRACEFUL 1 /* Graceful upload */
853 #define CONNECTION_UPLOAD_ABORT_RESET 2 /* Abortive upload with
856 #define CONNECTION_UPLOAD_ABORT 3 /* Abortive upload without
859 #define CONNECTION_UPLOAD_ABORT_WITH_SEQ 4 /* Abortive upload with reset,
860 * sequence number by driver */
862 /* Returns byte size of given field with a structure. */
864 /* Returns the number of items in the field array. */
865 #define BE_NUMBER_OF_FIELD(_type_, _field_) \
866 (FIELD_SIZEOF(_type_, _field_)/sizeof((((_type_ *)0)->_field_[0])))\
869 * Different types of iSCSI completions to host driver for both initiator
873 #define SOL_CMD_COMPLETE 1 /* Solicited command completed
876 #define SOL_CMD_KILLED_DATA_DIGEST_ERR 2 /* Solicited command got
877 * invalidated internally due
878 * to Data Digest error
880 #define CXN_KILLED_PDU_SIZE_EXCEEDS_DSL 3 /* Connection got invalidated
882 * due to a received PDU
885 #define CXN_KILLED_BURST_LEN_MISMATCH 4 /* Connection got invalidated
886 * internally due ti received
887 * PDU sequence size >
890 #define CXN_KILLED_AHS_RCVD 5 /* Connection got invalidated
891 * internally due to a received
894 #define CXN_KILLED_HDR_DIGEST_ERR 6 /* Connection got invalidated
895 * internally due to Hdr Digest
898 #define CXN_KILLED_UNKNOWN_HDR 7 /* Connection got invalidated
900 * due to a bad opcode in the
903 #define CXN_KILLED_STALE_ITT_TTT_RCVD 8 /* Connection got invalidated
904 * internally due to a received
905 * ITT/TTT that does not belong
908 #define CXN_KILLED_INVALID_ITT_TTT_RCVD 9 /* Connection got invalidated
909 * internally due to received
910 * ITT/TTT value > Max
911 * Supported ITTs/TTTs
913 #define CXN_KILLED_RST_RCVD 10 /* Connection got invalidated
914 * internally due to an
917 #define CXN_KILLED_TIMED_OUT 11 /* Connection got invalidated
918 * internally due to timeout on
919 * tcp segment 12 retransmit
922 #define CXN_KILLED_RST_SENT 12 /* Connection got invalidated
923 * internally due to TCP RST
924 * sent by the Tx side
926 #define CXN_KILLED_FIN_RCVD 13 /* Connection got invalidated
927 * internally due to an
930 #define CXN_KILLED_BAD_UNSOL_PDU_RCVD 14 /* Connection got invalidated
931 * internally due to bad
932 * unsolicited PDU Unsolicited
936 #define CXN_KILLED_BAD_WRB_INDEX_ERROR 15 /* Connection got invalidated
937 * internally due to bad WRB
940 #define CXN_KILLED_OVER_RUN_RESIDUAL 16 /* Command got invalidated
941 * internally due to received
942 * command has residual
945 #define CXN_KILLED_UNDER_RUN_RESIDUAL 17 /* Command got invalidated
946 * internally due to received
947 * command has residual under
950 #define CMD_KILLED_INVALID_STATSN_RCVD 18 /* Command got invalidated
951 * internally due to a received
952 * PDU has an invalid StatusSN
954 #define CMD_KILLED_INVALID_R2T_RCVD 19 /* Command got invalidated
955 * internally due to a received
956 * an R2T with some invalid
959 #define CMD_CXN_KILLED_LUN_INVALID 20 /* Command got invalidated
960 * internally due to received
961 * PDU has an invalid LUN.
963 #define CMD_CXN_KILLED_ICD_INVALID 21 /* Command got invalidated
964 * internally due to the
965 * corresponding ICD not in a
968 #define CMD_CXN_KILLED_ITT_INVALID 22 /* Command got invalidated due
969 * to received PDU has an
972 #define CMD_CXN_KILLED_SEQ_OUTOFORDER 23 /* Command got invalidated due
973 * to received sequence buffer
974 * offset is out of order.
976 #define CMD_CXN_KILLED_INVALID_DATASN_RCVD 24 /* Command got invalidated
977 * internally due to a
978 * received PDU has an invalid
981 #define CXN_INVALIDATE_NOTIFY 25 /* Connection invalidation
984 #define CXN_INVALIDATE_INDEX_NOTIFY 26 /* Connection invalidation
986 * with data PDU index.
988 #define CMD_INVALIDATED_NOTIFY 27 /* Command invalidation
989 * completionnotifify.
991 #define UNSOL_HDR_NOTIFY 28 /* Unsolicited header notify.*/
992 #define UNSOL_DATA_NOTIFY 29 /* Unsolicited data notify.*/
993 #define UNSOL_DATA_DIGEST_ERROR_NOTIFY 30 /* Unsolicited data digest
996 #define DRIVERMSG_NOTIFY 31 /* TCP acknowledge based
999 #define CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN 32 /* Connection got invalidated
1000 * internally due to command
1001 * and data are not on same
1004 #define SOL_CMD_KILLED_DIF_ERR 33 /* Solicited command got
1005 * invalidated internally due
1008 #define CXN_KILLED_SYN_RCVD 34 /* Connection got invalidated
1009 * internally due to incoming
1012 #define CXN_KILLED_IMM_DATA_RCVD 35 /* Connection got invalidated
1013 * internally due to an
1014 * incoming Unsolicited PDU
1015 * that has immediate data on
1019 int beiscsi_pci_soft_reset(struct beiscsi_hba
*phba
);
1020 int be_chk_reset_complete(struct beiscsi_hba
*phba
);
1022 void be_wrb_hdr_prepare(struct be_mcc_wrb
*wrb
, int payload_len
,
1023 bool embedded
, u8 sge_cnt
);
1025 void be_cmd_hdr_prepare(struct be_cmd_req_hdr
*req_hdr
,
1026 u8 subsystem
, u8 opcode
, int cmd_len
);
1028 #endif /* !BEISCSI_CMDS_H */