drivers/scsi/lpfc/lpfc_debugfs.h

   1 /*******************************************************************
   2  * This file is part of the Emulex Linux Device Driver for         *
   3  * Fibre Channel Host Bus Adapters.                                *
   4  * Copyright (C) 2007-2011 Emulex.  All rights reserved.           *
   5  * EMULEX and SLI are trademarks of Emulex.                        *
   6  * www.emulex.com                                                  *
   7  *                                                                 *
   8  * This program is free software; you can redistribute it and/or   *
   9  * modify it under the terms of version 2 of the GNU General       *
  10  * Public License as published by the Free Software Foundation.    *
  11  * This program is distributed in the hope that it will be useful. *
  12  * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
  13  * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
  14  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
  15  * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16  * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
  17  * more details, a copy of which can be found in the file COPYING  *
  18  * included with this package.                                     *
  19  *******************************************************************/
  20
  21 #ifndef _H_LPFC_DEBUG_FS
  22 #define _H_LPFC_DEBUG_FS
  23
  24 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
  25
  26 /* size of output line, for discovery_trace and slow_ring_trace */
  27 #define LPFC_DEBUG_TRC_ENTRY_SIZE 100
  28
  29 /* nodelist output buffer size */
  30 #define LPFC_NODELIST_SIZE 8192
  31 #define LPFC_NODELIST_ENTRY_SIZE 120
  32
  33 /* dumpHBASlim output buffer size */
  34 #define LPFC_DUMPHBASLIM_SIZE 4096
  35
  36 /* dumpHostSlim output buffer size */
  37 #define LPFC_DUMPHOSTSLIM_SIZE 4096
  38
  39 /* hbqinfo output buffer size */
  40 #define LPFC_HBQINFO_SIZE 8192
  41
  42 /*
  43  * For SLI4 iDiag debugfs diagnostics tool
  44  */
  45
  46 /* pciConf */
  47 #define LPFC_PCI_CFG_BROWSE 0xffff
  48 #define LPFC_PCI_CFG_RD_CMD_ARG 2
  49 #define LPFC_PCI_CFG_WR_CMD_ARG 3
  50 #define LPFC_PCI_CFG_SIZE 4096
  51 #define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
  52
  53 #define IDIAG_PCICFG_WHERE_INDX 0
  54 #define IDIAG_PCICFG_COUNT_INDX 1
  55 #define IDIAG_PCICFG_VALUE_INDX 2
  56
  57 /* barAcc */
  58 #define LPFC_PCI_BAR_BROWSE 0xffff
  59 #define LPFC_PCI_BAR_RD_CMD_ARG 3
  60 #define LPFC_PCI_BAR_WR_CMD_ARG 3
  61
  62 #define LPFC_PCI_IF0_BAR0_SIZE (1024 *  16)
  63 #define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
  64 #define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
  65 #define LPFC_PCI_IF2_BAR0_SIZE (1024 *  32)
  66
  67 #define LPFC_PCI_BAR_RD_BUF_SIZE 4096
  68 #define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
  69
  70 #define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
  71 #define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
  72 #define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
  73 #define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
  74
  75 #define IDIAG_BARACC_BAR_NUM_INDX 0
  76 #define IDIAG_BARACC_OFF_SET_INDX 1
  77 #define IDIAG_BARACC_ACC_MOD_INDX 2
  78 #define IDIAG_BARACC_REG_VAL_INDX 2
  79 #define IDIAG_BARACC_BAR_SZE_INDX 3
  80
  81 #define IDIAG_BARACC_BAR_0 0
  82 #define IDIAG_BARACC_BAR_1 1
  83 #define IDIAG_BARACC_BAR_2 2
  84
  85 #define SINGLE_WORD 1
  86
  87 /* queue info */
  88 #define LPFC_QUE_INFO_GET_BUF_SIZE 4096
  89
  90 /* queue acc */
  91 #define LPFC_QUE_ACC_BROWSE 0xffff
  92 #define LPFC_QUE_ACC_RD_CMD_ARG 4
  93 #define LPFC_QUE_ACC_WR_CMD_ARG 6
  94 #define LPFC_QUE_ACC_BUF_SIZE 4096
  95 #define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
  96
  97 #define LPFC_IDIAG_EQ 1
  98 #define LPFC_IDIAG_CQ 2
  99 #define LPFC_IDIAG_MQ 3
 100 #define LPFC_IDIAG_WQ 4
 101 #define LPFC_IDIAG_RQ 5
 102
 103 #define IDIAG_QUEACC_QUETP_INDX 0
 104 #define IDIAG_QUEACC_QUEID_INDX 1
 105 #define IDIAG_QUEACC_INDEX_INDX 2
 106 #define IDIAG_QUEACC_COUNT_INDX 3
 107 #define IDIAG_QUEACC_OFFST_INDX 4
 108 #define IDIAG_QUEACC_VALUE_INDX 5
 109
 110 /* doorbell register acc */
 111 #define LPFC_DRB_ACC_ALL 0xffff
 112 #define LPFC_DRB_ACC_RD_CMD_ARG 1
 113 #define LPFC_DRB_ACC_WR_CMD_ARG 2
 114 #define LPFC_DRB_ACC_BUF_SIZE 256
 115
 116 #define LPFC_DRB_EQCQ 1
 117 #define LPFC_DRB_MQ   2
 118 #define LPFC_DRB_WQ   3
 119 #define LPFC_DRB_RQ   4
 120
 121 #define LPFC_DRB_MAX  4
 122
 123 #define IDIAG_DRBACC_REGID_INDX 0
 124 #define IDIAG_DRBACC_VALUE_INDX 1
 125
 126 /* control register acc */
 127 #define LPFC_CTL_ACC_ALL 0xffff
 128 #define LPFC_CTL_ACC_RD_CMD_ARG 1
 129 #define LPFC_CTL_ACC_WR_CMD_ARG 2
 130 #define LPFC_CTL_ACC_BUF_SIZE 256
 131
 132 #define LPFC_CTL_PORT_SEM  1
 133 #define LPFC_CTL_PORT_STA  2
 134 #define LPFC_CTL_PORT_CTL  3
 135 #define LPFC_CTL_PORT_ER1  4
 136 #define LPFC_CTL_PORT_ER2  5
 137 #define LPFC_CTL_PDEV_CTL  6
 138
 139 #define LPFC_CTL_MAX  6
 140
 141 #define IDIAG_CTLACC_REGID_INDX 0
 142 #define IDIAG_CTLACC_VALUE_INDX 1
 143
 144 /* mailbox access */
 145 #define LPFC_MBX_DMP_ARG 4
 146
 147 #define LPFC_MBX_ACC_BUF_SIZE 512
 148 #define LPFC_MBX_ACC_LBUF_SZ 128
 149
 150 #define LPFC_MBX_DMP_MBX_WORD 0x00000001
 151 #define LPFC_MBX_DMP_MBX_BYTE 0x00000002
 152 #define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
 153
 154 #define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
 155 #define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
 156 #define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
 157 #define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
 158 #define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
 159                               LPFC_BSG_DMP_MBX_RD_BUF | \
 160                               LPFC_BSG_DMP_MBX_WR_MBX | \
 161                               LPFC_BSG_DMP_MBX_WR_BUF)
 162
 163 #define LPFC_MBX_DMP_ALL 0xffff
 164 #define LPFC_MBX_ALL_CMD 0xff
 165
 166 #define IDIAG_MBXACC_MBCMD_INDX 0
 167 #define IDIAG_MBXACC_DPMAP_INDX 1
 168 #define IDIAG_MBXACC_DPCNT_INDX 2
 169 #define IDIAG_MBXACC_WDCNT_INDX 3
 170
 171 /* extents access */
 172 #define LPFC_EXT_ACC_CMD_ARG 1
 173 #define LPFC_EXT_ACC_BUF_SIZE 4096
 174
 175 #define LPFC_EXT_ACC_AVAIL 0x1
 176 #define LPFC_EXT_ACC_ALLOC 0x2
 177 #define LPFC_EXT_ACC_DRIVR 0x4
 178 #define LPFC_EXT_ACC_ALL   (LPFC_EXT_ACC_DRIVR | \
 179                             LPFC_EXT_ACC_AVAIL | \
 180                             LPFC_EXT_ACC_ALLOC)
 181
 182 #define IDIAG_EXTACC_EXMAP_INDX 0
 183
 184 #define SIZE_U8  sizeof(uint8_t)
 185 #define SIZE_U16 sizeof(uint16_t)
 186 #define SIZE_U32 sizeof(uint32_t)
 187
 188 struct lpfc_debug {
 189         char *i_private;
 190         char op;
 191 #define LPFC_IDIAG_OP_RD 1
 192 #define LPFC_IDIAG_OP_WR 2
 193         char *buffer;
 194         int  len;
 195 };
 196
 197 struct lpfc_debugfs_trc {
 198         char *fmt;
 199         uint32_t data1;
 200         uint32_t data2;
 201         uint32_t data3;
 202         uint32_t seq_cnt;
 203         unsigned long jif;
 204 };
 205
 206 struct lpfc_idiag_offset {
 207         uint32_t last_rd;
 208 };
 209
 210 #define LPFC_IDIAG_CMD_DATA_SIZE 8
 211 struct lpfc_idiag_cmd {
 212         uint32_t opcode;
 213 #define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
 214 #define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
 215 #define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
 216 #define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
 217
 218 #define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
 219 #define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
 220 #define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
 221 #define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
 222
 223 #define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
 224 #define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
 225 #define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
 226 #define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
 227
 228 #define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
 229 #define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
 230 #define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
 231 #define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
 232
 233 #define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
 234 #define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
 235 #define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
 236 #define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
 237
 238 #define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
 239 #define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
 240
 241 #define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
 242
 243         uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
 244 };
 245
 246 struct lpfc_idiag {
 247         uint32_t active;
 248         struct lpfc_idiag_cmd cmd;
 249         struct lpfc_idiag_offset offset;
 250         void *ptr_private;
 251 };
 252 #endif
 253
 254 /* Mask for discovery_trace */
 255 #define LPFC_DISC_TRC_ELS_CMD           0x1     /* Trace ELS commands */
 256 #define LPFC_DISC_TRC_ELS_RSP           0x2     /* Trace ELS response */
 257 #define LPFC_DISC_TRC_ELS_UNSOL         0x4     /* Trace ELS rcv'ed   */
 258 #define LPFC_DISC_TRC_ELS_ALL           0x7     /* Trace ELS */
 259 #define LPFC_DISC_TRC_MBOX_VPORT        0x8     /* Trace vport MBOXs */
 260 #define LPFC_DISC_TRC_MBOX              0x10    /* Trace other MBOXs */
 261 #define LPFC_DISC_TRC_MBOX_ALL          0x18    /* Trace all MBOXs */
 262 #define LPFC_DISC_TRC_CT                0x20    /* Trace disc CT requests */
 263 #define LPFC_DISC_TRC_DSM               0x40    /* Trace DSM events */
 264 #define LPFC_DISC_TRC_RPORT             0x80    /* Trace rport events */
 265 #define LPFC_DISC_TRC_NODE              0x100   /* Trace ndlp state changes */
 266
 267 #define LPFC_DISC_TRC_DISCOVERY         0xef    /* common mask for general
 268                                                  * discovery */
 269 #endif /* H_LPFC_DEBUG_FS */