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Merge tag 'v3.3.7' into 3.3/master
[zen-stable.git] / drivers / staging / iio / adc / ad7793.c
blob6a058b19c49ad9df54304ae95b35c62a27034e92
1 /*
2 * AD7792/AD7793 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20
21 #include "../iio.h"
22 #include "../sysfs.h"
23 #include "../buffer.h"
24 #include "../ring_sw.h"
25 #include "../trigger.h"
26 #include "../trigger_consumer.h"
27
28 #include "ad7793.h"
29
30 /* NOTE:
31 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
32 * In order to avoid contentions on the SPI bus, it's therefore necessary
33 * to use spi bus locking.
34 *
35 * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
36 */
37
38 struct ad7793_chip_info {
39 struct iio_chan_spec channel[7];
40 };
41
42 struct ad7793_state {
43 struct spi_device *spi;
44 struct iio_trigger *trig;
45 const struct ad7793_chip_info *chip_info;
46 struct regulator *reg;
47 struct ad7793_platform_data *pdata;
48 wait_queue_head_t wq_data_avail;
49 bool done;
50 bool irq_dis;
51 u16 int_vref_mv;
52 u16 mode;
53 u16 conf;
54 u32 scale_avail[8][2];
55 /* Note this uses fact that 8 the mask always fits in a long */
56 unsigned long available_scan_masks[7];
57 /*
58 * DMA (thus cache coherency maintenance) requires the
59 * transfer buffers to live in their own cache lines.
60 */
61 u8 data[4] ____cacheline_aligned;
62 };
63
64 enum ad7793_supported_device_ids {
65 ID_AD7792,
66 ID_AD7793,
67 };
68
69 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
70 bool cs_change, unsigned char reg,
71 unsigned size, unsigned val)
72 {
73 u8 *data = st->data;
74 struct spi_transfer t = {
75 .tx_buf = data,
76 .len = size + 1,
77 .cs_change = cs_change,
78 };
79 struct spi_message m;
80
81 data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
82
83 switch (size) {
84 case 3:
85 data[1] = val >> 16;
86 data[2] = val >> 8;
87 data[3] = val;
88 break;
89 case 2:
90 data[1] = val >> 8;
91 data[2] = val;
92 break;
93 case 1:
94 data[1] = val;
95 break;
96 default:
97 return -EINVAL;
98 }
99
100 spi_message_init(&m);
101 spi_message_add_tail(&t, &m);
102
103 if (locked)
104 return spi_sync_locked(st->spi, &m);
105 else
106 return spi_sync(st->spi, &m);
107 }
108
109 static int ad7793_write_reg(struct ad7793_state *st,
110 unsigned reg, unsigned size, unsigned val)
111 {
112 return __ad7793_write_reg(st, false, false, reg, size, val);
113 }
114
115 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
116 bool cs_change, unsigned char reg,
117 int *val, unsigned size)
118 {
119 u8 *data = st->data;
120 int ret;
121 struct spi_transfer t[] = {
122 {
123 .tx_buf = data,
124 .len = 1,
125 }, {
126 .rx_buf = data,
127 .len = size,
128 .cs_change = cs_change,
129 },
130 };
131 struct spi_message m;
132
133 data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
134
135 spi_message_init(&m);
136 spi_message_add_tail(&t[0], &m);
137 spi_message_add_tail(&t[1], &m);
138
139 if (locked)
140 ret = spi_sync_locked(st->spi, &m);
141 else
142 ret = spi_sync(st->spi, &m);
143
144 if (ret < 0)
145 return ret;
146
147 switch (size) {
148 case 3:
149 *val = data[0] << 16 | data[1] << 8 | data[2];
150 break;
151 case 2:
152 *val = data[0] << 8 | data[1];
153 break;
154 case 1:
155 *val = data[0];
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 return 0;
162 }
163
164 static int ad7793_read_reg(struct ad7793_state *st,
165 unsigned reg, int *val, unsigned size)
166 {
167 return __ad7793_read_reg(st, 0, 0, reg, val, size);
168 }
169
170 static int ad7793_read(struct ad7793_state *st, unsigned ch,
171 unsigned len, int *val)
172 {
173 int ret;
174 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
175 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
176 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
177
178 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
179
180 spi_bus_lock(st->spi->master);
181 st->done = false;
182
183 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
184 sizeof(st->mode), st->mode);
185 if (ret < 0)
186 goto out;
187
188 st->irq_dis = false;
189 enable_irq(st->spi->irq);
190 wait_event_interruptible(st->wq_data_avail, st->done);
191
192 ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
193 out:
194 spi_bus_unlock(st->spi->master);
195
196 return ret;
197 }
198
199 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
200 {
201 int ret;
202
203 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
204 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
205
206 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
207
208 spi_bus_lock(st->spi->master);
209 st->done = false;
210
211 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
212 sizeof(st->mode), st->mode);
213 if (ret < 0)
214 goto out;
215
216 st->irq_dis = false;
217 enable_irq(st->spi->irq);
218 wait_event_interruptible(st->wq_data_avail, st->done);
219
220 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
221 AD7793_MODE_SEL(AD7793_MODE_IDLE);
222
223 ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
224 sizeof(st->mode), st->mode);
225 out:
226 spi_bus_unlock(st->spi->master);
227
228 return ret;
229 }
230
231 static const u8 ad7793_calib_arr[6][2] = {
232 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
233 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
234 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
235 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
236 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
237 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
238 };
239
240 static int ad7793_calibrate_all(struct ad7793_state *st)
241 {
242 int i, ret;
243
244 for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
245 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
246 ad7793_calib_arr[i][1]);
247 if (ret)
248 goto out;
249 }
250
251 return 0;
252 out:
253 dev_err(&st->spi->dev, "Calibration failed\n");
254 return ret;
255 }
256
257 static int ad7793_setup(struct ad7793_state *st)
258 {
259 int i, ret = -1;
260 unsigned long long scale_uv;
261 u32 id;
262
263 /* reset the serial interface */
264 ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
265 if (ret < 0)
266 goto out;
267 msleep(1); /* Wait for at least 500us */
268
269 /* write/read test for device presence */
270 ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
271 if (ret)
272 goto out;
273
274 id &= AD7793_ID_MASK;
275
276 if (!((id == AD7792_ID) || (id == AD7793_ID))) {
277 dev_err(&st->spi->dev, "device ID query failed\n");
278 goto out;
279 }
280
281 st->mode = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
282 AD7793_MODE_SEL(AD7793_MODE_IDLE);
283 st->conf = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
284
285 ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
286 if (ret)
287 goto out;
288
289 ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
290 if (ret)
291 goto out;
292
293 ret = ad7793_write_reg(st, AD7793_REG_IO,
294 sizeof(st->pdata->io), st->pdata->io);
295 if (ret)
296 goto out;
297
298 ret = ad7793_calibrate_all(st);
299 if (ret)
300 goto out;
301
302 /* Populate available ADC input ranges */
303 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
304 scale_uv = ((u64)st->int_vref_mv * 100000000)
305 >> (st->chip_info->channel[0].scan_type.realbits -
306 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
307 scale_uv >>= i;
308
309 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
310 st->scale_avail[i][0] = scale_uv;
311 }
312
313 return 0;
314 out:
315 dev_err(&st->spi->dev, "setup failed\n");
316 return ret;
317 }
318
319 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
320 {
321 struct ad7793_state *st = iio_priv(indio_dev);
322 struct iio_buffer *ring = indio_dev->buffer;
323 size_t d_size;
324 unsigned channel;
325
326 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
327 return -EINVAL;
328
329 channel = find_first_bit(indio_dev->active_scan_mask,
330 indio_dev->masklength);
331
332 d_size = bitmap_weight(indio_dev->active_scan_mask,
333 indio_dev->masklength) *
334 indio_dev->channels[0].scan_type.storagebits / 8;
335
336 if (ring->scan_timestamp) {
337 d_size += sizeof(s64);
338
339 if (d_size % sizeof(s64))
340 d_size += sizeof(s64) - (d_size % sizeof(s64));
341 }
342
343 if (indio_dev->buffer->access->set_bytes_per_datum)
344 indio_dev->buffer->access->
345 set_bytes_per_datum(indio_dev->buffer, d_size);
346
347 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
348 AD7793_MODE_SEL(AD7793_MODE_CONT);
349 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) |
350 AD7793_CONF_CHAN(indio_dev->channels[channel].address);
351
352 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
353
354 spi_bus_lock(st->spi->master);
355 __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
356 sizeof(st->mode), st->mode);
357
358 st->irq_dis = false;
359 enable_irq(st->spi->irq);
360
361 return 0;
362 }
363
364 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
365 {
366 struct ad7793_state *st = iio_priv(indio_dev);
367
368 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
369 AD7793_MODE_SEL(AD7793_MODE_IDLE);
370
371 st->done = false;
372 wait_event_interruptible(st->wq_data_avail, st->done);
373
374 if (!st->irq_dis)
375 disable_irq_nosync(st->spi->irq);
376
377 __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
378 sizeof(st->mode), st->mode);
379
380 return spi_bus_unlock(st->spi->master);
381 }
382
383 /**
384 * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
385 **/
386
387 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
388 {
389 struct iio_poll_func *pf = p;
390 struct iio_dev *indio_dev = pf->indio_dev;
391 struct iio_buffer *ring = indio_dev->buffer;
392 struct ad7793_state *st = iio_priv(indio_dev);
393 s64 dat64[2];
394 s32 *dat32 = (s32 *)dat64;
395
396 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
397 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
398 dat32,
399 indio_dev->channels[0].scan_type.realbits/8);
400
401 /* Guaranteed to be aligned with 8 byte boundary */
402 if (ring->scan_timestamp)
403 dat64[1] = pf->timestamp;
404
405 ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
406
407 iio_trigger_notify_done(indio_dev->trig);
408 st->irq_dis = false;
409 enable_irq(st->spi->irq);
410
411 return IRQ_HANDLED;
412 }
413
414 static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
415 .preenable = &ad7793_ring_preenable,
416 .postenable = &iio_triggered_buffer_postenable,
417 .predisable = &iio_triggered_buffer_predisable,
418 .postdisable = &ad7793_ring_postdisable,
419 };
420
421 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
422 {
423 int ret;
424
425 indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
426 if (!indio_dev->buffer) {
427 ret = -ENOMEM;
428 goto error_ret;
429 }
430 /* Effectively select the ring buffer implementation */
431 indio_dev->buffer->access = &ring_sw_access_funcs;
432 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
433 &ad7793_trigger_handler,
434 IRQF_ONESHOT,
435 indio_dev,
436 "ad7793_consumer%d",
437 indio_dev->id);
438 if (indio_dev->pollfunc == NULL) {
439 ret = -ENOMEM;
440 goto error_deallocate_sw_rb;
441 }
442
443 /* Ring buffer functions - here trigger setup related */
444 indio_dev->setup_ops = &ad7793_ring_setup_ops;
445
446 /* Flag that polled ring buffering is possible */
447 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
448 return 0;
449
450 error_deallocate_sw_rb:
451 iio_sw_rb_free(indio_dev->buffer);
452 error_ret:
453 return ret;
454 }
455
456 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
457 {
458 iio_dealloc_pollfunc(indio_dev->pollfunc);
459 iio_sw_rb_free(indio_dev->buffer);
460 }
461
462 /**
463 * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
464 **/
465 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
466 {
467 struct ad7793_state *st = iio_priv(private);
468
469 st->done = true;
470 wake_up_interruptible(&st->wq_data_avail);
471 disable_irq_nosync(irq);
472 st->irq_dis = true;
473 iio_trigger_poll(st->trig, iio_get_time_ns());
474
475 return IRQ_HANDLED;
476 }
477
478 static struct iio_trigger_ops ad7793_trigger_ops = {
479 .owner = THIS_MODULE,
480 };
481
482 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
483 {
484 struct ad7793_state *st = iio_priv(indio_dev);
485 int ret;
486
487 st->trig = iio_allocate_trigger("%s-dev%d",
488 spi_get_device_id(st->spi)->name,
489 indio_dev->id);
490 if (st->trig == NULL) {
491 ret = -ENOMEM;
492 goto error_ret;
493 }
494 st->trig->ops = &ad7793_trigger_ops;
495
496 ret = request_irq(st->spi->irq,
497 ad7793_data_rdy_trig_poll,
498 IRQF_TRIGGER_LOW,
499 spi_get_device_id(st->spi)->name,
500 indio_dev);
501 if (ret)
502 goto error_free_trig;
503
504 disable_irq_nosync(st->spi->irq);
505 st->irq_dis = true;
506 st->trig->dev.parent = &st->spi->dev;
507 st->trig->private_data = indio_dev;
508
509 ret = iio_trigger_register(st->trig);
510
511 /* select default trigger */
512 indio_dev->trig = st->trig;
513 if (ret)
514 goto error_free_irq;
515
516 return 0;
517
518 error_free_irq:
519 free_irq(st->spi->irq, indio_dev);
520 error_free_trig:
521 iio_free_trigger(st->trig);
522 error_ret:
523 return ret;
524 }
525
526 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
527 {
528 struct ad7793_state *st = iio_priv(indio_dev);
529
530 iio_trigger_unregister(st->trig);
531 free_irq(st->spi->irq, indio_dev);
532 iio_free_trigger(st->trig);
533 }
534
535 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
536 17, 16, 12, 10, 8, 6, 4};
537
538 static ssize_t ad7793_read_frequency(struct device *dev,
539 struct device_attribute *attr,
540 char *buf)
541 {
542 struct iio_dev *indio_dev = dev_get_drvdata(dev);
543 struct ad7793_state *st = iio_priv(indio_dev);
544
545 return sprintf(buf, "%d\n",
546 sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
547 }
548
549 static ssize_t ad7793_write_frequency(struct device *dev,
550 struct device_attribute *attr,
551 const char *buf,
552 size_t len)
553 {
554 struct iio_dev *indio_dev = dev_get_drvdata(dev);
555 struct ad7793_state *st = iio_priv(indio_dev);
556 long lval;
557 int i, ret;
558
559 mutex_lock(&indio_dev->mlock);
560 if (iio_buffer_enabled(indio_dev)) {
561 mutex_unlock(&indio_dev->mlock);
562 return -EBUSY;
563 }
564 mutex_unlock(&indio_dev->mlock);
565
566 ret = strict_strtol(buf, 10, &lval);
567 if (ret)
568 return ret;
569
570 ret = -EINVAL;
571
572 for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
573 if (lval == sample_freq_avail[i]) {
574 mutex_lock(&indio_dev->mlock);
575 st->mode &= ~AD7793_MODE_RATE(-1);
576 st->mode |= AD7793_MODE_RATE(i);
577 ad7793_write_reg(st, AD7793_REG_MODE,
578 sizeof(st->mode), st->mode);
579 mutex_unlock(&indio_dev->mlock);
580 ret = 0;
581 }
582
583 return ret ? ret : len;
584 }
585
586 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
587 ad7793_read_frequency,
588 ad7793_write_frequency);
589
590 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
591 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
592
593 static ssize_t ad7793_show_scale_available(struct device *dev,
594 struct device_attribute *attr, char *buf)
595 {
596 struct iio_dev *indio_dev = dev_get_drvdata(dev);
597 struct ad7793_state *st = iio_priv(indio_dev);
598 int i, len = 0;
599
600 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
601 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
602 st->scale_avail[i][1]);
603
604 len += sprintf(buf + len, "\n");
605
606 return len;
607 }
608
609 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
610 S_IRUGO, ad7793_show_scale_available, NULL, 0);
611
612 static struct attribute *ad7793_attributes[] = {
613 &iio_dev_attr_sampling_frequency.dev_attr.attr,
614 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
615 &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
616 NULL
617 };
618
619 static const struct attribute_group ad7793_attribute_group = {
620 .attrs = ad7793_attributes,
621 };
622
623 static int ad7793_read_raw(struct iio_dev *indio_dev,
624 struct iio_chan_spec const *chan,
625 int *val,
626 int *val2,
627 long m)
628 {
629 struct ad7793_state *st = iio_priv(indio_dev);
630 int ret, smpl = 0;
631 unsigned long long scale_uv;
632 bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
633
634 switch (m) {
635 case 0:
636 mutex_lock(&indio_dev->mlock);
637 if (iio_buffer_enabled(indio_dev))
638 ret = -EBUSY;
639 else
640 ret = ad7793_read(st, chan->address,
641 chan->scan_type.realbits / 8, &smpl);
642 mutex_unlock(&indio_dev->mlock);
643
644 if (ret < 0)
645 return ret;
646
647 *val = (smpl >> chan->scan_type.shift) &
648 ((1 << (chan->scan_type.realbits)) - 1);
649
650 if (!unipolar)
651 *val -= (1 << (chan->scan_type.realbits - 1));
652
653 return IIO_VAL_INT;
654
655 case IIO_CHAN_INFO_SCALE:
656 switch (chan->type) {
657 case IIO_VOLTAGE:
658 if (chan->differential) {
659 *val = st->
660 scale_avail[(st->conf >> 8) & 0x7][0];
661 *val2 = st->
662 scale_avail[(st->conf >> 8) & 0x7][1];
663 return IIO_VAL_INT_PLUS_NANO;
664 } else {
665 /* 1170mV / 2^23 * 6 */
666 scale_uv = (1170ULL * 100000000ULL * 6ULL)
667 >> (chan->scan_type.realbits -
668 (unipolar ? 0 : 1));
669 }
670 break;
671 case IIO_TEMP:
672 /* Always uses unity gain and internal ref */
673 scale_uv = (2500ULL * 100000000ULL)
674 >> (chan->scan_type.realbits -
675 (unipolar ? 0 : 1));
676 break;
677 default:
678 return -EINVAL;
679 }
680
681 *val2 = do_div(scale_uv, 100000000) * 10;
682 *val = scale_uv;
683
684 return IIO_VAL_INT_PLUS_NANO;
685 }
686 return -EINVAL;
687 }
688
689 static int ad7793_write_raw(struct iio_dev *indio_dev,
690 struct iio_chan_spec const *chan,
691 int val,
692 int val2,
693 long mask)
694 {
695 struct ad7793_state *st = iio_priv(indio_dev);
696 int ret, i;
697 unsigned int tmp;
698
699 mutex_lock(&indio_dev->mlock);
700 if (iio_buffer_enabled(indio_dev)) {
701 mutex_unlock(&indio_dev->mlock);
702 return -EBUSY;
703 }
704
705 switch (mask) {
706 case IIO_CHAN_INFO_SCALE:
707 ret = -EINVAL;
708 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
709 if (val2 == st->scale_avail[i][1]) {
710 tmp = st->conf;
711 st->conf &= ~AD7793_CONF_GAIN(-1);
712 st->conf |= AD7793_CONF_GAIN(i);
713
714 if (tmp != st->conf) {
715 ad7793_write_reg(st, AD7793_REG_CONF,
716 sizeof(st->conf),
717 st->conf);
718 ad7793_calibrate_all(st);
719 }
720 ret = 0;
721 }
722
723 default:
724 ret = -EINVAL;
725 }
726
727 mutex_unlock(&indio_dev->mlock);
728 return ret;
729 }
730
731 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
732 struct iio_trigger *trig)
733 {
734 if (indio_dev->trig != trig)
735 return -EINVAL;
736
737 return 0;
738 }
739
740 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
741 struct iio_chan_spec const *chan,
742 long mask)
743 {
744 return IIO_VAL_INT_PLUS_NANO;
745 }
746
747 static const struct iio_info ad7793_info = {
748 .read_raw = &ad7793_read_raw,
749 .write_raw = &ad7793_write_raw,
750 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
751 .attrs = &ad7793_attribute_group,
752 .validate_trigger = ad7793_validate_trigger,
753 .driver_module = THIS_MODULE,
754 };
755
756 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
757 [ID_AD7793] = {
758 .channel[0] = {
759 .type = IIO_VOLTAGE,
760 .differential = 1,
761 .indexed = 1,
762 .channel = 0,
763 .channel2 = 0,
764 .address = AD7793_CH_AIN1P_AIN1M,
765 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
766 .scan_index = 0,
767 .scan_type = IIO_ST('s', 24, 32, 0)
768 },
769 .channel[1] = {
770 .type = IIO_VOLTAGE,
771 .differential = 1,
772 .indexed = 1,
773 .channel = 1,
774 .channel2 = 1,
775 .address = AD7793_CH_AIN2P_AIN2M,
776 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
777 .scan_index = 1,
778 .scan_type = IIO_ST('s', 24, 32, 0)
779 },
780 .channel[2] = {
781 .type = IIO_VOLTAGE,
782 .differential = 1,
783 .indexed = 1,
784 .channel = 2,
785 .channel2 = 2,
786 .address = AD7793_CH_AIN3P_AIN3M,
787 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
788 .scan_index = 2,
789 .scan_type = IIO_ST('s', 24, 32, 0)
790 },
791 .channel[3] = {
792 .type = IIO_VOLTAGE,
793 .differential = 1,
794 .extend_name = "shorted",
795 .indexed = 1,
796 .channel = 2,
797 .channel2 = 2,
798 .address = AD7793_CH_AIN1M_AIN1M,
799 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
800 .scan_index = 2,
801 .scan_type = IIO_ST('s', 24, 32, 0)
802 },
803 .channel[4] = {
804 .type = IIO_TEMP,
805 .indexed = 1,
806 .channel = 0,
807 .address = AD7793_CH_TEMP,
808 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
809 .scan_index = 4,
810 .scan_type = IIO_ST('s', 24, 32, 0),
811 },
812 .channel[5] = {
813 .type = IIO_VOLTAGE,
814 .extend_name = "supply",
815 .indexed = 1,
816 .channel = 4,
817 .address = AD7793_CH_AVDD_MONITOR,
818 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
819 .scan_index = 5,
820 .scan_type = IIO_ST('s', 24, 32, 0),
821 },
822 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
823 },
824 [ID_AD7792] = {
825 .channel[0] = {
826 .type = IIO_VOLTAGE,
827 .differential = 1,
828 .indexed = 1,
829 .channel = 0,
830 .channel2 = 0,
831 .address = AD7793_CH_AIN1P_AIN1M,
832 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
833 .scan_index = 0,
834 .scan_type = IIO_ST('s', 16, 32, 0)
835 },
836 .channel[1] = {
837 .type = IIO_VOLTAGE,
838 .differential = 1,
839 .indexed = 1,
840 .channel = 1,
841 .channel2 = 1,
842 .address = AD7793_CH_AIN2P_AIN2M,
843 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
844 .scan_index = 1,
845 .scan_type = IIO_ST('s', 16, 32, 0)
846 },
847 .channel[2] = {
848 .type = IIO_VOLTAGE,
849 .differential = 1,
850 .indexed = 1,
851 .channel = 2,
852 .channel2 = 2,
853 .address = AD7793_CH_AIN3P_AIN3M,
854 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
855 .scan_index = 2,
856 .scan_type = IIO_ST('s', 16, 32, 0)
857 },
858 .channel[3] = {
859 .type = IIO_VOLTAGE,
860 .differential = 1,
861 .extend_name = "shorted",
862 .indexed = 1,
863 .channel = 2,
864 .channel2 = 2,
865 .address = AD7793_CH_AIN1M_AIN1M,
866 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
867 .scan_index = 2,
868 .scan_type = IIO_ST('s', 16, 32, 0)
869 },
870 .channel[4] = {
871 .type = IIO_TEMP,
872 .indexed = 1,
873 .channel = 0,
874 .address = AD7793_CH_TEMP,
875 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
876 .scan_index = 4,
877 .scan_type = IIO_ST('s', 16, 32, 0),
878 },
879 .channel[5] = {
880 .type = IIO_VOLTAGE,
881 .extend_name = "supply",
882 .indexed = 1,
883 .channel = 4,
884 .address = AD7793_CH_AVDD_MONITOR,
885 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
886 .scan_index = 5,
887 .scan_type = IIO_ST('s', 16, 32, 0),
888 },
889 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
890 },
891 };
892
893 static int __devinit ad7793_probe(struct spi_device *spi)
894 {
895 struct ad7793_platform_data *pdata = spi->dev.platform_data;
896 struct ad7793_state *st;
897 struct iio_dev *indio_dev;
898 int ret, i, voltage_uv = 0;
899
900 if (!pdata) {
901 dev_err(&spi->dev, "no platform data?\n");
902 return -ENODEV;
903 }
904
905 if (!spi->irq) {
906 dev_err(&spi->dev, "no IRQ?\n");
907 return -ENODEV;
908 }
909
910 indio_dev = iio_allocate_device(sizeof(*st));
911 if (indio_dev == NULL)
912 return -ENOMEM;
913
914 st = iio_priv(indio_dev);
915
916 st->reg = regulator_get(&spi->dev, "vcc");
917 if (!IS_ERR(st->reg)) {
918 ret = regulator_enable(st->reg);
919 if (ret)
920 goto error_put_reg;
921
922 voltage_uv = regulator_get_voltage(st->reg);
923 }
924
925 st->chip_info =
926 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
927
928 st->pdata = pdata;
929
930 if (pdata && pdata->vref_mv)
931 st->int_vref_mv = pdata->vref_mv;
932 else if (voltage_uv)
933 st->int_vref_mv = voltage_uv / 1000;
934 else
935 st->int_vref_mv = 2500; /* Build-in ref */
936
937 spi_set_drvdata(spi, indio_dev);
938 st->spi = spi;
939
940 indio_dev->dev.parent = &spi->dev;
941 indio_dev->name = spi_get_device_id(spi)->name;
942 indio_dev->modes = INDIO_DIRECT_MODE;
943 indio_dev->channels = st->chip_info->channel;
944 indio_dev->available_scan_masks = st->available_scan_masks;
945 indio_dev->num_channels = 7;
946 indio_dev->info = &ad7793_info;
947
948 for (i = 0; i < indio_dev->num_channels; i++) {
949 set_bit(i, &st->available_scan_masks[i]);
950 set_bit(indio_dev->
951 channels[indio_dev->num_channels - 1].scan_index,
952 &st->available_scan_masks[i]);
953 }
954
955 init_waitqueue_head(&st->wq_data_avail);
956
957 ret = ad7793_register_ring_funcs_and_init(indio_dev);
958 if (ret)
959 goto error_disable_reg;
960
961 ret = ad7793_probe_trigger(indio_dev);
962 if (ret)
963 goto error_unreg_ring;
964
965 ret = iio_buffer_register(indio_dev,
966 indio_dev->channels,
967 indio_dev->num_channels);
968 if (ret)
969 goto error_remove_trigger;
970
971 ret = ad7793_setup(st);
972 if (ret)
973 goto error_uninitialize_ring;
974
975 ret = iio_device_register(indio_dev);
976 if (ret)
977 goto error_uninitialize_ring;
978
979 return 0;
980
981 error_uninitialize_ring:
982 iio_buffer_unregister(indio_dev);
983 error_remove_trigger:
984 ad7793_remove_trigger(indio_dev);
985 error_unreg_ring:
986 ad7793_ring_cleanup(indio_dev);
987 error_disable_reg:
988 if (!IS_ERR(st->reg))
989 regulator_disable(st->reg);
990 error_put_reg:
991 if (!IS_ERR(st->reg))
992 regulator_put(st->reg);
993
994 iio_free_device(indio_dev);
995
996 return ret;
997 }
998
999 static int ad7793_remove(struct spi_device *spi)
1000 {
1001 struct iio_dev *indio_dev = spi_get_drvdata(spi);
1002 struct ad7793_state *st = iio_priv(indio_dev);
1003
1004 iio_device_unregister(indio_dev);
1005 iio_buffer_unregister(indio_dev);
1006 ad7793_remove_trigger(indio_dev);
1007 ad7793_ring_cleanup(indio_dev);
1008
1009 if (!IS_ERR(st->reg)) {
1010 regulator_disable(st->reg);
1011 regulator_put(st->reg);
1012 }
1013
1014 iio_free_device(indio_dev);
1015
1016 return 0;
1017 }
1018
1019 static const struct spi_device_id ad7793_id[] = {
1020 {"ad7792", ID_AD7792},
1021 {"ad7793", ID_AD7793},
1022 {}
1023 };
1024 MODULE_DEVICE_TABLE(spi, ad7793_id);
1025
1026 static struct spi_driver ad7793_driver = {
1027 .driver = {
1028 .name = "ad7793",
1029 .owner = THIS_MODULE,
1030 },
1031 .probe = ad7793_probe,
1032 .remove = __devexit_p(ad7793_remove),
1033 .id_table = ad7793_id,
1034 };
1035 module_spi_driver(ad7793_driver);
1036
1037 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
1038 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
1039 MODULE_LICENSE("GPL v2");