include/linux/bcma/bcma_driver_pci.h

   1 #ifndef LINUX_BCMA_DRIVER_PCI_H_
   2 #define LINUX_BCMA_DRIVER_PCI_H_
   3
   4 #include <linux/types.h>
   5
   6 struct pci_dev;
   7
   8 /** PCI core registers. **/
   9 #define BCMA_CORE_PCI_CTL                       0x0000  /* PCI Control */
  10 #define  BCMA_CORE_PCI_CTL_RST_OE               0x00000001 /* PCI_RESET Output Enable */
  11 #define  BCMA_CORE_PCI_CTL_RST                  0x00000002 /* PCI_RESET driven out to pin */
  12 #define  BCMA_CORE_PCI_CTL_CLK_OE               0x00000004 /* Clock gate Output Enable */
  13 #define  BCMA_CORE_PCI_CTL_CLK                  0x00000008 /* Gate for clock driven out to pin */
  14 #define BCMA_CORE_PCI_ARBCTL                    0x0010  /* PCI Arbiter Control */
  15 #define  BCMA_CORE_PCI_ARBCTL_INTERN            0x00000001 /* Use internal arbiter */
  16 #define  BCMA_CORE_PCI_ARBCTL_EXTERN            0x00000002 /* Use external arbiter */
  17 #define  BCMA_CORE_PCI_ARBCTL_PARKID            0x00000006 /* Mask, selects which agent is parked on an idle bus */
  18 #define   BCMA_CORE_PCI_ARBCTL_PARKID_LAST      0x00000000 /* Last requestor */
  19 #define   BCMA_CORE_PCI_ARBCTL_PARKID_4710      0x00000002 /* 4710 */
  20 #define   BCMA_CORE_PCI_ARBCTL_PARKID_EXT0      0x00000004 /* External requestor 0 */
  21 #define   BCMA_CORE_PCI_ARBCTL_PARKID_EXT1      0x00000006 /* External requestor 1 */
  22 #define BCMA_CORE_PCI_ISTAT                     0x0020  /* Interrupt status */
  23 #define  BCMA_CORE_PCI_ISTAT_INTA               0x00000001 /* PCI INTA# */
  24 #define  BCMA_CORE_PCI_ISTAT_INTB               0x00000002 /* PCI INTB# */
  25 #define  BCMA_CORE_PCI_ISTAT_SERR               0x00000004 /* PCI SERR# (write to clear) */
  26 #define  BCMA_CORE_PCI_ISTAT_PERR               0x00000008 /* PCI PERR# (write to clear) */
  27 #define  BCMA_CORE_PCI_ISTAT_PME                0x00000010 /* PCI PME# */
  28 #define BCMA_CORE_PCI_IMASK                     0x0024  /* Interrupt mask */
  29 #define  BCMA_CORE_PCI_IMASK_INTA               0x00000001 /* PCI INTA# */
  30 #define  BCMA_CORE_PCI_IMASK_INTB               0x00000002 /* PCI INTB# */
  31 #define  BCMA_CORE_PCI_IMASK_SERR               0x00000004 /* PCI SERR# */
  32 #define  BCMA_CORE_PCI_IMASK_PERR               0x00000008 /* PCI PERR# */
  33 #define  BCMA_CORE_PCI_IMASK_PME                0x00000010 /* PCI PME# */
  34 #define BCMA_CORE_PCI_MBOX                      0x0028  /* Backplane to PCI Mailbox */
  35 #define  BCMA_CORE_PCI_MBOX_F0_0                0x00000100 /* PCI function 0, INT 0 */
  36 #define  BCMA_CORE_PCI_MBOX_F0_1                0x00000200 /* PCI function 0, INT 1 */
  37 #define  BCMA_CORE_PCI_MBOX_F1_0                0x00000400 /* PCI function 1, INT 0 */
  38 #define  BCMA_CORE_PCI_MBOX_F1_1                0x00000800 /* PCI function 1, INT 1 */
  39 #define  BCMA_CORE_PCI_MBOX_F2_0                0x00001000 /* PCI function 2, INT 0 */
  40 #define  BCMA_CORE_PCI_MBOX_F2_1                0x00002000 /* PCI function 2, INT 1 */
  41 #define  BCMA_CORE_PCI_MBOX_F3_0                0x00004000 /* PCI function 3, INT 0 */
  42 #define  BCMA_CORE_PCI_MBOX_F3_1                0x00008000 /* PCI function 3, INT 1 */
  43 #define BCMA_CORE_PCI_BCAST_ADDR                0x0050  /* Backplane Broadcast Address */
  44 #define  BCMA_CORE_PCI_BCAST_ADDR_MASK          0x000000FF
  45 #define BCMA_CORE_PCI_BCAST_DATA                0x0054  /* Backplane Broadcast Data */
  46 #define BCMA_CORE_PCI_GPIO_IN                   0x0060  /* rev >= 2 only */
  47 #define BCMA_CORE_PCI_GPIO_OUT                  0x0064  /* rev >= 2 only */
  48 #define BCMA_CORE_PCI_GPIO_ENABLE               0x0068  /* rev >= 2 only */
  49 #define BCMA_CORE_PCI_GPIO_CTL                  0x006C  /* rev >= 2 only */
  50 #define BCMA_CORE_PCI_SBTOPCI0                  0x0100  /* Backplane to PCI translation 0 (sbtopci0) */
  51 #define  BCMA_CORE_PCI_SBTOPCI0_MASK            0xFC000000
  52 #define BCMA_CORE_PCI_SBTOPCI1                  0x0104  /* Backplane to PCI translation 1 (sbtopci1) */
  53 #define  BCMA_CORE_PCI_SBTOPCI1_MASK            0xFC000000
  54 #define BCMA_CORE_PCI_SBTOPCI2                  0x0108  /* Backplane to PCI translation 2 (sbtopci2) */
  55 #define  BCMA_CORE_PCI_SBTOPCI2_MASK            0xC0000000
  56 #define BCMA_CORE_PCI_PCICFG0                   0x0400  /* PCI config space 0 (rev >= 8) */
  57 #define BCMA_CORE_PCI_PCICFG1                   0x0500  /* PCI config space 1 (rev >= 8) */
  58 #define BCMA_CORE_PCI_PCICFG2                   0x0600  /* PCI config space 2 (rev >= 8) */
  59 #define BCMA_CORE_PCI_PCICFG3                   0x0700  /* PCI config space 3 (rev >= 8) */
  60 #define BCMA_CORE_PCI_SPROM(wordoffset)         (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
  61
  62 /* SBtoPCIx */
  63 #define BCMA_CORE_PCI_SBTOPCI_MEM               0x00000000
  64 #define BCMA_CORE_PCI_SBTOPCI_IO                0x00000001
  65 #define BCMA_CORE_PCI_SBTOPCI_CFG0              0x00000002
  66 #define BCMA_CORE_PCI_SBTOPCI_CFG1              0x00000003
  67 #define BCMA_CORE_PCI_SBTOPCI_PREF              0x00000004 /* Prefetch enable */
  68 #define BCMA_CORE_PCI_SBTOPCI_BURST             0x00000008 /* Burst enable */
  69 #define BCMA_CORE_PCI_SBTOPCI_MRM               0x00000020 /* Memory Read Multiple */
  70 #define BCMA_CORE_PCI_SBTOPCI_RC                0x00000030 /* Read Command mask (rev >= 11) */
  71 #define  BCMA_CORE_PCI_SBTOPCI_RC_READ          0x00000000 /* Memory read */
  72 #define  BCMA_CORE_PCI_SBTOPCI_RC_READL         0x00000010 /* Memory read line */
  73 #define  BCMA_CORE_PCI_SBTOPCI_RC_READM         0x00000020 /* Memory read multiple */
  74
  75 /* PCIcore specific boardflags */
  76 #define BCMA_CORE_PCI_BFL_NOPCI                 0x00000400 /* Board leaves PCI floating */
  77
  78 struct bcma_drv_pci {
  79         struct bcma_device *core;
  80         u8 setup_done:1;
  81 };
  82
  83 /* Register access */
  84 #define pcicore_read32(pc, offset)              bcma_read32((pc)->core, offset)
  85 #define pcicore_write32(pc, offset, val)        bcma_write32((pc)->core, offset, val)
  86
  87 extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
  88 extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
  89                                  struct bcma_device *core, bool enable);
  90
  91 #endif /* LINUX_BCMA_DRIVER_PCI_H_ */