2 * Marvell Orion SPI controller driver
4 * Author: Shadi Ammouri <shadi@marvell.com>
5 * Copyright (C) 2007-2008 Marvell Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/err.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/orion_spi.h>
20 #include <linux/module.h>
21 #include <asm/unaligned.h>
23 #define DRIVER_NAME "orion_spi"
25 #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
26 #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
28 #define ORION_SPI_IF_CTRL_REG 0x00
29 #define ORION_SPI_IF_CONFIG_REG 0x04
30 #define ORION_SPI_DATA_OUT_REG 0x08
31 #define ORION_SPI_DATA_IN_REG 0x0c
32 #define ORION_SPI_INT_CAUSE_REG 0x10
34 #define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
35 #define ORION_SPI_CLK_PRESCALE_MASK 0x1F
38 struct work_struct work
;
40 /* Lock access to transfer list. */
43 struct list_head msg_queue
;
44 struct spi_master
*master
;
46 unsigned int max_speed
;
47 unsigned int min_speed
;
48 struct orion_spi_info
*spi_info
;
51 static struct workqueue_struct
*orion_spi_wq
;
53 static inline void __iomem
*spi_reg(struct orion_spi
*orion_spi
, u32 reg
)
55 return orion_spi
->base
+ reg
;
59 orion_spi_setbits(struct orion_spi
*orion_spi
, u32 reg
, u32 mask
)
61 void __iomem
*reg_addr
= spi_reg(orion_spi
, reg
);
64 val
= readl(reg_addr
);
66 writel(val
, reg_addr
);
70 orion_spi_clrbits(struct orion_spi
*orion_spi
, u32 reg
, u32 mask
)
72 void __iomem
*reg_addr
= spi_reg(orion_spi
, reg
);
75 val
= readl(reg_addr
);
77 writel(val
, reg_addr
);
80 static int orion_spi_set_transfer_size(struct orion_spi
*orion_spi
, int size
)
83 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
84 ORION_SPI_IF_8_16_BIT_MODE
);
85 } else if (size
== 8) {
86 orion_spi_clrbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
87 ORION_SPI_IF_8_16_BIT_MODE
);
89 pr_debug("Bad bits per word value %d (only 8 or 16 are "
97 static int orion_spi_baudrate_set(struct spi_device
*spi
, unsigned int speed
)
103 struct orion_spi
*orion_spi
;
105 orion_spi
= spi_master_get_devdata(spi
->master
);
107 tclk_hz
= orion_spi
->spi_info
->tclk
;
110 * the supported rates are: 4,6,8...30
111 * round up as we look for equal or less speed
113 rate
= DIV_ROUND_UP(tclk_hz
, speed
);
114 rate
= roundup(rate
, 2);
116 /* check if requested speed is too small */
123 /* Convert the rate to SPI clock divisor value. */
124 prescale
= 0x10 + rate
/2;
126 reg
= readl(spi_reg(orion_spi
, ORION_SPI_IF_CONFIG_REG
));
127 reg
= ((reg
& ~ORION_SPI_CLK_PRESCALE_MASK
) | prescale
);
128 writel(reg
, spi_reg(orion_spi
, ORION_SPI_IF_CONFIG_REG
));
134 * called only when no transfer is active on the bus
137 orion_spi_setup_transfer(struct spi_device
*spi
, struct spi_transfer
*t
)
139 struct orion_spi
*orion_spi
;
140 unsigned int speed
= spi
->max_speed_hz
;
141 unsigned int bits_per_word
= spi
->bits_per_word
;
144 orion_spi
= spi_master_get_devdata(spi
->master
);
146 if ((t
!= NULL
) && t
->speed_hz
)
149 if ((t
!= NULL
) && t
->bits_per_word
)
150 bits_per_word
= t
->bits_per_word
;
152 rc
= orion_spi_baudrate_set(spi
, speed
);
156 return orion_spi_set_transfer_size(orion_spi
, bits_per_word
);
159 static void orion_spi_set_cs(struct orion_spi
*orion_spi
, int enable
)
162 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CTRL_REG
, 0x1);
164 orion_spi_clrbits(orion_spi
, ORION_SPI_IF_CTRL_REG
, 0x1);
167 static inline int orion_spi_wait_till_ready(struct orion_spi
*orion_spi
)
171 for (i
= 0; i
< ORION_SPI_WAIT_RDY_MAX_LOOP
; i
++) {
172 if (readl(spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
)))
182 orion_spi_write_read_8bit(struct spi_device
*spi
,
183 const u8
**tx_buf
, u8
**rx_buf
)
185 void __iomem
*tx_reg
, *rx_reg
, *int_reg
;
186 struct orion_spi
*orion_spi
;
188 orion_spi
= spi_master_get_devdata(spi
->master
);
189 tx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_OUT_REG
);
190 rx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_IN_REG
);
191 int_reg
= spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
);
193 /* clear the interrupt cause register */
194 writel(0x0, int_reg
);
196 if (tx_buf
&& *tx_buf
)
197 writel(*(*tx_buf
)++, tx_reg
);
201 if (orion_spi_wait_till_ready(orion_spi
) < 0) {
202 dev_err(&spi
->dev
, "TXS timed out\n");
206 if (rx_buf
&& *rx_buf
)
207 *(*rx_buf
)++ = readl(rx_reg
);
213 orion_spi_write_read_16bit(struct spi_device
*spi
,
214 const u16
**tx_buf
, u16
**rx_buf
)
216 void __iomem
*tx_reg
, *rx_reg
, *int_reg
;
217 struct orion_spi
*orion_spi
;
219 orion_spi
= spi_master_get_devdata(spi
->master
);
220 tx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_OUT_REG
);
221 rx_reg
= spi_reg(orion_spi
, ORION_SPI_DATA_IN_REG
);
222 int_reg
= spi_reg(orion_spi
, ORION_SPI_INT_CAUSE_REG
);
224 /* clear the interrupt cause register */
225 writel(0x0, int_reg
);
227 if (tx_buf
&& *tx_buf
)
228 writel(__cpu_to_le16(get_unaligned((*tx_buf
)++)), tx_reg
);
232 if (orion_spi_wait_till_ready(orion_spi
) < 0) {
233 dev_err(&spi
->dev
, "TXS timed out\n");
237 if (rx_buf
&& *rx_buf
)
238 put_unaligned(__le16_to_cpu(readl(rx_reg
)), (*rx_buf
)++);
244 orion_spi_write_read(struct spi_device
*spi
, struct spi_transfer
*xfer
)
246 struct orion_spi
*orion_spi
;
250 orion_spi
= spi_master_get_devdata(spi
->master
);
251 word_len
= spi
->bits_per_word
;
255 const u8
*tx
= xfer
->tx_buf
;
256 u8
*rx
= xfer
->rx_buf
;
259 if (orion_spi_write_read_8bit(spi
, &tx
, &rx
) < 0)
263 } else if (word_len
== 16) {
264 const u16
*tx
= xfer
->tx_buf
;
265 u16
*rx
= xfer
->rx_buf
;
268 if (orion_spi_write_read_16bit(spi
, &tx
, &rx
) < 0)
275 return xfer
->len
- count
;
279 static void orion_spi_work(struct work_struct
*work
)
281 struct orion_spi
*orion_spi
=
282 container_of(work
, struct orion_spi
, work
);
284 spin_lock_irq(&orion_spi
->lock
);
285 while (!list_empty(&orion_spi
->msg_queue
)) {
286 struct spi_message
*m
;
287 struct spi_device
*spi
;
288 struct spi_transfer
*t
= NULL
;
289 int par_override
= 0;
293 m
= container_of(orion_spi
->msg_queue
.next
, struct spi_message
,
296 list_del_init(&m
->queue
);
297 spin_unlock_irq(&orion_spi
->lock
);
302 status
= orion_spi_setup_transfer(spi
, NULL
);
307 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
308 if (par_override
|| t
->speed_hz
|| t
->bits_per_word
) {
310 status
= orion_spi_setup_transfer(spi
, t
);
313 if (!t
->speed_hz
&& !t
->bits_per_word
)
318 orion_spi_set_cs(orion_spi
, 1);
324 orion_spi_write_read(spi
, t
);
327 udelay(t
->delay_usecs
);
330 orion_spi_set_cs(orion_spi
, 0);
337 orion_spi_set_cs(orion_spi
, 0);
340 m
->complete(m
->context
);
342 spin_lock_irq(&orion_spi
->lock
);
345 spin_unlock_irq(&orion_spi
->lock
);
348 static int __init
orion_spi_reset(struct orion_spi
*orion_spi
)
350 /* Verify that the CS is deasserted */
351 orion_spi_set_cs(orion_spi
, 0);
356 static int orion_spi_setup(struct spi_device
*spi
)
358 struct orion_spi
*orion_spi
;
360 orion_spi
= spi_master_get_devdata(spi
->master
);
362 /* Fix ac timing if required. */
363 if (orion_spi
->spi_info
->enable_clock_fix
)
364 orion_spi_setbits(orion_spi
, ORION_SPI_IF_CONFIG_REG
,
367 if ((spi
->max_speed_hz
== 0)
368 || (spi
->max_speed_hz
> orion_spi
->max_speed
))
369 spi
->max_speed_hz
= orion_spi
->max_speed
;
371 if (spi
->max_speed_hz
< orion_spi
->min_speed
) {
372 dev_err(&spi
->dev
, "setup: requested speed too low %d Hz\n",
378 * baudrate & width will be set orion_spi_setup_transfer
383 static int orion_spi_transfer(struct spi_device
*spi
, struct spi_message
*m
)
385 struct orion_spi
*orion_spi
;
386 struct spi_transfer
*t
= NULL
;
389 m
->actual_length
= 0;
392 /* reject invalid messages and transfers */
393 if (list_empty(&m
->transfers
) || !m
->complete
)
396 orion_spi
= spi_master_get_devdata(spi
->master
);
398 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
399 unsigned int bits_per_word
= spi
->bits_per_word
;
401 if (t
->tx_buf
== NULL
&& t
->rx_buf
== NULL
&& t
->len
) {
403 "message rejected : "
404 "invalid transfer data buffers\n");
408 if (t
->bits_per_word
)
409 bits_per_word
= t
->bits_per_word
;
411 if ((bits_per_word
!= 8) && (bits_per_word
!= 16)) {
413 "message rejected : "
414 "invalid transfer bits_per_word (%d bits)\n",
418 /*make sure buffer length is even when working in 16 bit mode*/
419 if ((t
->bits_per_word
== 16) && (t
->len
& 1)) {
421 "message rejected : "
422 "odd data length (%d) while in 16 bit mode\n",
427 if (t
->speed_hz
&& t
->speed_hz
< orion_spi
->min_speed
) {
429 "message rejected : "
430 "device min speed (%d Hz) exceeds "
431 "required transfer speed (%d Hz)\n",
432 orion_spi
->min_speed
, t
->speed_hz
);
438 spin_lock_irqsave(&orion_spi
->lock
, flags
);
439 list_add_tail(&m
->queue
, &orion_spi
->msg_queue
);
440 queue_work(orion_spi_wq
, &orion_spi
->work
);
441 spin_unlock_irqrestore(&orion_spi
->lock
, flags
);
445 /* Message rejected and not queued */
448 m
->complete(m
->context
);
452 static int __init
orion_spi_probe(struct platform_device
*pdev
)
454 struct spi_master
*master
;
455 struct orion_spi
*spi
;
457 struct orion_spi_info
*spi_info
;
460 spi_info
= pdev
->dev
.platform_data
;
462 master
= spi_alloc_master(&pdev
->dev
, sizeof *spi
);
463 if (master
== NULL
) {
464 dev_dbg(&pdev
->dev
, "master allocation failed\n");
469 master
->bus_num
= pdev
->id
;
471 /* we support only mode 0, and no options */
472 master
->mode_bits
= 0;
474 master
->setup
= orion_spi_setup
;
475 master
->transfer
= orion_spi_transfer
;
476 master
->num_chipselect
= ORION_NUM_CHIPSELECTS
;
478 dev_set_drvdata(&pdev
->dev
, master
);
480 spi
= spi_master_get_devdata(master
);
481 spi
->master
= master
;
482 spi
->spi_info
= spi_info
;
484 spi
->max_speed
= DIV_ROUND_UP(spi_info
->tclk
, 4);
485 spi
->min_speed
= DIV_ROUND_UP(spi_info
->tclk
, 30);
487 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
493 if (!request_mem_region(r
->start
, resource_size(r
),
494 dev_name(&pdev
->dev
))) {
498 spi
->base
= ioremap(r
->start
, SZ_1K
);
500 INIT_WORK(&spi
->work
, orion_spi_work
);
502 spin_lock_init(&spi
->lock
);
503 INIT_LIST_HEAD(&spi
->msg_queue
);
505 if (orion_spi_reset(spi
) < 0)
508 status
= spi_register_master(master
);
515 release_mem_region(r
->start
, resource_size(r
));
518 spi_master_put(master
);
523 static int __exit
orion_spi_remove(struct platform_device
*pdev
)
525 struct spi_master
*master
;
526 struct orion_spi
*spi
;
529 master
= dev_get_drvdata(&pdev
->dev
);
530 spi
= spi_master_get_devdata(master
);
532 cancel_work_sync(&spi
->work
);
534 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
535 release_mem_region(r
->start
, resource_size(r
));
537 spi_unregister_master(master
);
542 MODULE_ALIAS("platform:" DRIVER_NAME
);
544 static struct platform_driver orion_spi_driver
= {
547 .owner
= THIS_MODULE
,
549 .remove
= __exit_p(orion_spi_remove
),
552 static int __init
orion_spi_init(void)
554 orion_spi_wq
= create_singlethread_workqueue(
555 orion_spi_driver
.driver
.name
);
556 if (orion_spi_wq
== NULL
)
559 return platform_driver_probe(&orion_spi_driver
, orion_spi_probe
);
561 module_init(orion_spi_init
);
563 static void __exit
orion_spi_exit(void)
565 flush_workqueue(orion_spi_wq
);
566 platform_driver_unregister(&orion_spi_driver
);
568 destroy_workqueue(orion_spi_wq
);
570 module_exit(orion_spi_exit
);
572 MODULE_DESCRIPTION("Orion SPI driver");
573 MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
574 MODULE_LICENSE("GPL");