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net: OpenFirmware GPIO based MDIO bitbang driver
[zen-stable.git] / drivers / net / irda / au1k_ir.c
bloba1e4508717c8743bfa8f8d15c77a1383318e8884
1 /*
2 * Alchemy Semi Au1000 IrDA driver
3 *
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * ppopov@mvista.com or source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/errno.h>
25 #include <linux/netdevice.h>
26 #include <linux/slab.h>
27 #include <linux/rtnetlink.h>
28 #include <linux/interrupt.h>
29 #include <linux/pm.h>
30 #include <linux/bitops.h>
31
32 #include <asm/irq.h>
33 #include <asm/io.h>
34 #include <asm/au1000.h>
35 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100)
36 #include <asm/pb1000.h>
37 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
38 #include <asm/db1x00.h>
39 #else
40 #error au1k_ir: unsupported board
41 #endif
42
43 #include <net/irda/irda.h>
44 #include <net/irda/irmod.h>
45 #include <net/irda/wrapper.h>
46 #include <net/irda/irda_device.h>
47 #include "au1000_ircc.h"
48
49 static int au1k_irda_net_init(struct net_device *);
50 static int au1k_irda_start(struct net_device *);
51 static int au1k_irda_stop(struct net_device *dev);
52 static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *);
53 static int au1k_irda_rx(struct net_device *);
54 static void au1k_irda_interrupt(int, void *);
55 static void au1k_tx_timeout(struct net_device *);
56 static struct net_device_stats *au1k_irda_stats(struct net_device *);
57 static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int);
58 static int au1k_irda_set_speed(struct net_device *dev, int speed);
59
60 static void *dma_alloc(size_t, dma_addr_t *);
61 static void dma_free(void *, size_t);
62
63 static int qos_mtt_bits = 0x07; /* 1 ms or more */
64 static struct net_device *ir_devs[NUM_IR_IFF];
65 static char version[] __devinitdata =
66 "au1k_ircc:1.2 ppopov@mvista.com\n";
67
68 #define RUN_AT(x) (jiffies + (x))
69
70 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
71 static BCSR * const bcsr = (BCSR *)0xAE000000;
72 #endif
73
74 static DEFINE_SPINLOCK(ir_lock);
75
76 /*
77 * IrDA peripheral bug. You have to read the register
78 * twice to get the right value.
79 */
80 u32 read_ir_reg(u32 addr)
81 {
82 readl(addr);
83 return readl(addr);
84 }
85
86
87 /*
88 * Buffer allocation/deallocation routines. The buffer descriptor returned
89 * has the virtual and dma address of a buffer suitable for
90 * both, receive and transmit operations.
91 */
92 static db_dest_t *GetFreeDB(struct au1k_private *aup)
93 {
94 db_dest_t *pDB;
95 pDB = aup->pDBfree;
96
97 if (pDB) {
98 aup->pDBfree = pDB->pnext;
99 }
100 return pDB;
101 }
102
103 static void ReleaseDB(struct au1k_private *aup, db_dest_t *pDB)
104 {
105 db_dest_t *pDBfree = aup->pDBfree;
106 if (pDBfree)
107 pDBfree->pnext = pDB;
108 aup->pDBfree = pDB;
109 }
110
111
112 /*
113 DMA memory allocation, derived from pci_alloc_consistent.
114 However, the Au1000 data cache is coherent (when programmed
115 so), therefore we return KSEG0 address, not KSEG1.
116 */
117 static void *dma_alloc(size_t size, dma_addr_t * dma_handle)
118 {
119 void *ret;
120 int gfp = GFP_ATOMIC | GFP_DMA;
121
122 ret = (void *) __get_free_pages(gfp, get_order(size));
123
124 if (ret != NULL) {
125 memset(ret, 0, size);
126 *dma_handle = virt_to_bus(ret);
127 ret = (void *)KSEG0ADDR(ret);
128 }
129 return ret;
130 }
131
132
133 static void dma_free(void *vaddr, size_t size)
134 {
135 vaddr = (void *)KSEG0ADDR(vaddr);
136 free_pages((unsigned long) vaddr, get_order(size));
137 }
138
139
140 static void
141 setup_hw_rings(struct au1k_private *aup, u32 rx_base, u32 tx_base)
142 {
143 int i;
144 for (i=0; i<NUM_IR_DESC; i++) {
145 aup->rx_ring[i] = (volatile ring_dest_t *)
146 (rx_base + sizeof(ring_dest_t)*i);
147 }
148 for (i=0; i<NUM_IR_DESC; i++) {
149 aup->tx_ring[i] = (volatile ring_dest_t *)
150 (tx_base + sizeof(ring_dest_t)*i);
151 }
152 }
153
154 static int au1k_irda_init(void)
155 {
156 static unsigned version_printed = 0;
157 struct au1k_private *aup;
158 struct net_device *dev;
159 int err;
160
161 if (version_printed++ == 0) printk(version);
162
163 dev = alloc_irdadev(sizeof(struct au1k_private));
164 if (!dev)
165 return -ENOMEM;
166
167 dev->irq = AU1000_IRDA_RX_INT; /* TX has its own interrupt */
168 err = au1k_irda_net_init(dev);
169 if (err)
170 goto out;
171 err = register_netdev(dev);
172 if (err)
173 goto out1;
174 ir_devs[0] = dev;
175 printk(KERN_INFO "IrDA: Registered device %s\n", dev->name);
176 return 0;
177
178 out1:
179 aup = netdev_priv(dev);
180 dma_free((void *)aup->db[0].vaddr,
181 MAX_BUF_SIZE * 2*NUM_IR_DESC);
182 dma_free((void *)aup->rx_ring[0],
183 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
184 kfree(aup->rx_buff.head);
185 out:
186 free_netdev(dev);
187 return err;
188 }
189
190 static int au1k_irda_init_iobuf(iobuff_t *io, int size)
191 {
192 io->head = kmalloc(size, GFP_KERNEL);
193 if (io->head != NULL) {
194 io->truesize = size;
195 io->in_frame = FALSE;
196 io->state = OUTSIDE_FRAME;
197 io->data = io->head;
198 }
199 return io->head ? 0 : -ENOMEM;
200 }
201
202 static int au1k_irda_net_init(struct net_device *dev)
203 {
204 struct au1k_private *aup = netdev_priv(dev);
205 int i, retval = 0, err;
206 db_dest_t *pDB, *pDBfree;
207 dma_addr_t temp;
208
209 err = au1k_irda_init_iobuf(&aup->rx_buff, 14384);
210 if (err)
211 goto out1;
212
213 dev->open = au1k_irda_start;
214 dev->hard_start_xmit = au1k_irda_hard_xmit;
215 dev->stop = au1k_irda_stop;
216 dev->get_stats = au1k_irda_stats;
217 dev->do_ioctl = au1k_irda_ioctl;
218 dev->tx_timeout = au1k_tx_timeout;
219
220 irda_init_max_qos_capabilies(&aup->qos);
221
222 /* The only value we must override it the baudrate */
223 aup->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
224 IR_115200|IR_576000 |(IR_4000000 << 8);
225
226 aup->qos.min_turn_time.bits = qos_mtt_bits;
227 irda_qos_bits_to_value(&aup->qos);
228
229 retval = -ENOMEM;
230
231 /* Tx ring follows rx ring + 512 bytes */
232 /* we need a 1k aligned buffer */
233 aup->rx_ring[0] = (ring_dest_t *)
234 dma_alloc(2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)), &temp);
235 if (!aup->rx_ring[0])
236 goto out2;
237
238 /* allocate the data buffers */
239 aup->db[0].vaddr =
240 (void *)dma_alloc(MAX_BUF_SIZE * 2*NUM_IR_DESC, &temp);
241 if (!aup->db[0].vaddr)
242 goto out3;
243
244 setup_hw_rings(aup, (u32)aup->rx_ring[0], (u32)aup->rx_ring[0] + 512);
245
246 pDBfree = NULL;
247 pDB = aup->db;
248 for (i=0; i<(2*NUM_IR_DESC); i++) {
249 pDB->pnext = pDBfree;
250 pDBfree = pDB;
251 pDB->vaddr =
252 (u32 *)((unsigned)aup->db[0].vaddr + MAX_BUF_SIZE*i);
253 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
254 pDB++;
255 }
256 aup->pDBfree = pDBfree;
257
258 /* attach a data buffer to each descriptor */
259 for (i=0; i<NUM_IR_DESC; i++) {
260 pDB = GetFreeDB(aup);
261 if (!pDB) goto out;
262 aup->rx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
263 aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
264 aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
265 aup->rx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
266 aup->rx_db_inuse[i] = pDB;
267 }
268 for (i=0; i<NUM_IR_DESC; i++) {
269 pDB = GetFreeDB(aup);
270 if (!pDB) goto out;
271 aup->tx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
272 aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
273 aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
274 aup->tx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
275 aup->tx_ring[i]->count_0 = 0;
276 aup->tx_ring[i]->count_1 = 0;
277 aup->tx_ring[i]->flags = 0;
278 aup->tx_db_inuse[i] = pDB;
279 }
280
281 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
282 /* power on */
283 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
284 bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL;
285 au_sync();
286 #endif
287
288 return 0;
289
290 out3:
291 dma_free((void *)aup->rx_ring[0],
292 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
293 out2:
294 kfree(aup->rx_buff.head);
295 out1:
296 printk(KERN_ERR "au1k_init_module failed. Returns %d\n", retval);
297 return retval;
298 }
299
300
301 static int au1k_init(struct net_device *dev)
302 {
303 struct au1k_private *aup = netdev_priv(dev);
304 int i;
305 u32 control;
306 u32 ring_address;
307
308 /* bring the device out of reset */
309 control = 0xe; /* coherent, clock enable, one half system clock */
310
311 #ifndef CONFIG_CPU_LITTLE_ENDIAN
312 control |= 1;
313 #endif
314 aup->tx_head = 0;
315 aup->tx_tail = 0;
316 aup->rx_head = 0;
317
318 for (i=0; i<NUM_IR_DESC; i++) {
319 aup->rx_ring[i]->flags = AU_OWN;
320 }
321
322 writel(control, IR_INTERFACE_CONFIG);
323 au_sync_delay(10);
324
325 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */
326 au_sync_delay(1);
327
328 writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN);
329
330 ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]);
331 writel(ring_address >> 26, IR_RING_BASE_ADDR_H);
332 writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L);
333
334 writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE);
335
336 writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */
337 writel(0, IR_RING_ADDR_CMPR);
338
339 au1k_irda_set_speed(dev, 9600);
340 return 0;
341 }
342
343 static int au1k_irda_start(struct net_device *dev)
344 {
345 int retval;
346 char hwname[32];
347 struct au1k_private *aup = netdev_priv(dev);
348
349 if ((retval = au1k_init(dev))) {
350 printk(KERN_ERR "%s: error in au1k_init\n", dev->name);
351 return retval;
352 }
353
354 if ((retval = request_irq(AU1000_IRDA_TX_INT, &au1k_irda_interrupt,
355 0, dev->name, dev))) {
356 printk(KERN_ERR "%s: unable to get IRQ %d\n",
357 dev->name, dev->irq);
358 return retval;
359 }
360 if ((retval = request_irq(AU1000_IRDA_RX_INT, &au1k_irda_interrupt,
361 0, dev->name, dev))) {
362 free_irq(AU1000_IRDA_TX_INT, dev);
363 printk(KERN_ERR "%s: unable to get IRQ %d\n",
364 dev->name, dev->irq);
365 return retval;
366 }
367
368 /* Give self a hardware name */
369 sprintf(hwname, "Au1000 SIR/FIR");
370 aup->irlap = irlap_open(dev, &aup->qos, hwname);
371 netif_start_queue(dev);
372
373 writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */
374
375 aup->timer.expires = RUN_AT((3*HZ));
376 aup->timer.data = (unsigned long)dev;
377 return 0;
378 }
379
380 static int au1k_irda_stop(struct net_device *dev)
381 {
382 struct au1k_private *aup = netdev_priv(dev);
383
384 /* disable interrupts */
385 writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2);
386 writel(0, IR_CONFIG_1);
387 writel(0, IR_INTERFACE_CONFIG); /* disable clock */
388 au_sync();
389
390 if (aup->irlap) {
391 irlap_close(aup->irlap);
392 aup->irlap = NULL;
393 }
394
395 netif_stop_queue(dev);
396 del_timer(&aup->timer);
397
398 /* disable the interrupt */
399 free_irq(AU1000_IRDA_TX_INT, dev);
400 free_irq(AU1000_IRDA_RX_INT, dev);
401 return 0;
402 }
403
404 static void __exit au1k_irda_exit(void)
405 {
406 struct net_device *dev = ir_devs[0];
407 struct au1k_private *aup = netdev_priv(dev);
408
409 unregister_netdev(dev);
410
411 dma_free((void *)aup->db[0].vaddr,
412 MAX_BUF_SIZE * 2*NUM_IR_DESC);
413 dma_free((void *)aup->rx_ring[0],
414 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
415 kfree(aup->rx_buff.head);
416 free_netdev(dev);
417 }
418
419
420 static inline void
421 update_tx_stats(struct net_device *dev, u32 status, u32 pkt_len)
422 {
423 struct au1k_private *aup = netdev_priv(dev);
424 struct net_device_stats *ps = &aup->stats;
425
426 ps->tx_packets++;
427 ps->tx_bytes += pkt_len;
428
429 if (status & IR_TX_ERROR) {
430 ps->tx_errors++;
431 ps->tx_aborted_errors++;
432 }
433 }
434
435
436 static void au1k_tx_ack(struct net_device *dev)
437 {
438 struct au1k_private *aup = netdev_priv(dev);
439 volatile ring_dest_t *ptxd;
440
441 ptxd = aup->tx_ring[aup->tx_tail];
442 while (!(ptxd->flags & AU_OWN) && (aup->tx_tail != aup->tx_head)) {
443 update_tx_stats(dev, ptxd->flags,
444 ptxd->count_1<<8 | ptxd->count_0);
445 ptxd->count_0 = 0;
446 ptxd->count_1 = 0;
447 au_sync();
448
449 aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);
450 ptxd = aup->tx_ring[aup->tx_tail];
451
452 if (aup->tx_full) {
453 aup->tx_full = 0;
454 netif_wake_queue(dev);
455 }
456 }
457
458 if (aup->tx_tail == aup->tx_head) {
459 if (aup->newspeed) {
460 au1k_irda_set_speed(dev, aup->newspeed);
461 aup->newspeed = 0;
462 }
463 else {
464 writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE,
465 IR_CONFIG_1);
466 au_sync();
467 writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE,
468 IR_CONFIG_1);
469 writel(0, IR_RING_PROMPT);
470 au_sync();
471 }
472 }
473 }
474
475
476 /*
477 * Au1000 transmit routine.
478 */
479 static int au1k_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
480 {
481 struct au1k_private *aup = netdev_priv(dev);
482 int speed = irda_get_next_speed(skb);
483 volatile ring_dest_t *ptxd;
484 u32 len;
485
486 u32 flags;
487 db_dest_t *pDB;
488
489 if (speed != aup->speed && speed != -1) {
490 aup->newspeed = speed;
491 }
492
493 if ((skb->len == 0) && (aup->newspeed)) {
494 if (aup->tx_tail == aup->tx_head) {
495 au1k_irda_set_speed(dev, speed);
496 aup->newspeed = 0;
497 }
498 dev_kfree_skb(skb);
499 return 0;
500 }
501
502 ptxd = aup->tx_ring[aup->tx_head];
503 flags = ptxd->flags;
504
505 if (flags & AU_OWN) {
506 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
507 netif_stop_queue(dev);
508 aup->tx_full = 1;
509 return 1;
510 }
511 else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {
512 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
513 netif_stop_queue(dev);
514 aup->tx_full = 1;
515 return 1;
516 }
517
518 pDB = aup->tx_db_inuse[aup->tx_head];
519
520 #if 0
521 if (read_ir_reg(IR_RX_BYTE_CNT) != 0) {
522 printk("tx warning: rx byte cnt %x\n",
523 read_ir_reg(IR_RX_BYTE_CNT));
524 }
525 #endif
526
527 if (aup->speed == 4000000) {
528 /* FIR */
529 skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
530 ptxd->count_0 = skb->len & 0xff;
531 ptxd->count_1 = (skb->len >> 8) & 0xff;
532
533 }
534 else {
535 /* SIR */
536 len = async_wrap_skb(skb, (u8 *)pDB->vaddr, MAX_BUF_SIZE);
537 ptxd->count_0 = len & 0xff;
538 ptxd->count_1 = (len >> 8) & 0xff;
539 ptxd->flags |= IR_DIS_CRC;
540 au_writel(au_readl(0xae00000c) & ~(1<<13), 0xae00000c);
541 }
542 ptxd->flags |= AU_OWN;
543 au_sync();
544
545 writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1);
546 writel(0, IR_RING_PROMPT);
547 au_sync();
548
549 dev_kfree_skb(skb);
550 aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);
551 dev->trans_start = jiffies;
552 return 0;
553 }
554
555
556 static inline void
557 update_rx_stats(struct net_device *dev, u32 status, u32 count)
558 {
559 struct au1k_private *aup = netdev_priv(dev);
560 struct net_device_stats *ps = &aup->stats;
561
562 ps->rx_packets++;
563
564 if (status & IR_RX_ERROR) {
565 ps->rx_errors++;
566 if (status & (IR_PHY_ERROR|IR_FIFO_OVER))
567 ps->rx_missed_errors++;
568 if (status & IR_MAX_LEN)
569 ps->rx_length_errors++;
570 if (status & IR_CRC_ERROR)
571 ps->rx_crc_errors++;
572 }
573 else
574 ps->rx_bytes += count;
575 }
576
577 /*
578 * Au1000 receive routine.
579 */
580 static int au1k_irda_rx(struct net_device *dev)
581 {
582 struct au1k_private *aup = netdev_priv(dev);
583 struct sk_buff *skb;
584 volatile ring_dest_t *prxd;
585 u32 flags, count;
586 db_dest_t *pDB;
587
588 prxd = aup->rx_ring[aup->rx_head];
589 flags = prxd->flags;
590
591 while (!(flags & AU_OWN)) {
592 pDB = aup->rx_db_inuse[aup->rx_head];
593 count = prxd->count_1<<8 | prxd->count_0;
594 if (!(flags & IR_RX_ERROR)) {
595 /* good frame */
596 update_rx_stats(dev, flags, count);
597 skb=alloc_skb(count+1,GFP_ATOMIC);
598 if (skb == NULL) {
599 aup->stats.rx_dropped++;
600 continue;
601 }
602 skb_reserve(skb, 1);
603 if (aup->speed == 4000000)
604 skb_put(skb, count);
605 else
606 skb_put(skb, count-2);
607 skb_copy_to_linear_data(skb, pDB->vaddr, count - 2);
608 skb->dev = dev;
609 skb_reset_mac_header(skb);
610 skb->protocol = htons(ETH_P_IRDA);
611 netif_rx(skb);
612 prxd->count_0 = 0;
613 prxd->count_1 = 0;
614 }
615 prxd->flags |= AU_OWN;
616 aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);
617 writel(0, IR_RING_PROMPT);
618 au_sync();
619
620 /* next descriptor */
621 prxd = aup->rx_ring[aup->rx_head];
622 flags = prxd->flags;
623 dev->last_rx = jiffies;
624
625 }
626 return 0;
627 }
628
629
630 static irqreturn_t au1k_irda_interrupt(int dummy, void *dev_id)
631 {
632 struct net_device *dev = dev_id;
633
634 writel(0, IR_INT_CLEAR); /* ack irda interrupts */
635
636 au1k_irda_rx(dev);
637 au1k_tx_ack(dev);
638
639 return IRQ_HANDLED;
640 }
641
642
643 /*
644 * The Tx ring has been full longer than the watchdog timeout
645 * value. The transmitter must be hung?
646 */
647 static void au1k_tx_timeout(struct net_device *dev)
648 {
649 u32 speed;
650 struct au1k_private *aup = netdev_priv(dev);
651
652 printk(KERN_ERR "%s: tx timeout\n", dev->name);
653 speed = aup->speed;
654 aup->speed = 0;
655 au1k_irda_set_speed(dev, speed);
656 aup->tx_full = 0;
657 netif_wake_queue(dev);
658 }
659
660
661 /*
662 * Set the IrDA communications speed.
663 */
664 static int
665 au1k_irda_set_speed(struct net_device *dev, int speed)
666 {
667 unsigned long flags;
668 struct au1k_private *aup = netdev_priv(dev);
669 u32 control;
670 int ret = 0, timeout = 10, i;
671 volatile ring_dest_t *ptxd;
672 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
673 unsigned long irda_resets;
674 #endif
675
676 if (speed == aup->speed)
677 return ret;
678
679 spin_lock_irqsave(&ir_lock, flags);
680
681 /* disable PHY first */
682 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE);
683
684 /* disable RX/TX */
685 writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE),
686 IR_CONFIG_1);
687 au_sync_delay(1);
688 while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) {
689 mdelay(1);
690 if (!timeout--) {
691 printk(KERN_ERR "%s: rx/tx disable timeout\n",
692 dev->name);
693 break;
694 }
695 }
696
697 /* disable DMA */
698 writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1);
699 au_sync_delay(1);
700
701 /*
702 * After we disable tx/rx. the index pointers
703 * go back to zero.
704 */
705 aup->tx_head = aup->tx_tail = aup->rx_head = 0;
706 for (i=0; i<NUM_IR_DESC; i++) {
707 ptxd = aup->tx_ring[i];
708 ptxd->flags = 0;
709 ptxd->count_0 = 0;
710 ptxd->count_1 = 0;
711 }
712
713 for (i=0; i<NUM_IR_DESC; i++) {
714 ptxd = aup->rx_ring[i];
715 ptxd->count_0 = 0;
716 ptxd->count_1 = 0;
717 ptxd->flags = AU_OWN;
718 }
719
720 if (speed == 4000000) {
721 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
722 bcsr->resets |= BCSR_RESETS_FIR_SEL;
723 #else /* Pb1000 and Pb1100 */
724 writel(1<<13, CPLD_AUX1);
725 #endif
726 }
727 else {
728 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
729 bcsr->resets &= ~BCSR_RESETS_FIR_SEL;
730 #else /* Pb1000 and Pb1100 */
731 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
732 #endif
733 }
734
735 switch (speed) {
736 case 9600:
737 writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
738 writel(IR_SIR_MODE, IR_CONFIG_1);
739 break;
740 case 19200:
741 writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
742 writel(IR_SIR_MODE, IR_CONFIG_1);
743 break;
744 case 38400:
745 writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
746 writel(IR_SIR_MODE, IR_CONFIG_1);
747 break;
748 case 57600:
749 writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
750 writel(IR_SIR_MODE, IR_CONFIG_1);
751 break;
752 case 115200:
753 writel(12<<5, IR_WRITE_PHY_CONFIG);
754 writel(IR_SIR_MODE, IR_CONFIG_1);
755 break;
756 case 4000000:
757 writel(0xF, IR_WRITE_PHY_CONFIG);
758 writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1);
759 break;
760 default:
761 printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed);
762 ret = -EINVAL;
763 break;
764 }
765
766 aup->speed = speed;
767 writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE);
768 au_sync();
769
770 control = read_ir_reg(IR_ENABLE);
771 writel(0, IR_RING_PROMPT);
772 au_sync();
773
774 if (control & (1<<14)) {
775 printk(KERN_ERR "%s: configuration error\n", dev->name);
776 }
777 else {
778 if (control & (1<<11))
779 printk(KERN_DEBUG "%s Valid SIR config\n", dev->name);
780 if (control & (1<<12))
781 printk(KERN_DEBUG "%s Valid MIR config\n", dev->name);
782 if (control & (1<<13))
783 printk(KERN_DEBUG "%s Valid FIR config\n", dev->name);
784 if (control & (1<<10))
785 printk(KERN_DEBUG "%s TX enabled\n", dev->name);
786 if (control & (1<<9))
787 printk(KERN_DEBUG "%s RX enabled\n", dev->name);
788 }
789
790 spin_unlock_irqrestore(&ir_lock, flags);
791 return ret;
792 }
793
794 static int
795 au1k_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
796 {
797 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
798 struct au1k_private *aup = netdev_priv(dev);
799 int ret = -EOPNOTSUPP;
800
801 switch (cmd) {
802 case SIOCSBANDWIDTH:
803 if (capable(CAP_NET_ADMIN)) {
804 /*
805 * We are unable to set the speed if the
806 * device is not running.
807 */
808 if (aup->open)
809 ret = au1k_irda_set_speed(dev,
810 rq->ifr_baudrate);
811 else {
812 printk(KERN_ERR "%s ioctl: !netif_running\n",
813 dev->name);
814 ret = 0;
815 }
816 }
817 break;
818
819 case SIOCSMEDIABUSY:
820 ret = -EPERM;
821 if (capable(CAP_NET_ADMIN)) {
822 irda_device_set_media_busy(dev, TRUE);
823 ret = 0;
824 }
825 break;
826
827 case SIOCGRECEIVING:
828 rq->ifr_receiving = 0;
829 break;
830 default:
831 break;
832 }
833 return ret;
834 }
835
836
837 static struct net_device_stats *au1k_irda_stats(struct net_device *dev)
838 {
839 struct au1k_private *aup = netdev_priv(dev);
840 return &aup->stats;
841 }
842
843 MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>");
844 MODULE_DESCRIPTION("Au1000 IrDA Device Driver");
845
846 module_init(au1k_irda_init);
847 module_exit(au1k_irda_exit);