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net: OpenFirmware GPIO based MDIO bitbang driver
[zen-stable.git] / drivers / ssb / main.c
blob7cf8851286b54a7592412510a0130dc86e626bfe
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/cs.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
25
26
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
29
30
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue);
33 /* List if running buses */
34 static LIST_HEAD(buses);
35 /* Software ID counter */
36 static unsigned int next_busnumber;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex);
40
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot = 1;
48
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
51
52
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
55 {
56 struct ssb_bus *bus;
57
58 ssb_buses_lock();
59 list_for_each_entry(bus, &buses, list) {
60 if (bus->bustype == SSB_BUSTYPE_PCI &&
61 bus->host_pci == pdev)
62 goto found;
63 }
64 bus = NULL;
65 found:
66 ssb_buses_unlock();
67
68 return bus;
69 }
70 #endif /* CONFIG_SSB_PCIHOST */
71
72 #ifdef CONFIG_SSB_PCMCIAHOST
73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
74 {
75 struct ssb_bus *bus;
76
77 ssb_buses_lock();
78 list_for_each_entry(bus, &buses, list) {
79 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
80 bus->host_pcmcia == pdev)
81 goto found;
82 }
83 bus = NULL;
84 found:
85 ssb_buses_unlock();
86
87 return bus;
88 }
89 #endif /* CONFIG_SSB_PCMCIAHOST */
90
91 int ssb_for_each_bus_call(unsigned long data,
92 int (*func)(struct ssb_bus *bus, unsigned long data))
93 {
94 struct ssb_bus *bus;
95 int res;
96
97 ssb_buses_lock();
98 list_for_each_entry(bus, &buses, list) {
99 res = func(bus, data);
100 if (res >= 0) {
101 ssb_buses_unlock();
102 return res;
103 }
104 }
105 ssb_buses_unlock();
106
107 return -ENODEV;
108 }
109
110 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
111 {
112 if (dev)
113 get_device(dev->dev);
114 return dev;
115 }
116
117 static void ssb_device_put(struct ssb_device *dev)
118 {
119 if (dev)
120 put_device(dev->dev);
121 }
122
123 static int ssb_device_resume(struct device *dev)
124 {
125 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
126 struct ssb_driver *ssb_drv;
127 int err = 0;
128
129 if (dev->driver) {
130 ssb_drv = drv_to_ssb_drv(dev->driver);
131 if (ssb_drv && ssb_drv->resume)
132 err = ssb_drv->resume(ssb_dev);
133 if (err)
134 goto out;
135 }
136 out:
137 return err;
138 }
139
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
141 {
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
144 int err = 0;
145
146 if (dev->driver) {
147 ssb_drv = drv_to_ssb_drv(dev->driver);
148 if (ssb_drv && ssb_drv->suspend)
149 err = ssb_drv->suspend(ssb_dev, state);
150 if (err)
151 goto out;
152 }
153 out:
154 return err;
155 }
156
157 int ssb_bus_resume(struct ssb_bus *bus)
158 {
159 int err;
160
161 /* Reset HW state information in memory, so that HW is
162 * completely reinitialized. */
163 bus->mapped_device = NULL;
164 #ifdef CONFIG_SSB_DRIVER_PCICORE
165 bus->pcicore.setup_done = 0;
166 #endif
167
168 err = ssb_bus_powerup(bus, 0);
169 if (err)
170 return err;
171 err = ssb_pcmcia_hardware_setup(bus);
172 if (err) {
173 ssb_bus_may_powerdown(bus);
174 return err;
175 }
176 ssb_chipco_resume(&bus->chipco);
177 ssb_bus_may_powerdown(bus);
178
179 return 0;
180 }
181 EXPORT_SYMBOL(ssb_bus_resume);
182
183 int ssb_bus_suspend(struct ssb_bus *bus)
184 {
185 ssb_chipco_suspend(&bus->chipco);
186 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
187
188 return 0;
189 }
190 EXPORT_SYMBOL(ssb_bus_suspend);
191
192 #ifdef CONFIG_SSB_SPROM
193 int ssb_devices_freeze(struct ssb_bus *bus)
194 {
195 struct ssb_device *dev;
196 struct ssb_driver *drv;
197 int err = 0;
198 int i;
199 pm_message_t state = PMSG_FREEZE;
200
201 /* First check that we are capable to freeze all devices. */
202 for (i = 0; i < bus->nr_devices; i++) {
203 dev = &(bus->devices[i]);
204 if (!dev->dev ||
205 !dev->dev->driver ||
206 !device_is_registered(dev->dev))
207 continue;
208 drv = drv_to_ssb_drv(dev->dev->driver);
209 if (!drv)
210 continue;
211 if (!drv->suspend) {
212 /* Nope, can't suspend this one. */
213 return -EOPNOTSUPP;
214 }
215 }
216 /* Now suspend all devices */
217 for (i = 0; i < bus->nr_devices; i++) {
218 dev = &(bus->devices[i]);
219 if (!dev->dev ||
220 !dev->dev->driver ||
221 !device_is_registered(dev->dev))
222 continue;
223 drv = drv_to_ssb_drv(dev->dev->driver);
224 if (!drv)
225 continue;
226 err = drv->suspend(dev, state);
227 if (err) {
228 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
229 dev->dev->bus_id);
230 goto err_unwind;
231 }
232 }
233
234 return 0;
235 err_unwind:
236 for (i--; i >= 0; i--) {
237 dev = &(bus->devices[i]);
238 if (!dev->dev ||
239 !dev->dev->driver ||
240 !device_is_registered(dev->dev))
241 continue;
242 drv = drv_to_ssb_drv(dev->dev->driver);
243 if (!drv)
244 continue;
245 if (drv->resume)
246 drv->resume(dev);
247 }
248 return err;
249 }
250
251 int ssb_devices_thaw(struct ssb_bus *bus)
252 {
253 struct ssb_device *dev;
254 struct ssb_driver *drv;
255 int err;
256 int i;
257
258 for (i = 0; i < bus->nr_devices; i++) {
259 dev = &(bus->devices[i]);
260 if (!dev->dev ||
261 !dev->dev->driver ||
262 !device_is_registered(dev->dev))
263 continue;
264 drv = drv_to_ssb_drv(dev->dev->driver);
265 if (!drv)
266 continue;
267 if (SSB_WARN_ON(!drv->resume))
268 continue;
269 err = drv->resume(dev);
270 if (err) {
271 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
272 dev->dev->bus_id);
273 }
274 }
275
276 return 0;
277 }
278 #endif /* CONFIG_SSB_SPROM */
279
280 static void ssb_device_shutdown(struct device *dev)
281 {
282 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
283 struct ssb_driver *ssb_drv;
284
285 if (!dev->driver)
286 return;
287 ssb_drv = drv_to_ssb_drv(dev->driver);
288 if (ssb_drv && ssb_drv->shutdown)
289 ssb_drv->shutdown(ssb_dev);
290 }
291
292 static int ssb_device_remove(struct device *dev)
293 {
294 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
295 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
296
297 if (ssb_drv && ssb_drv->remove)
298 ssb_drv->remove(ssb_dev);
299 ssb_device_put(ssb_dev);
300
301 return 0;
302 }
303
304 static int ssb_device_probe(struct device *dev)
305 {
306 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
307 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
308 int err = 0;
309
310 ssb_device_get(ssb_dev);
311 if (ssb_drv && ssb_drv->probe)
312 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
313 if (err)
314 ssb_device_put(ssb_dev);
315
316 return err;
317 }
318
319 static int ssb_match_devid(const struct ssb_device_id *tabid,
320 const struct ssb_device_id *devid)
321 {
322 if ((tabid->vendor != devid->vendor) &&
323 tabid->vendor != SSB_ANY_VENDOR)
324 return 0;
325 if ((tabid->coreid != devid->coreid) &&
326 tabid->coreid != SSB_ANY_ID)
327 return 0;
328 if ((tabid->revision != devid->revision) &&
329 tabid->revision != SSB_ANY_REV)
330 return 0;
331 return 1;
332 }
333
334 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
335 {
336 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
337 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
338 const struct ssb_device_id *id;
339
340 for (id = ssb_drv->id_table;
341 id->vendor || id->coreid || id->revision;
342 id++) {
343 if (ssb_match_devid(id, &ssb_dev->id))
344 return 1; /* found */
345 }
346
347 return 0;
348 }
349
350 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
351 {
352 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
353
354 if (!dev)
355 return -ENODEV;
356
357 return add_uevent_var(env,
358 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
359 ssb_dev->id.vendor, ssb_dev->id.coreid,
360 ssb_dev->id.revision);
361 }
362
363 static struct bus_type ssb_bustype = {
364 .name = "ssb",
365 .match = ssb_bus_match,
366 .probe = ssb_device_probe,
367 .remove = ssb_device_remove,
368 .shutdown = ssb_device_shutdown,
369 .suspend = ssb_device_suspend,
370 .resume = ssb_device_resume,
371 .uevent = ssb_device_uevent,
372 };
373
374 static void ssb_buses_lock(void)
375 {
376 /* See the comment at the ssb_is_early_boot definition */
377 if (!ssb_is_early_boot)
378 mutex_lock(&buses_mutex);
379 }
380
381 static void ssb_buses_unlock(void)
382 {
383 /* See the comment at the ssb_is_early_boot definition */
384 if (!ssb_is_early_boot)
385 mutex_unlock(&buses_mutex);
386 }
387
388 static void ssb_devices_unregister(struct ssb_bus *bus)
389 {
390 struct ssb_device *sdev;
391 int i;
392
393 for (i = bus->nr_devices - 1; i >= 0; i--) {
394 sdev = &(bus->devices[i]);
395 if (sdev->dev)
396 device_unregister(sdev->dev);
397 }
398 }
399
400 void ssb_bus_unregister(struct ssb_bus *bus)
401 {
402 ssb_buses_lock();
403 ssb_devices_unregister(bus);
404 list_del(&bus->list);
405 ssb_buses_unlock();
406
407 ssb_pcmcia_exit(bus);
408 ssb_pci_exit(bus);
409 ssb_iounmap(bus);
410 }
411 EXPORT_SYMBOL(ssb_bus_unregister);
412
413 static void ssb_release_dev(struct device *dev)
414 {
415 struct __ssb_dev_wrapper *devwrap;
416
417 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
418 kfree(devwrap);
419 }
420
421 static int ssb_devices_register(struct ssb_bus *bus)
422 {
423 struct ssb_device *sdev;
424 struct device *dev;
425 struct __ssb_dev_wrapper *devwrap;
426 int i, err = 0;
427 int dev_idx = 0;
428
429 for (i = 0; i < bus->nr_devices; i++) {
430 sdev = &(bus->devices[i]);
431
432 /* We don't register SSB-system devices to the kernel,
433 * as the drivers for them are built into SSB. */
434 switch (sdev->id.coreid) {
435 case SSB_DEV_CHIPCOMMON:
436 case SSB_DEV_PCI:
437 case SSB_DEV_PCIE:
438 case SSB_DEV_PCMCIA:
439 case SSB_DEV_MIPS:
440 case SSB_DEV_MIPS_3302:
441 case SSB_DEV_EXTIF:
442 continue;
443 }
444
445 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
446 if (!devwrap) {
447 ssb_printk(KERN_ERR PFX
448 "Could not allocate device\n");
449 err = -ENOMEM;
450 goto error;
451 }
452 dev = &devwrap->dev;
453 devwrap->sdev = sdev;
454
455 dev->release = ssb_release_dev;
456 dev->bus = &ssb_bustype;
457 snprintf(dev->bus_id, sizeof(dev->bus_id),
458 "ssb%u:%d", bus->busnumber, dev_idx);
459
460 switch (bus->bustype) {
461 case SSB_BUSTYPE_PCI:
462 #ifdef CONFIG_SSB_PCIHOST
463 sdev->irq = bus->host_pci->irq;
464 dev->parent = &bus->host_pci->dev;
465 sdev->dma_dev = &bus->host_pci->dev;
466 #endif
467 break;
468 case SSB_BUSTYPE_PCMCIA:
469 #ifdef CONFIG_SSB_PCMCIAHOST
470 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
471 dev->parent = &bus->host_pcmcia->dev;
472 sdev->dma_dev = &bus->host_pcmcia->dev;
473 #endif
474 break;
475 case SSB_BUSTYPE_SSB:
476 sdev->dma_dev = dev;
477 break;
478 }
479
480 sdev->dev = dev;
481 err = device_register(dev);
482 if (err) {
483 ssb_printk(KERN_ERR PFX
484 "Could not register %s\n",
485 dev->bus_id);
486 /* Set dev to NULL to not unregister
487 * dev on error unwinding. */
488 sdev->dev = NULL;
489 kfree(devwrap);
490 goto error;
491 }
492 dev_idx++;
493 }
494
495 return 0;
496 error:
497 /* Unwind the already registered devices. */
498 ssb_devices_unregister(bus);
499 return err;
500 }
501
502 /* Needs ssb_buses_lock() */
503 static int ssb_attach_queued_buses(void)
504 {
505 struct ssb_bus *bus, *n;
506 int err = 0;
507 int drop_them_all = 0;
508
509 list_for_each_entry_safe(bus, n, &attach_queue, list) {
510 if (drop_them_all) {
511 list_del(&bus->list);
512 continue;
513 }
514 /* Can't init the PCIcore in ssb_bus_register(), as that
515 * is too early in boot for embedded systems
516 * (no udelay() available). So do it here in attach stage.
517 */
518 err = ssb_bus_powerup(bus, 0);
519 if (err)
520 goto error;
521 ssb_pcicore_init(&bus->pcicore);
522 ssb_bus_may_powerdown(bus);
523
524 err = ssb_devices_register(bus);
525 error:
526 if (err) {
527 drop_them_all = 1;
528 list_del(&bus->list);
529 continue;
530 }
531 list_move_tail(&bus->list, &buses);
532 }
533
534 return err;
535 }
536
537 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
538 {
539 struct ssb_bus *bus = dev->bus;
540
541 offset += dev->core_index * SSB_CORE_SIZE;
542 return readb(bus->mmio + offset);
543 }
544
545 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
546 {
547 struct ssb_bus *bus = dev->bus;
548
549 offset += dev->core_index * SSB_CORE_SIZE;
550 return readw(bus->mmio + offset);
551 }
552
553 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
554 {
555 struct ssb_bus *bus = dev->bus;
556
557 offset += dev->core_index * SSB_CORE_SIZE;
558 return readl(bus->mmio + offset);
559 }
560
561 #ifdef CONFIG_SSB_BLOCKIO
562 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
563 size_t count, u16 offset, u8 reg_width)
564 {
565 struct ssb_bus *bus = dev->bus;
566 void __iomem *addr;
567
568 offset += dev->core_index * SSB_CORE_SIZE;
569 addr = bus->mmio + offset;
570
571 switch (reg_width) {
572 case sizeof(u8): {
573 u8 *buf = buffer;
574
575 while (count) {
576 *buf = __raw_readb(addr);
577 buf++;
578 count--;
579 }
580 break;
581 }
582 case sizeof(u16): {
583 __le16 *buf = buffer;
584
585 SSB_WARN_ON(count & 1);
586 while (count) {
587 *buf = (__force __le16)__raw_readw(addr);
588 buf++;
589 count -= 2;
590 }
591 break;
592 }
593 case sizeof(u32): {
594 __le32 *buf = buffer;
595
596 SSB_WARN_ON(count & 3);
597 while (count) {
598 *buf = (__force __le32)__raw_readl(addr);
599 buf++;
600 count -= 4;
601 }
602 break;
603 }
604 default:
605 SSB_WARN_ON(1);
606 }
607 }
608 #endif /* CONFIG_SSB_BLOCKIO */
609
610 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
611 {
612 struct ssb_bus *bus = dev->bus;
613
614 offset += dev->core_index * SSB_CORE_SIZE;
615 writeb(value, bus->mmio + offset);
616 }
617
618 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
619 {
620 struct ssb_bus *bus = dev->bus;
621
622 offset += dev->core_index * SSB_CORE_SIZE;
623 writew(value, bus->mmio + offset);
624 }
625
626 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
627 {
628 struct ssb_bus *bus = dev->bus;
629
630 offset += dev->core_index * SSB_CORE_SIZE;
631 writel(value, bus->mmio + offset);
632 }
633
634 #ifdef CONFIG_SSB_BLOCKIO
635 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
636 size_t count, u16 offset, u8 reg_width)
637 {
638 struct ssb_bus *bus = dev->bus;
639 void __iomem *addr;
640
641 offset += dev->core_index * SSB_CORE_SIZE;
642 addr = bus->mmio + offset;
643
644 switch (reg_width) {
645 case sizeof(u8): {
646 const u8 *buf = buffer;
647
648 while (count) {
649 __raw_writeb(*buf, addr);
650 buf++;
651 count--;
652 }
653 break;
654 }
655 case sizeof(u16): {
656 const __le16 *buf = buffer;
657
658 SSB_WARN_ON(count & 1);
659 while (count) {
660 __raw_writew((__force u16)(*buf), addr);
661 buf++;
662 count -= 2;
663 }
664 break;
665 }
666 case sizeof(u32): {
667 const __le32 *buf = buffer;
668
669 SSB_WARN_ON(count & 3);
670 while (count) {
671 __raw_writel((__force u32)(*buf), addr);
672 buf++;
673 count -= 4;
674 }
675 break;
676 }
677 default:
678 SSB_WARN_ON(1);
679 }
680 }
681 #endif /* CONFIG_SSB_BLOCKIO */
682
683 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
684 static const struct ssb_bus_ops ssb_ssb_ops = {
685 .read8 = ssb_ssb_read8,
686 .read16 = ssb_ssb_read16,
687 .read32 = ssb_ssb_read32,
688 .write8 = ssb_ssb_write8,
689 .write16 = ssb_ssb_write16,
690 .write32 = ssb_ssb_write32,
691 #ifdef CONFIG_SSB_BLOCKIO
692 .block_read = ssb_ssb_block_read,
693 .block_write = ssb_ssb_block_write,
694 #endif
695 };
696
697 static int ssb_fetch_invariants(struct ssb_bus *bus,
698 ssb_invariants_func_t get_invariants)
699 {
700 struct ssb_init_invariants iv;
701 int err;
702
703 memset(&iv, 0, sizeof(iv));
704 err = get_invariants(bus, &iv);
705 if (err)
706 goto out;
707 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
708 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
709 bus->has_cardbus_slot = iv.has_cardbus_slot;
710 out:
711 return err;
712 }
713
714 static int ssb_bus_register(struct ssb_bus *bus,
715 ssb_invariants_func_t get_invariants,
716 unsigned long baseaddr)
717 {
718 int err;
719
720 spin_lock_init(&bus->bar_lock);
721 INIT_LIST_HEAD(&bus->list);
722 #ifdef CONFIG_SSB_EMBEDDED
723 spin_lock_init(&bus->gpio_lock);
724 #endif
725
726 /* Powerup the bus */
727 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
728 if (err)
729 goto out;
730 ssb_buses_lock();
731 bus->busnumber = next_busnumber;
732 /* Scan for devices (cores) */
733 err = ssb_bus_scan(bus, baseaddr);
734 if (err)
735 goto err_disable_xtal;
736
737 /* Init PCI-host device (if any) */
738 err = ssb_pci_init(bus);
739 if (err)
740 goto err_unmap;
741 /* Init PCMCIA-host device (if any) */
742 err = ssb_pcmcia_init(bus);
743 if (err)
744 goto err_pci_exit;
745
746 /* Initialize basic system devices (if available) */
747 err = ssb_bus_powerup(bus, 0);
748 if (err)
749 goto err_pcmcia_exit;
750 ssb_chipcommon_init(&bus->chipco);
751 ssb_mipscore_init(&bus->mipscore);
752 err = ssb_fetch_invariants(bus, get_invariants);
753 if (err) {
754 ssb_bus_may_powerdown(bus);
755 goto err_pcmcia_exit;
756 }
757 ssb_bus_may_powerdown(bus);
758
759 /* Queue it for attach.
760 * See the comment at the ssb_is_early_boot definition. */
761 list_add_tail(&bus->list, &attach_queue);
762 if (!ssb_is_early_boot) {
763 /* This is not early boot, so we must attach the bus now */
764 err = ssb_attach_queued_buses();
765 if (err)
766 goto err_dequeue;
767 }
768 next_busnumber++;
769 ssb_buses_unlock();
770
771 out:
772 return err;
773
774 err_dequeue:
775 list_del(&bus->list);
776 err_pcmcia_exit:
777 ssb_pcmcia_exit(bus);
778 err_pci_exit:
779 ssb_pci_exit(bus);
780 err_unmap:
781 ssb_iounmap(bus);
782 err_disable_xtal:
783 ssb_buses_unlock();
784 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
785 return err;
786 }
787
788 #ifdef CONFIG_SSB_PCIHOST
789 int ssb_bus_pcibus_register(struct ssb_bus *bus,
790 struct pci_dev *host_pci)
791 {
792 int err;
793
794 bus->bustype = SSB_BUSTYPE_PCI;
795 bus->host_pci = host_pci;
796 bus->ops = &ssb_pci_ops;
797
798 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
799 if (!err) {
800 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
801 "PCI device %s\n", host_pci->dev.bus_id);
802 }
803
804 return err;
805 }
806 EXPORT_SYMBOL(ssb_bus_pcibus_register);
807 #endif /* CONFIG_SSB_PCIHOST */
808
809 #ifdef CONFIG_SSB_PCMCIAHOST
810 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
811 struct pcmcia_device *pcmcia_dev,
812 unsigned long baseaddr)
813 {
814 int err;
815
816 bus->bustype = SSB_BUSTYPE_PCMCIA;
817 bus->host_pcmcia = pcmcia_dev;
818 bus->ops = &ssb_pcmcia_ops;
819
820 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
821 if (!err) {
822 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
823 "PCMCIA device %s\n", pcmcia_dev->devname);
824 }
825
826 return err;
827 }
828 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
829 #endif /* CONFIG_SSB_PCMCIAHOST */
830
831 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
832 unsigned long baseaddr,
833 ssb_invariants_func_t get_invariants)
834 {
835 int err;
836
837 bus->bustype = SSB_BUSTYPE_SSB;
838 bus->ops = &ssb_ssb_ops;
839
840 err = ssb_bus_register(bus, get_invariants, baseaddr);
841 if (!err) {
842 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
843 "address 0x%08lX\n", baseaddr);
844 }
845
846 return err;
847 }
848
849 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
850 {
851 drv->drv.name = drv->name;
852 drv->drv.bus = &ssb_bustype;
853 drv->drv.owner = owner;
854
855 return driver_register(&drv->drv);
856 }
857 EXPORT_SYMBOL(__ssb_driver_register);
858
859 void ssb_driver_unregister(struct ssb_driver *drv)
860 {
861 driver_unregister(&drv->drv);
862 }
863 EXPORT_SYMBOL(ssb_driver_unregister);
864
865 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
866 {
867 struct ssb_bus *bus = dev->bus;
868 struct ssb_device *ent;
869 int i;
870
871 for (i = 0; i < bus->nr_devices; i++) {
872 ent = &(bus->devices[i]);
873 if (ent->id.vendor != dev->id.vendor)
874 continue;
875 if (ent->id.coreid != dev->id.coreid)
876 continue;
877
878 ent->devtypedata = data;
879 }
880 }
881 EXPORT_SYMBOL(ssb_set_devtypedata);
882
883 static u32 clkfactor_f6_resolve(u32 v)
884 {
885 /* map the magic values */
886 switch (v) {
887 case SSB_CHIPCO_CLK_F6_2:
888 return 2;
889 case SSB_CHIPCO_CLK_F6_3:
890 return 3;
891 case SSB_CHIPCO_CLK_F6_4:
892 return 4;
893 case SSB_CHIPCO_CLK_F6_5:
894 return 5;
895 case SSB_CHIPCO_CLK_F6_6:
896 return 6;
897 case SSB_CHIPCO_CLK_F6_7:
898 return 7;
899 }
900 return 0;
901 }
902
903 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
904 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
905 {
906 u32 n1, n2, clock, m1, m2, m3, mc;
907
908 n1 = (n & SSB_CHIPCO_CLK_N1);
909 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
910
911 switch (plltype) {
912 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
913 if (m & SSB_CHIPCO_CLK_T6_MMASK)
914 return SSB_CHIPCO_CLK_T6_M0;
915 return SSB_CHIPCO_CLK_T6_M1;
916 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
917 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
918 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
919 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
920 n1 = clkfactor_f6_resolve(n1);
921 n2 += SSB_CHIPCO_CLK_F5_BIAS;
922 break;
923 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
924 n1 += SSB_CHIPCO_CLK_T2_BIAS;
925 n2 += SSB_CHIPCO_CLK_T2_BIAS;
926 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
927 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
928 break;
929 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
930 return 100000000;
931 default:
932 SSB_WARN_ON(1);
933 }
934
935 switch (plltype) {
936 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
937 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
938 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
939 break;
940 default:
941 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
942 }
943 if (!clock)
944 return 0;
945
946 m1 = (m & SSB_CHIPCO_CLK_M1);
947 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
948 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
949 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
950
951 switch (plltype) {
952 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
953 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
954 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
955 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
956 m1 = clkfactor_f6_resolve(m1);
957 if ((plltype == SSB_PLLTYPE_1) ||
958 (plltype == SSB_PLLTYPE_3))
959 m2 += SSB_CHIPCO_CLK_F5_BIAS;
960 else
961 m2 = clkfactor_f6_resolve(m2);
962 m3 = clkfactor_f6_resolve(m3);
963
964 switch (mc) {
965 case SSB_CHIPCO_CLK_MC_BYPASS:
966 return clock;
967 case SSB_CHIPCO_CLK_MC_M1:
968 return (clock / m1);
969 case SSB_CHIPCO_CLK_MC_M1M2:
970 return (clock / (m1 * m2));
971 case SSB_CHIPCO_CLK_MC_M1M2M3:
972 return (clock / (m1 * m2 * m3));
973 case SSB_CHIPCO_CLK_MC_M1M3:
974 return (clock / (m1 * m3));
975 }
976 return 0;
977 case SSB_PLLTYPE_2:
978 m1 += SSB_CHIPCO_CLK_T2_BIAS;
979 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
980 m3 += SSB_CHIPCO_CLK_T2_BIAS;
981 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
982 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
983 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
984
985 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
986 clock /= m1;
987 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
988 clock /= m2;
989 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
990 clock /= m3;
991 return clock;
992 default:
993 SSB_WARN_ON(1);
994 }
995 return 0;
996 }
997
998 /* Get the current speed the backplane is running at */
999 u32 ssb_clockspeed(struct ssb_bus *bus)
1000 {
1001 u32 rate;
1002 u32 plltype;
1003 u32 clkctl_n, clkctl_m;
1004
1005 if (ssb_extif_available(&bus->extif))
1006 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1007 &clkctl_n, &clkctl_m);
1008 else if (bus->chipco.dev)
1009 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1010 &clkctl_n, &clkctl_m);
1011 else
1012 return 0;
1013
1014 if (bus->chip_id == 0x5365) {
1015 rate = 100000000;
1016 } else {
1017 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1018 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1019 rate /= 2;
1020 }
1021
1022 return rate;
1023 }
1024 EXPORT_SYMBOL(ssb_clockspeed);
1025
1026 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1027 {
1028 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1029
1030 /* The REJECT bit changed position in TMSLOW between
1031 * Backplane revisions. */
1032 switch (rev) {
1033 case SSB_IDLOW_SSBREV_22:
1034 return SSB_TMSLOW_REJECT_22;
1035 case SSB_IDLOW_SSBREV_23:
1036 return SSB_TMSLOW_REJECT_23;
1037 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
1038 case SSB_IDLOW_SSBREV_25: /* same here */
1039 case SSB_IDLOW_SSBREV_26: /* same here */
1040 case SSB_IDLOW_SSBREV_27: /* same here */
1041 return SSB_TMSLOW_REJECT_23; /* this is a guess */
1042 default:
1043 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1044 WARN_ON(1);
1045 }
1046 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1047 }
1048
1049 int ssb_device_is_enabled(struct ssb_device *dev)
1050 {
1051 u32 val;
1052 u32 reject;
1053
1054 reject = ssb_tmslow_reject_bitmask(dev);
1055 val = ssb_read32(dev, SSB_TMSLOW);
1056 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1057
1058 return (val == SSB_TMSLOW_CLOCK);
1059 }
1060 EXPORT_SYMBOL(ssb_device_is_enabled);
1061
1062 static void ssb_flush_tmslow(struct ssb_device *dev)
1063 {
1064 /* Make _really_ sure the device has finished the TMSLOW
1065 * register write transaction, as we risk running into
1066 * a machine check exception otherwise.
1067 * Do this by reading the register back to commit the
1068 * PCI write and delay an additional usec for the device
1069 * to react to the change. */
1070 ssb_read32(dev, SSB_TMSLOW);
1071 udelay(1);
1072 }
1073
1074 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1075 {
1076 u32 val;
1077
1078 ssb_device_disable(dev, core_specific_flags);
1079 ssb_write32(dev, SSB_TMSLOW,
1080 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1081 SSB_TMSLOW_FGC | core_specific_flags);
1082 ssb_flush_tmslow(dev);
1083
1084 /* Clear SERR if set. This is a hw bug workaround. */
1085 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1086 ssb_write32(dev, SSB_TMSHIGH, 0);
1087
1088 val = ssb_read32(dev, SSB_IMSTATE);
1089 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1090 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1091 ssb_write32(dev, SSB_IMSTATE, val);
1092 }
1093
1094 ssb_write32(dev, SSB_TMSLOW,
1095 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1096 core_specific_flags);
1097 ssb_flush_tmslow(dev);
1098
1099 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1100 core_specific_flags);
1101 ssb_flush_tmslow(dev);
1102 }
1103 EXPORT_SYMBOL(ssb_device_enable);
1104
1105 /* Wait for a bit in a register to get set or unset.
1106 * timeout is in units of ten-microseconds */
1107 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1108 int timeout, int set)
1109 {
1110 int i;
1111 u32 val;
1112
1113 for (i = 0; i < timeout; i++) {
1114 val = ssb_read32(dev, reg);
1115 if (set) {
1116 if (val & bitmask)
1117 return 0;
1118 } else {
1119 if (!(val & bitmask))
1120 return 0;
1121 }
1122 udelay(10);
1123 }
1124 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1125 "register %04X to %s.\n",
1126 bitmask, reg, (set ? "set" : "clear"));
1127
1128 return -ETIMEDOUT;
1129 }
1130
1131 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1132 {
1133 u32 reject;
1134
1135 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1136 return;
1137
1138 reject = ssb_tmslow_reject_bitmask(dev);
1139 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1140 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1141 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1142 ssb_write32(dev, SSB_TMSLOW,
1143 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1144 reject | SSB_TMSLOW_RESET |
1145 core_specific_flags);
1146 ssb_flush_tmslow(dev);
1147
1148 ssb_write32(dev, SSB_TMSLOW,
1149 reject | SSB_TMSLOW_RESET |
1150 core_specific_flags);
1151 ssb_flush_tmslow(dev);
1152 }
1153 EXPORT_SYMBOL(ssb_device_disable);
1154
1155 u32 ssb_dma_translation(struct ssb_device *dev)
1156 {
1157 switch (dev->bus->bustype) {
1158 case SSB_BUSTYPE_SSB:
1159 case SSB_BUSTYPE_PCMCIA:
1160 return 0;
1161 case SSB_BUSTYPE_PCI:
1162 return SSB_PCI_DMA;
1163 }
1164 return 0;
1165 }
1166 EXPORT_SYMBOL(ssb_dma_translation);
1167
1168 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1169 {
1170 struct device *dma_dev = ssb_dev->dma_dev;
1171
1172 #ifdef CONFIG_SSB_PCIHOST
1173 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI)
1174 return dma_set_mask(dma_dev, mask);
1175 #endif
1176 dma_dev->coherent_dma_mask = mask;
1177 dma_dev->dma_mask = &dma_dev->coherent_dma_mask;
1178
1179 return 0;
1180 }
1181 EXPORT_SYMBOL(ssb_dma_set_mask);
1182
1183 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1184 {
1185 struct ssb_chipcommon *cc;
1186 int err = 0;
1187
1188 /* On buses where more than one core may be working
1189 * at a time, we must not powerdown stuff if there are
1190 * still cores that may want to run. */
1191 if (bus->bustype == SSB_BUSTYPE_SSB)
1192 goto out;
1193
1194 cc = &bus->chipco;
1195
1196 if (!cc->dev)
1197 goto out;
1198 if (cc->dev->id.revision < 5)
1199 goto out;
1200
1201 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1202 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1203 if (err)
1204 goto error;
1205 out:
1206 #ifdef CONFIG_SSB_DEBUG
1207 bus->powered_up = 0;
1208 #endif
1209 return err;
1210 error:
1211 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1212 goto out;
1213 }
1214 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1215
1216 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1217 {
1218 struct ssb_chipcommon *cc;
1219 int err;
1220 enum ssb_clkmode mode;
1221
1222 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1223 if (err)
1224 goto error;
1225 cc = &bus->chipco;
1226 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1227 ssb_chipco_set_clockmode(cc, mode);
1228
1229 #ifdef CONFIG_SSB_DEBUG
1230 bus->powered_up = 1;
1231 #endif
1232 return 0;
1233 error:
1234 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1235 return err;
1236 }
1237 EXPORT_SYMBOL(ssb_bus_powerup);
1238
1239 u32 ssb_admatch_base(u32 adm)
1240 {
1241 u32 base = 0;
1242
1243 switch (adm & SSB_ADM_TYPE) {
1244 case SSB_ADM_TYPE0:
1245 base = (adm & SSB_ADM_BASE0);
1246 break;
1247 case SSB_ADM_TYPE1:
1248 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1249 base = (adm & SSB_ADM_BASE1);
1250 break;
1251 case SSB_ADM_TYPE2:
1252 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1253 base = (adm & SSB_ADM_BASE2);
1254 break;
1255 default:
1256 SSB_WARN_ON(1);
1257 }
1258
1259 return base;
1260 }
1261 EXPORT_SYMBOL(ssb_admatch_base);
1262
1263 u32 ssb_admatch_size(u32 adm)
1264 {
1265 u32 size = 0;
1266
1267 switch (adm & SSB_ADM_TYPE) {
1268 case SSB_ADM_TYPE0:
1269 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1270 break;
1271 case SSB_ADM_TYPE1:
1272 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1273 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1274 break;
1275 case SSB_ADM_TYPE2:
1276 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1277 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1278 break;
1279 default:
1280 SSB_WARN_ON(1);
1281 }
1282 size = (1 << (size + 1));
1283
1284 return size;
1285 }
1286 EXPORT_SYMBOL(ssb_admatch_size);
1287
1288 static int __init ssb_modinit(void)
1289 {
1290 int err;
1291
1292 /* See the comment at the ssb_is_early_boot definition */
1293 ssb_is_early_boot = 0;
1294 err = bus_register(&ssb_bustype);
1295 if (err)
1296 return err;
1297
1298 /* Maybe we already registered some buses at early boot.
1299 * Check for this and attach them
1300 */
1301 ssb_buses_lock();
1302 err = ssb_attach_queued_buses();
1303 ssb_buses_unlock();
1304 if (err)
1305 bus_unregister(&ssb_bustype);
1306
1307 err = b43_pci_ssb_bridge_init();
1308 if (err) {
1309 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1310 "initialization failed\n");
1311 /* don't fail SSB init because of this */
1312 err = 0;
1313 }
1314 err = ssb_gige_init();
1315 if (err) {
1316 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1317 "driver initialization failed\n");
1318 /* don't fail SSB init because of this */
1319 err = 0;
1320 }
1321
1322 return err;
1323 }
1324 /* ssb must be initialized after PCI but before the ssb drivers.
1325 * That means we must use some initcall between subsys_initcall
1326 * and device_initcall. */
1327 fs_initcall(ssb_modinit);
1328
1329 static void __exit ssb_modexit(void)
1330 {
1331 ssb_gige_exit();
1332 b43_pci_ssb_bridge_exit();
1333 bus_unregister(&ssb_bustype);
1334 }
1335 module_exit(ssb_modexit)