sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / media / video / cx18 / cx18-i2c.c
blob040aaa87579ddf0c21f4a9d786a8d636ac5ebfe0
1 /*
2 * cx18 I2C functions
4 * Derived from ivtv-i2c.c
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-cards.h"
28 #include "cx18-gpio.h"
29 #include "cx18-i2c.h"
30 #include "cx18-irq.h"
32 #define CX18_REG_I2C_1_WR 0xf15000
33 #define CX18_REG_I2C_1_RD 0xf15008
34 #define CX18_REG_I2C_2_WR 0xf25100
35 #define CX18_REG_I2C_2_RD 0xf25108
37 #define SETSCL_BIT 0x0001
38 #define SETSDL_BIT 0x0002
39 #define GETSCL_BIT 0x0004
40 #define GETSDL_BIT 0x0008
42 #define CX18_CS5345_I2C_ADDR 0x4c
43 #define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
44 #define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
46 /* This array should match the CX18_HW_ defines */
47 static const u8 hw_addrs[] = {
48 0, /* CX18_HW_TUNER */
49 0, /* CX18_HW_TVEEPROM */
50 CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
51 0, /* CX18_HW_DVB */
52 0, /* CX18_HW_418_AV */
53 0, /* CX18_HW_GPIO_MUX */
54 0, /* CX18_HW_GPIO_RESET_CTRL */
55 CX18_Z8F0811_IR_TX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_TX_HAUP */
56 CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_RX_HAUP */
59 /* This array should match the CX18_HW_ defines */
60 /* This might well become a card-specific array */
61 static const u8 hw_bus[] = {
62 1, /* CX18_HW_TUNER */
63 0, /* CX18_HW_TVEEPROM */
64 0, /* CX18_HW_CS5345 */
65 0, /* CX18_HW_DVB */
66 0, /* CX18_HW_418_AV */
67 0, /* CX18_HW_GPIO_MUX */
68 0, /* CX18_HW_GPIO_RESET_CTRL */
69 0, /* CX18_HW_Z8F0811_IR_TX_HAUP */
70 0, /* CX18_HW_Z8F0811_IR_RX_HAUP */
73 /* This array should match the CX18_HW_ defines */
74 static const char * const hw_devicenames[] = {
75 "tuner",
76 "tveeprom",
77 "cs5345",
78 "cx23418_DTV",
79 "cx23418_AV",
80 "gpio_mux",
81 "gpio_reset_ctrl",
82 "ir_tx_z8f0811_haup",
83 "ir_rx_z8f0811_haup",
86 static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
87 const char *type, u8 addr)
89 struct i2c_board_info info;
90 struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
91 unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
93 memset(&info, 0, sizeof(struct i2c_board_info));
94 strlcpy(info.type, type, I2C_NAME_SIZE);
96 /* Our default information for ir-kbd-i2c.c to use */
97 switch (hw) {
98 case CX18_HW_Z8F0811_IR_RX_HAUP:
99 init_data->ir_codes = RC_MAP_HAUPPAUGE;
100 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
101 init_data->type = RC_TYPE_RC5;
102 init_data->name = cx->card_name;
103 info.platform_data = init_data;
104 break;
107 return i2c_new_probed_device(adap, &info, addr_list, NULL) == NULL ?
108 -1 : 0;
111 int cx18_i2c_register(struct cx18 *cx, unsigned idx)
113 struct v4l2_subdev *sd;
114 int bus = hw_bus[idx];
115 struct i2c_adapter *adap = &cx->i2c_adap[bus];
116 const char *type = hw_devicenames[idx];
117 u32 hw = 1 << idx;
119 if (idx >= ARRAY_SIZE(hw_addrs))
120 return -1;
122 if (hw == CX18_HW_TUNER) {
123 /* special tuner group handling */
124 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
125 adap, type, 0, cx->card_i2c->radio);
126 if (sd != NULL)
127 sd->grp_id = hw;
128 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
129 adap, type, 0, cx->card_i2c->demod);
130 if (sd != NULL)
131 sd->grp_id = hw;
132 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
133 adap, type, 0, cx->card_i2c->tv);
134 if (sd != NULL)
135 sd->grp_id = hw;
136 return sd != NULL ? 0 : -1;
139 if (hw & CX18_HW_IR_ANY)
140 return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
142 /* Is it not an I2C device or one we do not wish to register? */
143 if (!hw_addrs[idx])
144 return -1;
146 /* It's an I2C device other than an analog tuner or IR chip */
147 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
148 NULL);
149 if (sd != NULL)
150 sd->grp_id = hw;
151 return sd != NULL ? 0 : -1;
154 /* Find the first member of the subdev group id in hw */
155 struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
157 struct v4l2_subdev *result = NULL;
158 struct v4l2_subdev *sd;
160 spin_lock(&cx->v4l2_dev.lock);
161 v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
162 if (sd->grp_id == hw) {
163 result = sd;
164 break;
167 spin_unlock(&cx->v4l2_dev.lock);
168 return result;
171 static void cx18_setscl(void *data, int state)
173 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
174 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
175 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
176 u32 r = cx18_read_reg(cx, addr);
178 if (state)
179 cx18_write_reg(cx, r | SETSCL_BIT, addr);
180 else
181 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
184 static void cx18_setsda(void *data, int state)
186 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
187 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
188 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
189 u32 r = cx18_read_reg(cx, addr);
191 if (state)
192 cx18_write_reg(cx, r | SETSDL_BIT, addr);
193 else
194 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
197 static int cx18_getscl(void *data)
199 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
200 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
201 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
203 return cx18_read_reg(cx, addr) & GETSCL_BIT;
206 static int cx18_getsda(void *data)
208 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
209 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
210 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
212 return cx18_read_reg(cx, addr) & GETSDL_BIT;
215 /* template for i2c-bit-algo */
216 static struct i2c_adapter cx18_i2c_adap_template = {
217 .name = "cx18 i2c driver",
218 .algo = NULL, /* set by i2c-algo-bit */
219 .algo_data = NULL, /* filled from template */
220 .owner = THIS_MODULE,
223 #define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
224 #define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
226 static struct i2c_algo_bit_data cx18_i2c_algo_template = {
227 .setsda = cx18_setsda,
228 .setscl = cx18_setscl,
229 .getsda = cx18_getsda,
230 .getscl = cx18_getscl,
231 .udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
232 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
235 /* init + register i2c algo-bit adapter */
236 int init_cx18_i2c(struct cx18 *cx)
238 int i, err;
239 CX18_DEBUG_I2C("i2c init\n");
241 for (i = 0; i < 2; i++) {
242 /* Setup algorithm for adapter */
243 memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
244 sizeof(struct i2c_algo_bit_data));
245 cx->i2c_algo_cb_data[i].cx = cx;
246 cx->i2c_algo_cb_data[i].bus_index = i;
247 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
249 /* Setup adapter */
250 memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
251 sizeof(struct i2c_adapter));
252 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
253 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
254 " #%d-%d", cx->instance, i);
255 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
256 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
259 if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
260 /* Reset/Unreset I2C hardware block */
261 /* Clock select 220MHz */
262 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
263 0x00000000, 0x10001000);
264 /* Clock Enable */
265 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
266 0x00001000, 0x10001000);
268 /* courtesy of Steven Toth <stoth@hauppauge.com> */
269 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
270 mdelay(10);
271 cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
272 mdelay(10);
273 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
274 mdelay(10);
276 /* Set to edge-triggered intrs. */
277 cx18_write_reg(cx, 0x00c00000, 0xc730c8);
278 /* Clear any stale intrs */
279 cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
280 ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
282 /* Hw I2C1 Clock Freq ~100kHz */
283 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
284 cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
285 cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
287 /* Hw I2C2 Clock Freq ~100kHz */
288 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
289 cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
290 cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
292 cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
293 core, reset, (u32) CX18_GPIO_RESET_I2C);
295 err = i2c_bit_add_bus(&cx->i2c_adap[0]);
296 if (err)
297 goto err;
298 err = i2c_bit_add_bus(&cx->i2c_adap[1]);
299 if (err)
300 goto err_del_bus_0;
301 return 0;
303 err_del_bus_0:
304 i2c_del_adapter(&cx->i2c_adap[0]);
305 err:
306 return err;
309 void exit_cx18_i2c(struct cx18 *cx)
311 int i;
312 CX18_DEBUG_I2C("i2c exit\n");
313 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
314 CX18_REG_I2C_1_WR);
315 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
316 CX18_REG_I2C_2_WR);
318 for (i = 0; i < 2; i++) {
319 i2c_del_adapter(&cx->i2c_adap[i]);
324 Hauppauge HVR1600 should have:
325 32 cx24227
326 98 unknown
327 a0 eeprom
328 c2 tuner
329 e? zilog ir