drivers/media/video/omap3isp/ispcsi2.c

   1 /*
   2  * ispcsi2.c
   3  *
   4  * TI OMAP3 ISP - CSI2 module
   5  *
   6  * Copyright (C) 2010 Nokia Corporation
   7  * Copyright (C) 2009 Texas Instruments, Inc.
   8  *
   9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10  *           Sakari Ailus <sakari.ailus@iki.fi>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24  * 02110-1301 USA
  25  */
  26 #include <linux/delay.h>
  27 #include <media/v4l2-common.h>
  28 #include <linux/v4l2-mediabus.h>
  29 #include <linux/mm.h>
  30
  31 #include "isp.h"
  32 #include "ispreg.h"
  33 #include "ispcsi2.h"
  34
  35 /*
  36  * csi2_if_enable - Enable CSI2 Receiver interface.
  37  * @enable: enable flag
  38  *
  39  */
  40 static void csi2_if_enable(struct isp_device *isp,
  41                            struct isp_csi2_device *csi2, u8 enable)
  42 {
  43         struct isp_csi2_ctrl_cfg *currctrl = &csi2->ctrl;
  44
  45         isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_CTRL, ISPCSI2_CTRL_IF_EN,
  46                         enable ? ISPCSI2_CTRL_IF_EN : 0);
  47
  48         currctrl->if_enable = enable;
  49 }
  50
  51 /*
  52  * csi2_recv_config - CSI2 receiver module configuration.
  53  * @currctrl: isp_csi2_ctrl_cfg structure
  54  *
  55  */
  56 static void csi2_recv_config(struct isp_device *isp,
  57                              struct isp_csi2_device *csi2,
  58                              struct isp_csi2_ctrl_cfg *currctrl)
  59 {
  60         u32 reg;
  61
  62         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTRL);
  63
  64         if (currctrl->frame_mode)
  65                 reg |= ISPCSI2_CTRL_FRAME;
  66         else
  67                 reg &= ~ISPCSI2_CTRL_FRAME;
  68
  69         if (currctrl->vp_clk_enable)
  70                 reg |= ISPCSI2_CTRL_VP_CLK_EN;
  71         else
  72                 reg &= ~ISPCSI2_CTRL_VP_CLK_EN;
  73
  74         if (currctrl->vp_only_enable)
  75                 reg |= ISPCSI2_CTRL_VP_ONLY_EN;
  76         else
  77                 reg &= ~ISPCSI2_CTRL_VP_ONLY_EN;
  78
  79         reg &= ~ISPCSI2_CTRL_VP_OUT_CTRL_MASK;
  80         reg |= currctrl->vp_out_ctrl << ISPCSI2_CTRL_VP_OUT_CTRL_SHIFT;
  81
  82         if (currctrl->ecc_enable)
  83                 reg |= ISPCSI2_CTRL_ECC_EN;
  84         else
  85                 reg &= ~ISPCSI2_CTRL_ECC_EN;
  86
  87         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTRL);
  88 }
  89
  90 static const unsigned int csi2_input_fmts[] = {
  91         V4L2_MBUS_FMT_SGRBG10_1X10,
  92         V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,
  93         V4L2_MBUS_FMT_SRGGB10_1X10,
  94         V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8,
  95         V4L2_MBUS_FMT_SBGGR10_1X10,
  96         V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8,
  97         V4L2_MBUS_FMT_SGBRG10_1X10,
  98         V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8,
  99 };
 100
 101 /* To set the format on the CSI2 requires a mapping function that takes
 102  * the following inputs:
 103  * - 2 different formats (at this time)
 104  * - 2 destinations (mem, vp+mem) (vp only handled separately)
 105  * - 2 decompression options (on, off)
 106  * - 2 isp revisions (certain format must be handled differently on OMAP3630)
 107  * Output should be CSI2 frame format code
 108  * Array indices as follows: [format][dest][decompr][is_3630]
 109  * Not all combinations are valid. 0 means invalid.
 110  */
 111 static const u16 __csi2_fmt_map[2][2][2][2] = {
 112         /* RAW10 formats */
 113         {
 114                 /* Output to memory */
 115                 {
 116                         /* No DPCM decompression */
 117                         { CSI2_PIX_FMT_RAW10_EXP16, CSI2_PIX_FMT_RAW10_EXP16 },
 118                         /* DPCM decompression */
 119                         { 0, 0 },
 120                 },
 121                 /* Output to both */
 122                 {
 123                         /* No DPCM decompression */
 124                         { CSI2_PIX_FMT_RAW10_EXP16_VP,
 125                           CSI2_PIX_FMT_RAW10_EXP16_VP },
 126                         /* DPCM decompression */
 127                         { 0, 0 },
 128                 },
 129         },
 130         /* RAW10 DPCM8 formats */
 131         {
 132                 /* Output to memory */
 133                 {
 134                         /* No DPCM decompression */
 135                         { CSI2_PIX_FMT_RAW8, CSI2_USERDEF_8BIT_DATA1 },
 136                         /* DPCM decompression */
 137                         { CSI2_PIX_FMT_RAW8_DPCM10_EXP16,
 138                           CSI2_USERDEF_8BIT_DATA1_DPCM10 },
 139                 },
 140                 /* Output to both */
 141                 {
 142                         /* No DPCM decompression */
 143                         { CSI2_PIX_FMT_RAW8_VP,
 144                           CSI2_PIX_FMT_RAW8_VP },
 145                         /* DPCM decompression */
 146                         { CSI2_PIX_FMT_RAW8_DPCM10_VP,
 147                           CSI2_USERDEF_8BIT_DATA1_DPCM10_VP },
 148                 },
 149         },
 150 };
 151
 152 /*
 153  * csi2_ctx_map_format - Map CSI2 sink media bus format to CSI2 format ID
 154  * @csi2: ISP CSI2 device
 155  *
 156  * Returns CSI2 physical format id
 157  */
 158 static u16 csi2_ctx_map_format(struct isp_csi2_device *csi2)
 159 {
 160         const struct v4l2_mbus_framefmt *fmt = &csi2->formats[CSI2_PAD_SINK];
 161         int fmtidx, destidx, is_3630;
 162
 163         switch (fmt->code) {
 164         case V4L2_MBUS_FMT_SGRBG10_1X10:
 165         case V4L2_MBUS_FMT_SRGGB10_1X10:
 166         case V4L2_MBUS_FMT_SBGGR10_1X10:
 167         case V4L2_MBUS_FMT_SGBRG10_1X10:
 168                 fmtidx = 0;
 169                 break;
 170         case V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8:
 171         case V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8:
 172         case V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8:
 173         case V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8:
 174                 fmtidx = 1;
 175                 break;
 176         default:
 177                 WARN(1, KERN_ERR "CSI2: pixel format %08x unsupported!\n",
 178                      fmt->code);
 179                 return 0;
 180         }
 181
 182         if (!(csi2->output & CSI2_OUTPUT_CCDC) &&
 183             !(csi2->output & CSI2_OUTPUT_MEMORY)) {
 184                 /* Neither output enabled is a valid combination */
 185                 return CSI2_PIX_FMT_OTHERS;
 186         }
 187
 188         /* If we need to skip frames at the beginning of the stream disable the
 189          * video port to avoid sending the skipped frames to the CCDC.
 190          */
 191         destidx = csi2->frame_skip ? 0 : !!(csi2->output & CSI2_OUTPUT_CCDC);
 192         is_3630 = csi2->isp->revision == ISP_REVISION_15_0;
 193
 194         return __csi2_fmt_map[fmtidx][destidx][csi2->dpcm_decompress][is_3630];
 195 }
 196
 197 /*
 198  * csi2_set_outaddr - Set memory address to save output image
 199  * @csi2: Pointer to ISP CSI2a device.
 200  * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
 201  *
 202  * Sets the memory address where the output will be saved.
 203  *
 204  * Returns 0 if successful, or -EINVAL if the address is not in the 32 byte
 205  * boundary.
 206  */
 207 static void csi2_set_outaddr(struct isp_csi2_device *csi2, u32 addr)
 208 {
 209         struct isp_device *isp = csi2->isp;
 210         struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[0];
 211
 212         ctx->ping_addr = addr;
 213         ctx->pong_addr = addr;
 214         isp_reg_writel(isp, ctx->ping_addr,
 215                        csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum));
 216         isp_reg_writel(isp, ctx->pong_addr,
 217                        csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum));
 218 }
 219
 220 /*
 221  * is_usr_def_mapping - Checks whether USER_DEF_MAPPING should
 222  *                      be enabled by CSI2.
 223  * @format_id: mapped format id
 224  *
 225  */
 226 static inline int is_usr_def_mapping(u32 format_id)
 227 {
 228         return (format_id & 0x40) ? 1 : 0;
 229 }
 230
 231 /*
 232  * csi2_ctx_enable - Enable specified CSI2 context
 233  * @ctxnum: Context number, valid between 0 and 7 values.
 234  * @enable: enable
 235  *
 236  */
 237 static void csi2_ctx_enable(struct isp_device *isp,
 238                             struct isp_csi2_device *csi2, u8 ctxnum, u8 enable)
 239 {
 240         struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[ctxnum];
 241         unsigned int skip = 0;
 242         u32 reg;
 243
 244         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum));
 245
 246         if (enable) {
 247                 if (csi2->frame_skip)
 248                         skip = csi2->frame_skip;
 249                 else if (csi2->output & CSI2_OUTPUT_MEMORY)
 250                         skip = 1;
 251
 252                 reg &= ~ISPCSI2_CTX_CTRL1_COUNT_MASK;
 253                 reg |= ISPCSI2_CTX_CTRL1_COUNT_UNLOCK
 254                     |  (skip << ISPCSI2_CTX_CTRL1_COUNT_SHIFT)
 255                     |  ISPCSI2_CTX_CTRL1_CTX_EN;
 256         } else {
 257                 reg &= ~ISPCSI2_CTX_CTRL1_CTX_EN;
 258         }
 259
 260         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum));
 261         ctx->enabled = enable;
 262 }
 263
 264 /*
 265  * csi2_ctx_config - CSI2 context configuration.
 266  * @ctx: context configuration
 267  *
 268  */
 269 static void csi2_ctx_config(struct isp_device *isp,
 270                             struct isp_csi2_device *csi2,
 271                             struct isp_csi2_ctx_cfg *ctx)
 272 {
 273         u32 reg;
 274
 275         /* Set up CSI2_CTx_CTRL1 */
 276         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum));
 277
 278         if (ctx->eof_enabled)
 279                 reg |= ISPCSI2_CTX_CTRL1_EOF_EN;
 280         else
 281                 reg &= ~ISPCSI2_CTX_CTRL1_EOF_EN;
 282
 283         if (ctx->eol_enabled)
 284                 reg |= ISPCSI2_CTX_CTRL1_EOL_EN;
 285         else
 286                 reg &= ~ISPCSI2_CTX_CTRL1_EOL_EN;
 287
 288         if (ctx->checksum_enabled)
 289                 reg |= ISPCSI2_CTX_CTRL1_CS_EN;
 290         else
 291                 reg &= ~ISPCSI2_CTX_CTRL1_CS_EN;
 292
 293         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum));
 294
 295         /* Set up CSI2_CTx_CTRL2 */
 296         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum));
 297
 298         reg &= ~(ISPCSI2_CTX_CTRL2_VIRTUAL_ID_MASK);
 299         reg |= ctx->virtual_id << ISPCSI2_CTX_CTRL2_VIRTUAL_ID_SHIFT;
 300
 301         reg &= ~(ISPCSI2_CTX_CTRL2_FORMAT_MASK);
 302         reg |= ctx->format_id << ISPCSI2_CTX_CTRL2_FORMAT_SHIFT;
 303
 304         if (ctx->dpcm_decompress) {
 305                 if (ctx->dpcm_predictor)
 306                         reg |= ISPCSI2_CTX_CTRL2_DPCM_PRED;
 307                 else
 308                         reg &= ~ISPCSI2_CTX_CTRL2_DPCM_PRED;
 309         }
 310
 311         if (is_usr_def_mapping(ctx->format_id)) {
 312                 reg &= ~ISPCSI2_CTX_CTRL2_USER_DEF_MAP_MASK;
 313                 reg |= 2 << ISPCSI2_CTX_CTRL2_USER_DEF_MAP_SHIFT;
 314         }
 315
 316         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum));
 317
 318         /* Set up CSI2_CTx_CTRL3 */
 319         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum));
 320         reg &= ~(ISPCSI2_CTX_CTRL3_ALPHA_MASK);
 321         reg |= (ctx->alpha << ISPCSI2_CTX_CTRL3_ALPHA_SHIFT);
 322
 323         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum));
 324
 325         /* Set up CSI2_CTx_DAT_OFST */
 326         reg = isp_reg_readl(isp, csi2->regs1,
 327                             ISPCSI2_CTX_DAT_OFST(ctx->ctxnum));
 328         reg &= ~ISPCSI2_CTX_DAT_OFST_OFST_MASK;
 329         reg |= ctx->data_offset << ISPCSI2_CTX_DAT_OFST_OFST_SHIFT;
 330         isp_reg_writel(isp, reg, csi2->regs1,
 331                        ISPCSI2_CTX_DAT_OFST(ctx->ctxnum));
 332
 333         isp_reg_writel(isp, ctx->ping_addr,
 334                        csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum));
 335
 336         isp_reg_writel(isp, ctx->pong_addr,
 337                        csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum));
 338 }
 339
 340 /*
 341  * csi2_timing_config - CSI2 timing configuration.
 342  * @timing: csi2_timing_cfg structure
 343  */
 344 static void csi2_timing_config(struct isp_device *isp,
 345                                struct isp_csi2_device *csi2,
 346                                struct isp_csi2_timing_cfg *timing)
 347 {
 348         u32 reg;
 349
 350         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_TIMING);
 351
 352         if (timing->force_rx_mode)
 353                 reg |= ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum);
 354         else
 355                 reg &= ~ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum);
 356
 357         if (timing->stop_state_16x)
 358                 reg |= ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum);
 359         else
 360                 reg &= ~ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum);
 361
 362         if (timing->stop_state_4x)
 363                 reg |= ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum);
 364         else
 365                 reg &= ~ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum);
 366
 367         reg &= ~ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_MASK(timing->ionum);
 368         reg |= timing->stop_state_counter <<
 369                ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_SHIFT(timing->ionum);
 370
 371         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_TIMING);
 372 }
 373
 374 /*
 375  * csi2_irq_ctx_set - Enables CSI2 Context IRQs.
 376  * @enable: Enable/disable CSI2 Context interrupts
 377  */
 378 static void csi2_irq_ctx_set(struct isp_device *isp,
 379                              struct isp_csi2_device *csi2, int enable)
 380 {
 381         u32 reg = ISPCSI2_CTX_IRQSTATUS_FE_IRQ;
 382         int i;
 383
 384         if (csi2->use_fs_irq)
 385                 reg |= ISPCSI2_CTX_IRQSTATUS_FS_IRQ;
 386
 387         for (i = 0; i < 8; i++) {
 388                 isp_reg_writel(isp, reg, csi2->regs1,
 389                                ISPCSI2_CTX_IRQSTATUS(i));
 390                 if (enable)
 391                         isp_reg_set(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i),
 392                                     reg);
 393                 else
 394                         isp_reg_clr(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i),
 395                                     reg);
 396         }
 397 }
 398
 399 /*
 400  * csi2_irq_complexio1_set - Enables CSI2 ComplexIO IRQs.
 401  * @enable: Enable/disable CSI2 ComplexIO #1 interrupts
 402  */
 403 static void csi2_irq_complexio1_set(struct isp_device *isp,
 404                                     struct isp_csi2_device *csi2, int enable)
 405 {
 406         u32 reg;
 407         reg = ISPCSI2_PHY_IRQENABLE_STATEALLULPMEXIT |
 408                 ISPCSI2_PHY_IRQENABLE_STATEALLULPMENTER |
 409                 ISPCSI2_PHY_IRQENABLE_STATEULPM5 |
 410                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL5 |
 411                 ISPCSI2_PHY_IRQENABLE_ERRESC5 |
 412                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS5 |
 413                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS5 |
 414                 ISPCSI2_PHY_IRQENABLE_STATEULPM4 |
 415                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL4 |
 416                 ISPCSI2_PHY_IRQENABLE_ERRESC4 |
 417                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS4 |
 418                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS4 |
 419                 ISPCSI2_PHY_IRQENABLE_STATEULPM3 |
 420                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL3 |
 421                 ISPCSI2_PHY_IRQENABLE_ERRESC3 |
 422                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS3 |
 423                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS3 |
 424                 ISPCSI2_PHY_IRQENABLE_STATEULPM2 |
 425                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL2 |
 426                 ISPCSI2_PHY_IRQENABLE_ERRESC2 |
 427                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS2 |
 428                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS2 |
 429                 ISPCSI2_PHY_IRQENABLE_STATEULPM1 |
 430                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL1 |
 431                 ISPCSI2_PHY_IRQENABLE_ERRESC1 |
 432                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS1 |
 433                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS1;
 434         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQSTATUS);
 435         if (enable)
 436                 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_PHY_IRQENABLE);
 437         else
 438                 reg = 0;
 439         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQENABLE);
 440 }
 441
 442 /*
 443  * csi2_irq_status_set - Enables CSI2 Status IRQs.
 444  * @enable: Enable/disable CSI2 Status interrupts
 445  */
 446 static void csi2_irq_status_set(struct isp_device *isp,
 447                                 struct isp_csi2_device *csi2, int enable)
 448 {
 449         u32 reg;
 450         reg = ISPCSI2_IRQSTATUS_OCP_ERR_IRQ |
 451                 ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ |
 452                 ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ |
 453                 ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ |
 454                 ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ |
 455                 ISPCSI2_IRQSTATUS_COMPLEXIO1_ERR_IRQ |
 456                 ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ |
 457                 ISPCSI2_IRQSTATUS_CONTEXT(0);
 458         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQSTATUS);
 459         if (enable)
 460                 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQENABLE);
 461         else
 462                 reg = 0;
 463
 464         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQENABLE);
 465 }
 466
 467 /*
 468  * omap3isp_csi2_reset - Resets the CSI2 module.
 469  *
 470  * Must be called with the phy lock held.
 471  *
 472  * Returns 0 if successful, or -EBUSY if power command didn't respond.
 473  */
 474 int omap3isp_csi2_reset(struct isp_csi2_device *csi2)
 475 {
 476         struct isp_device *isp = csi2->isp;
 477         u8 soft_reset_retries = 0;
 478         u32 reg;
 479         int i;
 480
 481         if (!csi2->available)
 482                 return -ENODEV;
 483
 484         if (csi2->phy->phy_in_use)
 485                 return -EBUSY;
 486
 487         isp_reg_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 488                     ISPCSI2_SYSCONFIG_SOFT_RESET);
 489
 490         do {
 491                 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_SYSSTATUS) &
 492                                     ISPCSI2_SYSSTATUS_RESET_DONE;
 493                 if (reg == ISPCSI2_SYSSTATUS_RESET_DONE)
 494                         break;
 495                 soft_reset_retries++;
 496                 if (soft_reset_retries < 5)
 497                         udelay(100);
 498         } while (soft_reset_retries < 5);
 499
 500         if (soft_reset_retries == 5) {
 501                 printk(KERN_ERR "CSI2: Soft reset try count exceeded!\n");
 502                 return -EBUSY;
 503         }
 504
 505         if (isp->revision == ISP_REVISION_15_0)
 506                 isp_reg_set(isp, csi2->regs1, ISPCSI2_PHY_CFG,
 507                             ISPCSI2_PHY_CFG_RESET_CTRL);
 508
 509         i = 100;
 510         do {
 511                 reg = isp_reg_readl(isp, csi2->phy->phy_regs, ISPCSIPHY_REG1)
 512                     & ISPCSIPHY_REG1_RESET_DONE_CTRLCLK;
 513                 if (reg == ISPCSIPHY_REG1_RESET_DONE_CTRLCLK)
 514                         break;
 515                 udelay(100);
 516         } while (--i > 0);
 517
 518         if (i == 0) {
 519                 printk(KERN_ERR
 520                        "CSI2: Reset for CSI2_96M_FCLK domain Failed!\n");
 521                 return -EBUSY;
 522         }
 523
 524         if (isp->autoidle)
 525                 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 526                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_MASK |
 527                                 ISPCSI2_SYSCONFIG_AUTO_IDLE,
 528                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_SMART |
 529                                 ((isp->revision == ISP_REVISION_15_0) ?
 530                                  ISPCSI2_SYSCONFIG_AUTO_IDLE : 0));
 531         else
 532                 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 533                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_MASK |
 534                                 ISPCSI2_SYSCONFIG_AUTO_IDLE,
 535                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_NO);
 536
 537         return 0;
 538 }
 539
 540 static int csi2_configure(struct isp_csi2_device *csi2)
 541 {
 542         const struct isp_v4l2_subdevs_group *pdata;
 543         struct isp_device *isp = csi2->isp;
 544         struct isp_csi2_timing_cfg *timing = &csi2->timing[0];
 545         struct v4l2_subdev *sensor;
 546         struct media_pad *pad;
 547
 548         /*
 549          * CSI2 fields that can be updated while the context has
 550          * been enabled or the interface has been enabled are not
 551          * updated dynamically currently. So we do not allow to
 552          * reconfigure if either has been enabled
 553          */
 554         if (csi2->contexts[0].enabled || csi2->ctrl.if_enable)
 555                 return -EBUSY;
 556
 557         pad = media_entity_remote_source(&csi2->pads[CSI2_PAD_SINK]);
 558         sensor = media_entity_to_v4l2_subdev(pad->entity);
 559         pdata = sensor->host_priv;
 560
 561         csi2->frame_skip = 0;
 562         v4l2_subdev_call(sensor, sensor, g_skip_frames, &csi2->frame_skip);
 563
 564         csi2->ctrl.vp_out_ctrl = pdata->bus.csi2.vpclk_div;
 565         csi2->ctrl.frame_mode = ISP_CSI2_FRAME_IMMEDIATE;
 566         csi2->ctrl.ecc_enable = pdata->bus.csi2.crc;
 567
 568         timing->ionum = 1;
 569         timing->force_rx_mode = 1;
 570         timing->stop_state_16x = 1;
 571         timing->stop_state_4x = 1;
 572         timing->stop_state_counter = 0x1FF;
 573
 574         /*
 575          * The CSI2 receiver can't do any format conversion except DPCM
 576          * decompression, so every set_format call configures both pads
 577          * and enables DPCM decompression as a special case:
 578          */
 579         if (csi2->formats[CSI2_PAD_SINK].code !=
 580             csi2->formats[CSI2_PAD_SOURCE].code)
 581                 csi2->dpcm_decompress = true;
 582         else
 583                 csi2->dpcm_decompress = false;
 584
 585         csi2->contexts[0].format_id = csi2_ctx_map_format(csi2);
 586
 587         if (csi2->video_out.bpl_padding == 0)
 588                 csi2->contexts[0].data_offset = 0;
 589         else
 590                 csi2->contexts[0].data_offset = csi2->video_out.bpl_value;
 591
 592         /*
 593          * Enable end of frame and end of line signals generation for
 594          * context 0. These signals are generated from CSI2 receiver to
 595          * qualify the last pixel of a frame and the last pixel of a line.
 596          * Without enabling the signals CSI2 receiver writes data to memory
 597          * beyond buffer size and/or data line offset is not handled correctly.
 598          */
 599         csi2->contexts[0].eof_enabled = 1;
 600         csi2->contexts[0].eol_enabled = 1;
 601
 602         csi2_irq_complexio1_set(isp, csi2, 1);
 603         csi2_irq_ctx_set(isp, csi2, 1);
 604         csi2_irq_status_set(isp, csi2, 1);
 605
 606         /* Set configuration (timings, format and links) */
 607         csi2_timing_config(isp, csi2, timing);
 608         csi2_recv_config(isp, csi2, &csi2->ctrl);
 609         csi2_ctx_config(isp, csi2, &csi2->contexts[0]);
 610
 611         return 0;
 612 }
 613
 614 /*
 615  * csi2_print_status - Prints CSI2 debug information.
 616  */
 617 #define CSI2_PRINT_REGISTER(isp, regs, name)\
 618         dev_dbg(isp->dev, "###CSI2 " #name "=0x%08x\n", \
 619                 isp_reg_readl(isp, regs, ISPCSI2_##name))
 620
 621 static void csi2_print_status(struct isp_csi2_device *csi2)
 622 {
 623         struct isp_device *isp = csi2->isp;
 624
 625         if (!csi2->available)
 626                 return;
 627
 628         dev_dbg(isp->dev, "-------------CSI2 Register dump-------------\n");
 629
 630         CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSCONFIG);
 631         CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSSTATUS);
 632         CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQENABLE);
 633         CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQSTATUS);
 634         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTRL);
 635         CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_H);
 636         CSI2_PRINT_REGISTER(isp, csi2->regs1, GNQ);
 637         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_CFG);
 638         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQSTATUS);
 639         CSI2_PRINT_REGISTER(isp, csi2->regs1, SHORT_PACKET);
 640         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQENABLE);
 641         CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_P);
 642         CSI2_PRINT_REGISTER(isp, csi2->regs1, TIMING);
 643         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL1(0));
 644         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL2(0));
 645         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_OFST(0));
 646         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PING_ADDR(0));
 647         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PONG_ADDR(0));
 648         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQENABLE(0));
 649         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQSTATUS(0));
 650         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL3(0));
 651
 652         dev_dbg(isp->dev, "--------------------------------------------\n");
 653 }
 654
 655 /* -----------------------------------------------------------------------------
 656  * Interrupt handling
 657  */
 658
 659 /*
 660  * csi2_isr_buffer - Does buffer handling at end-of-frame
 661  * when writing to memory.
 662  */
 663 static void csi2_isr_buffer(struct isp_csi2_device *csi2)
 664 {
 665         struct isp_device *isp = csi2->isp;
 666         struct isp_buffer *buffer;
 667
 668         csi2_ctx_enable(isp, csi2, 0, 0);
 669
 670         buffer = omap3isp_video_buffer_next(&csi2->video_out, 0);
 671
 672         /*
 673          * Let video queue operation restart engine if there is an underrun
 674          * condition.
 675          */
 676         if (buffer == NULL)
 677                 return;
 678
 679         csi2_set_outaddr(csi2, buffer->isp_addr);
 680         csi2_ctx_enable(isp, csi2, 0, 1);
 681 }
 682
 683 static void csi2_isr_ctx(struct isp_csi2_device *csi2,
 684                          struct isp_csi2_ctx_cfg *ctx)
 685 {
 686         struct isp_device *isp = csi2->isp;
 687         unsigned int n = ctx->ctxnum;
 688         u32 status;
 689
 690         status = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n));
 691         isp_reg_writel(isp, status, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n));
 692
 693         /* Propagate frame number */
 694         if (status & ISPCSI2_CTX_IRQSTATUS_FS_IRQ) {
 695                 struct isp_pipeline *pipe =
 696                                      to_isp_pipeline(&csi2->subdev.entity);
 697                 if (pipe->do_propagation)
 698                         atomic_inc(&pipe->frame_number);
 699         }
 700
 701         if (!(status & ISPCSI2_CTX_IRQSTATUS_FE_IRQ))
 702                 return;
 703
 704         /* Skip interrupts until we reach the frame skip count. The CSI2 will be
 705          * automatically disabled, as the frame skip count has been programmed
 706          * in the CSI2_CTx_CTRL1::COUNT field, so reenable it.
 707          *
 708          * It would have been nice to rely on the FRAME_NUMBER interrupt instead
 709          * but it turned out that the interrupt is only generated when the CSI2
 710          * writes to memory (the CSI2_CTx_CTRL1::COUNT field is decreased
 711          * correctly and reaches 0 when data is forwarded to the video port only
 712          * but no interrupt arrives). Maybe a CSI2 hardware bug.
 713          */
 714         if (csi2->frame_skip) {
 715                 csi2->frame_skip--;
 716                 if (csi2->frame_skip == 0) {
 717                         ctx->format_id = csi2_ctx_map_format(csi2);
 718                         csi2_ctx_config(isp, csi2, ctx);
 719                         csi2_ctx_enable(isp, csi2, n, 1);
 720                 }
 721                 return;
 722         }
 723
 724         if (csi2->output & CSI2_OUTPUT_MEMORY)
 725                 csi2_isr_buffer(csi2);
 726 }
 727
 728 /*
 729  * omap3isp_csi2_isr - CSI2 interrupt handling.
 730  *
 731  * Return -EIO on Transmission error
 732  */
 733 int omap3isp_csi2_isr(struct isp_csi2_device *csi2)
 734 {
 735         u32 csi2_irqstatus, cpxio1_irqstatus;
 736         struct isp_device *isp = csi2->isp;
 737         int retval = 0;
 738
 739         if (!csi2->available)
 740                 return -ENODEV;
 741
 742         csi2_irqstatus = isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQSTATUS);
 743         isp_reg_writel(isp, csi2_irqstatus, csi2->regs1, ISPCSI2_IRQSTATUS);
 744
 745         /* Failure Cases */
 746         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_COMPLEXIO1_ERR_IRQ) {
 747                 cpxio1_irqstatus = isp_reg_readl(isp, csi2->regs1,
 748                                                  ISPCSI2_PHY_IRQSTATUS);
 749                 isp_reg_writel(isp, cpxio1_irqstatus,
 750                                csi2->regs1, ISPCSI2_PHY_IRQSTATUS);
 751                 dev_dbg(isp->dev, "CSI2: ComplexIO Error IRQ "
 752                         "%x\n", cpxio1_irqstatus);
 753                 retval = -EIO;
 754         }
 755
 756         if (csi2_irqstatus & (ISPCSI2_IRQSTATUS_OCP_ERR_IRQ |
 757                               ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ |
 758                               ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ |
 759                               ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ |
 760                               ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ)) {
 761                 dev_dbg(isp->dev, "CSI2 Err:"
 762                         " OCP:%d,"
 763                         " Short_pack:%d,"
 764                         " ECC:%d,"
 765                         " CPXIO2:%d,"
 766                         " FIFO_OVF:%d,"
 767                         "\n",
 768                         (csi2_irqstatus &
 769                          ISPCSI2_IRQSTATUS_OCP_ERR_IRQ) ? 1 : 0,
 770                         (csi2_irqstatus &
 771                          ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ) ? 1 : 0,
 772                         (csi2_irqstatus &
 773                          ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ) ? 1 : 0,
 774                         (csi2_irqstatus &
 775                          ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ) ? 1 : 0,
 776                         (csi2_irqstatus &
 777                          ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ) ? 1 : 0);
 778                 retval = -EIO;
 779         }
 780
 781         if (omap3isp_module_sync_is_stopping(&csi2->wait, &csi2->stopping))
 782                 return 0;
 783
 784         /* Successful cases */
 785         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_CONTEXT(0))
 786                 csi2_isr_ctx(csi2, &csi2->contexts[0]);
 787
 788         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ)
 789                 dev_dbg(isp->dev, "CSI2: ECC correction done\n");
 790
 791         return retval;
 792 }
 793
 794 /* -----------------------------------------------------------------------------
 795  * ISP video operations
 796  */
 797
 798 /*
 799  * csi2_queue - Queues the first buffer when using memory output
 800  * @video: The video node
 801  * @buffer: buffer to queue
 802  */
 803 static int csi2_queue(struct isp_video *video, struct isp_buffer *buffer)
 804 {
 805         struct isp_device *isp = video->isp;
 806         struct isp_csi2_device *csi2 = &isp->isp_csi2a;
 807
 808         csi2_set_outaddr(csi2, buffer->isp_addr);
 809
 810         /*
 811          * If streaming was enabled before there was a buffer queued
 812          * or underrun happened in the ISR, the hardware was not enabled
 813          * and DMA queue flag ISP_VIDEO_DMAQUEUE_UNDERRUN is still set.
 814          * Enable it now.
 815          */
 816         if (csi2->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
 817                 /* Enable / disable context 0 and IRQs */
 818                 csi2_if_enable(isp, csi2, 1);
 819                 csi2_ctx_enable(isp, csi2, 0, 1);
 820                 isp_video_dmaqueue_flags_clr(&csi2->video_out);
 821         }
 822
 823         return 0;
 824 }
 825
 826 static const struct isp_video_operations csi2_ispvideo_ops = {
 827         .queue = csi2_queue,
 828 };
 829
 830 /* -----------------------------------------------------------------------------
 831  * V4L2 subdev operations
 832  */
 833
 834 static struct v4l2_mbus_framefmt *
 835 __csi2_get_format(struct isp_csi2_device *csi2, struct v4l2_subdev_fh *fh,
 836                   unsigned int pad, enum v4l2_subdev_format_whence which)
 837 {
 838         if (which == V4L2_SUBDEV_FORMAT_TRY)
 839                 return v4l2_subdev_get_try_format(fh, pad);
 840         else
 841                 return &csi2->formats[pad];
 842 }
 843
 844 static void
 845 csi2_try_format(struct isp_csi2_device *csi2, struct v4l2_subdev_fh *fh,
 846                 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
 847                 enum v4l2_subdev_format_whence which)
 848 {
 849         enum v4l2_mbus_pixelcode pixelcode;
 850         struct v4l2_mbus_framefmt *format;
 851         const struct isp_format_info *info;
 852         unsigned int i;
 853
 854         switch (pad) {
 855         case CSI2_PAD_SINK:
 856                 /* Clamp the width and height to valid range (1-8191). */
 857                 for (i = 0; i < ARRAY_SIZE(csi2_input_fmts); i++) {
 858                         if (fmt->code == csi2_input_fmts[i])
 859                                 break;
 860                 }
 861
 862                 /* If not found, use SGRBG10 as default */
 863                 if (i >= ARRAY_SIZE(csi2_input_fmts))
 864                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 865
 866                 fmt->width = clamp_t(u32, fmt->width, 1, 8191);
 867                 fmt->height = clamp_t(u32, fmt->height, 1, 8191);
 868                 break;
 869
 870         case CSI2_PAD_SOURCE:
 871                 /* Source format same as sink format, except for DPCM
 872                  * compression.
 873                  */
 874                 pixelcode = fmt->code;
 875                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SINK, which);
 876                 memcpy(fmt, format, sizeof(*fmt));
 877
 878                 /*
 879                  * Only Allow DPCM decompression, and check that the
 880                  * pattern is preserved
 881                  */
 882                 info = omap3isp_video_format_info(fmt->code);
 883                 if (info->uncompressed == pixelcode)
 884                         fmt->code = pixelcode;
 885                 break;
 886         }
 887
 888         /* RGB, non-interlaced */
 889         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 890         fmt->field = V4L2_FIELD_NONE;
 891 }
 892
 893 /*
 894  * csi2_enum_mbus_code - Handle pixel format enumeration
 895  * @sd     : pointer to v4l2 subdev structure
 896  * @fh     : V4L2 subdev file handle
 897  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
 898  * return -EINVAL or zero on success
 899  */
 900 static int csi2_enum_mbus_code(struct v4l2_subdev *sd,
 901                                struct v4l2_subdev_fh *fh,
 902                                struct v4l2_subdev_mbus_code_enum *code)
 903 {
 904         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 905         struct v4l2_mbus_framefmt *format;
 906         const struct isp_format_info *info;
 907
 908         if (code->pad == CSI2_PAD_SINK) {
 909                 if (code->index >= ARRAY_SIZE(csi2_input_fmts))
 910                         return -EINVAL;
 911
 912                 code->code = csi2_input_fmts[code->index];
 913         } else {
 914                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SINK,
 915                                            V4L2_SUBDEV_FORMAT_TRY);
 916                 switch (code->index) {
 917                 case 0:
 918                         /* Passthrough sink pad code */
 919                         code->code = format->code;
 920                         break;
 921                 case 1:
 922                         /* Uncompressed code */
 923                         info = omap3isp_video_format_info(format->code);
 924                         if (info->uncompressed == format->code)
 925                                 return -EINVAL;
 926
 927                         code->code = info->uncompressed;
 928                         break;
 929                 default:
 930                         return -EINVAL;
 931                 }
 932         }
 933
 934         return 0;
 935 }
 936
 937 static int csi2_enum_frame_size(struct v4l2_subdev *sd,
 938                                 struct v4l2_subdev_fh *fh,
 939                                 struct v4l2_subdev_frame_size_enum *fse)
 940 {
 941         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 942         struct v4l2_mbus_framefmt format;
 943
 944         if (fse->index != 0)
 945                 return -EINVAL;
 946
 947         format.code = fse->code;
 948         format.width = 1;
 949         format.height = 1;
 950         csi2_try_format(csi2, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
 951         fse->min_width = format.width;
 952         fse->min_height = format.height;
 953
 954         if (format.code != fse->code)
 955                 return -EINVAL;
 956
 957         format.code = fse->code;
 958         format.width = -1;
 959         format.height = -1;
 960         csi2_try_format(csi2, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
 961         fse->max_width = format.width;
 962         fse->max_height = format.height;
 963
 964         return 0;
 965 }
 966
 967 /*
 968  * csi2_get_format - Handle get format by pads subdev method
 969  * @sd : pointer to v4l2 subdev structure
 970  * @fh : V4L2 subdev file handle
 971  * @fmt: pointer to v4l2 subdev format structure
 972  * return -EINVAL or zero on success
 973  */
 974 static int csi2_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
 975                            struct v4l2_subdev_format *fmt)
 976 {
 977         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 978         struct v4l2_mbus_framefmt *format;
 979
 980         format = __csi2_get_format(csi2, fh, fmt->pad, fmt->which);
 981         if (format == NULL)
 982                 return -EINVAL;
 983
 984         fmt->format = *format;
 985         return 0;
 986 }
 987
 988 /*
 989  * csi2_set_format - Handle set format by pads subdev method
 990  * @sd : pointer to v4l2 subdev structure
 991  * @fh : V4L2 subdev file handle
 992  * @fmt: pointer to v4l2 subdev format structure
 993  * return -EINVAL or zero on success
 994  */
 995 static int csi2_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
 996                            struct v4l2_subdev_format *fmt)
 997 {
 998         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 999         struct v4l2_mbus_framefmt *format;
1000
1001         format = __csi2_get_format(csi2, fh, fmt->pad, fmt->which);
1002         if (format == NULL)
1003                 return -EINVAL;
1004
1005         csi2_try_format(csi2, fh, fmt->pad, &fmt->format, fmt->which);
1006         *format = fmt->format;
1007
1008         /* Propagate the format from sink to source */
1009         if (fmt->pad == CSI2_PAD_SINK) {
1010                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SOURCE,
1011                                            fmt->which);
1012                 *format = fmt->format;
1013                 csi2_try_format(csi2, fh, CSI2_PAD_SOURCE, format, fmt->which);
1014         }
1015
1016         return 0;
1017 }
1018
1019 /*
1020  * csi2_init_formats - Initialize formats on all pads
1021  * @sd: ISP CSI2 V4L2 subdevice
1022  * @fh: V4L2 subdev file handle
1023  *
1024  * Initialize all pad formats with default values. If fh is not NULL, try
1025  * formats are initialized on the file handle. Otherwise active formats are
1026  * initialized on the device.
1027  */
1028 static int csi2_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1029 {
1030         struct v4l2_subdev_format format;
1031
1032         memset(&format, 0, sizeof(format));
1033         format.pad = CSI2_PAD_SINK;
1034         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1035         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
1036         format.format.width = 4096;
1037         format.format.height = 4096;
1038         csi2_set_format(sd, fh, &format);
1039
1040         return 0;
1041 }
1042
1043 /*
1044  * csi2_set_stream - Enable/Disable streaming on the CSI2 module
1045  * @sd: ISP CSI2 V4L2 subdevice
1046  * @enable: ISP pipeline stream state
1047  *
1048  * Return 0 on success or a negative error code otherwise.
1049  */
1050 static int csi2_set_stream(struct v4l2_subdev *sd, int enable)
1051 {
1052         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
1053         struct isp_device *isp = csi2->isp;
1054         struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);
1055         struct isp_video *video_out = &csi2->video_out;
1056
1057         switch (enable) {
1058         case ISP_PIPELINE_STREAM_CONTINUOUS:
1059                 if (omap3isp_csiphy_acquire(csi2->phy) < 0)
1060                         return -ENODEV;
1061                 csi2->use_fs_irq = pipe->do_propagation;
1062                 if (csi2->output & CSI2_OUTPUT_MEMORY)
1063                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CSI2A_WRITE);
1064                 csi2_configure(csi2);
1065                 csi2_print_status(csi2);
1066
1067                 /*
1068                  * When outputting to memory with no buffer available, let the
1069                  * buffer queue handler start the hardware. A DMA queue flag
1070                  * ISP_VIDEO_DMAQUEUE_QUEUED will be set as soon as there is
1071                  * a buffer available.
1072                  */
1073                 if (csi2->output & CSI2_OUTPUT_MEMORY &&
1074                     !(video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED))
1075                         break;
1076                 /* Enable context 0 and IRQs */
1077                 atomic_set(&csi2->stopping, 0);
1078                 csi2_ctx_enable(isp, csi2, 0, 1);
1079                 csi2_if_enable(isp, csi2, 1);
1080                 isp_video_dmaqueue_flags_clr(video_out);
1081                 break;
1082
1083         case ISP_PIPELINE_STREAM_STOPPED:
1084                 if (csi2->state == ISP_PIPELINE_STREAM_STOPPED)
1085                         return 0;
1086                 if (omap3isp_module_sync_idle(&sd->entity, &csi2->wait,
1087                                               &csi2->stopping))
1088                         dev_dbg(isp->dev, "%s: module stop timeout.\n",
1089                                 sd->name);
1090                 csi2_ctx_enable(isp, csi2, 0, 0);
1091                 csi2_if_enable(isp, csi2, 0);
1092                 csi2_irq_ctx_set(isp, csi2, 0);
1093                 omap3isp_csiphy_release(csi2->phy);
1094                 isp_video_dmaqueue_flags_clr(video_out);
1095                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CSI2A_WRITE);
1096                 break;
1097         }
1098
1099         csi2->state = enable;
1100         return 0;
1101 }
1102
1103 /* subdev video operations */
1104 static const struct v4l2_subdev_video_ops csi2_video_ops = {
1105         .s_stream = csi2_set_stream,
1106 };
1107
1108 /* subdev pad operations */
1109 static const struct v4l2_subdev_pad_ops csi2_pad_ops = {
1110         .enum_mbus_code = csi2_enum_mbus_code,
1111         .enum_frame_size = csi2_enum_frame_size,
1112         .get_fmt = csi2_get_format,
1113         .set_fmt = csi2_set_format,
1114 };
1115
1116 /* subdev operations */
1117 static const struct v4l2_subdev_ops csi2_ops = {
1118         .video = &csi2_video_ops,
1119         .pad = &csi2_pad_ops,
1120 };
1121
1122 /* subdev internal operations */
1123 static const struct v4l2_subdev_internal_ops csi2_internal_ops = {
1124         .open = csi2_init_formats,
1125 };
1126
1127 /* -----------------------------------------------------------------------------
1128  * Media entity operations
1129  */
1130
1131 /*
1132  * csi2_link_setup - Setup CSI2 connections.
1133  * @entity : Pointer to media entity structure
1134  * @local  : Pointer to local pad array
1135  * @remote : Pointer to remote pad array
1136  * @flags  : Link flags
1137  * return -EINVAL or zero on success
1138  */
1139 static int csi2_link_setup(struct media_entity *entity,
1140                            const struct media_pad *local,
1141                            const struct media_pad *remote, u32 flags)
1142 {
1143         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1144         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
1145         struct isp_csi2_ctrl_cfg *ctrl = &csi2->ctrl;
1146
1147         /*
1148          * The ISP core doesn't support pipelines with multiple video outputs.
1149          * Revisit this when it will be implemented, and return -EBUSY for now.
1150          */
1151
1152         switch (local->index | media_entity_type(remote->entity)) {
1153         case CSI2_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
1154                 if (flags & MEDIA_LNK_FL_ENABLED) {
1155                         if (csi2->output & ~CSI2_OUTPUT_MEMORY)
1156                                 return -EBUSY;
1157                         csi2->output |= CSI2_OUTPUT_MEMORY;
1158                 } else {
1159                         csi2->output &= ~CSI2_OUTPUT_MEMORY;
1160                 }
1161                 break;
1162
1163         case CSI2_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
1164                 if (flags & MEDIA_LNK_FL_ENABLED) {
1165                         if (csi2->output & ~CSI2_OUTPUT_CCDC)
1166                                 return -EBUSY;
1167                         csi2->output |= CSI2_OUTPUT_CCDC;
1168                 } else {
1169                         csi2->output &= ~CSI2_OUTPUT_CCDC;
1170                 }
1171                 break;
1172
1173         default:
1174                 /* Link from camera to CSI2 is fixed... */
1175                 return -EINVAL;
1176         }
1177
1178         ctrl->vp_only_enable =
1179                 (csi2->output & CSI2_OUTPUT_MEMORY) ? false : true;
1180         ctrl->vp_clk_enable = !!(csi2->output & CSI2_OUTPUT_CCDC);
1181
1182         return 0;
1183 }
1184
1185 /* media operations */
1186 static const struct media_entity_operations csi2_media_ops = {
1187         .link_setup = csi2_link_setup,
1188 };
1189
1190 /*
1191  * csi2_init_entities - Initialize subdev and media entity.
1192  * @csi2: Pointer to csi2 structure.
1193  * return -ENOMEM or zero on success
1194  */
1195 static int csi2_init_entities(struct isp_csi2_device *csi2)
1196 {
1197         struct v4l2_subdev *sd = &csi2->subdev;
1198         struct media_pad *pads = csi2->pads;
1199         struct media_entity *me = &sd->entity;
1200         int ret;
1201
1202         v4l2_subdev_init(sd, &csi2_ops);
1203         sd->internal_ops = &csi2_internal_ops;
1204         strlcpy(sd->name, "OMAP3 ISP CSI2a", sizeof(sd->name));
1205
1206         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
1207         v4l2_set_subdevdata(sd, csi2);
1208         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1209
1210         pads[CSI2_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1211         pads[CSI2_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1212
1213         me->ops = &csi2_media_ops;
1214         ret = media_entity_init(me, CSI2_PADS_NUM, pads, 0);
1215         if (ret < 0)
1216                 return ret;
1217
1218         csi2_init_formats(sd, NULL);
1219
1220         /* Video device node */
1221         csi2->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1222         csi2->video_out.ops = &csi2_ispvideo_ops;
1223         csi2->video_out.bpl_alignment = 32;
1224         csi2->video_out.bpl_zero_padding = 1;
1225         csi2->video_out.bpl_max = 0x1ffe0;
1226         csi2->video_out.isp = csi2->isp;
1227         csi2->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
1228
1229         ret = omap3isp_video_init(&csi2->video_out, "CSI2a");
1230         if (ret < 0)
1231                 return ret;
1232
1233         /* Connect the CSI2 subdev to the video node. */
1234         ret = media_entity_create_link(&csi2->subdev.entity, CSI2_PAD_SOURCE,
1235                                        &csi2->video_out.video.entity, 0, 0);
1236         if (ret < 0)
1237                 return ret;
1238
1239         return 0;
1240 }
1241
1242 void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2)
1243 {
1244         media_entity_cleanup(&csi2->subdev.entity);
1245
1246         v4l2_device_unregister_subdev(&csi2->subdev);
1247         omap3isp_video_unregister(&csi2->video_out);
1248 }
1249
1250 int omap3isp_csi2_register_entities(struct isp_csi2_device *csi2,
1251                                     struct v4l2_device *vdev)
1252 {
1253         int ret;
1254
1255         /* Register the subdev and video nodes. */
1256         ret = v4l2_device_register_subdev(vdev, &csi2->subdev);
1257         if (ret < 0)
1258                 goto error;
1259
1260         ret = omap3isp_video_register(&csi2->video_out, vdev);
1261         if (ret < 0)
1262                 goto error;
1263
1264         return 0;
1265
1266 error:
1267         omap3isp_csi2_unregister_entities(csi2);
1268         return ret;
1269 }
1270
1271 /* -----------------------------------------------------------------------------
1272  * ISP CSI2 initialisation and cleanup
1273  */
1274
1275 /*
1276  * omap3isp_csi2_cleanup - Routine for module driver cleanup
1277  */
1278 void omap3isp_csi2_cleanup(struct isp_device *isp)
1279 {
1280 }
1281
1282 /*
1283  * omap3isp_csi2_init - Routine for module driver init
1284  */
1285 int omap3isp_csi2_init(struct isp_device *isp)
1286 {
1287         struct isp_csi2_device *csi2a = &isp->isp_csi2a;
1288         struct isp_csi2_device *csi2c = &isp->isp_csi2c;
1289         int ret;
1290
1291         csi2a->isp = isp;
1292         csi2a->available = 1;
1293         csi2a->regs1 = OMAP3_ISP_IOMEM_CSI2A_REGS1;
1294         csi2a->regs2 = OMAP3_ISP_IOMEM_CSI2A_REGS2;
1295         csi2a->phy = &isp->isp_csiphy2;
1296         csi2a->state = ISP_PIPELINE_STREAM_STOPPED;
1297         init_waitqueue_head(&csi2a->wait);
1298
1299         ret = csi2_init_entities(csi2a);
1300         if (ret < 0)
1301                 goto fail;
1302
1303         if (isp->revision == ISP_REVISION_15_0) {
1304                 csi2c->isp = isp;
1305                 csi2c->available = 1;
1306                 csi2c->regs1 = OMAP3_ISP_IOMEM_CSI2C_REGS1;
1307                 csi2c->regs2 = OMAP3_ISP_IOMEM_CSI2C_REGS2;
1308                 csi2c->phy = &isp->isp_csiphy1;
1309                 csi2c->state = ISP_PIPELINE_STREAM_STOPPED;
1310                 init_waitqueue_head(&csi2c->wait);
1311         }
1312
1313         return 0;
1314 fail:
1315         omap3isp_csi2_cleanup(isp);
1316         return ret;
1317 }