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sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / bnx2x / bnx2x_dcb.c
blob0f8309233ff21d055b14dd9b7d80d707d0aa95da
1 /* bnx2x_dcb.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2011 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Dmitry Kravkov
17 *
18 */
19 #include <linux/netdevice.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22 #ifdef BCM_DCBNL
23 #include <linux/dcbnl.h>
24 #endif
25
26 #include "bnx2x.h"
27 #include "bnx2x_cmn.h"
28 #include "bnx2x_dcb.h"
29
30
31 /* forward declarations of dcbx related functions */
32 static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
33 static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
34 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
35 static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
36 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
37 u32 *set_configuration_ets_pg,
38 u32 *pri_pg_tbl);
39 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
40 u32 *pg_pri_orginal_spread,
41 struct pg_help_data *help_data);
42 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
43 struct pg_help_data *help_data,
44 struct dcbx_ets_feature *ets,
45 u32 *pg_pri_orginal_spread);
46 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
47 struct cos_help_data *cos_data,
48 u32 *pg_pri_orginal_spread,
49 struct dcbx_ets_feature *ets);
50 static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp);
51
52
53 static void bnx2x_pfc_set(struct bnx2x *bp)
54 {
55 struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
56 u32 pri_bit, val = 0;
57 u8 pri;
58
59 /* Tx COS configuration */
60 if (bp->dcbx_port_params.ets.cos_params[0].pauseable)
61 pfc_params.rx_cos0_priority_mask =
62 bp->dcbx_port_params.ets.cos_params[0].pri_bitmask;
63 if (bp->dcbx_port_params.ets.cos_params[1].pauseable)
64 pfc_params.rx_cos1_priority_mask =
65 bp->dcbx_port_params.ets.cos_params[1].pri_bitmask;
66
67
68 /**
69 * Rx COS configuration
70 * Changing PFC RX configuration .
71 * In RX COS0 will always be configured to lossy and COS1 to lossless
72 */
73 for (pri = 0 ; pri < MAX_PFC_PRIORITIES ; pri++) {
74 pri_bit = 1 << pri;
75
76 if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
77 val |= 1 << (pri * 4);
78 }
79
80 pfc_params.pkt_priority_to_cos = val;
81
82 /* RX COS0 */
83 pfc_params.llfc_low_priority_classes = 0;
84 /* RX COS1 */
85 pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
86
87 /* BRB configuration */
88 pfc_params.cos0_pauseable = false;
89 pfc_params.cos1_pauseable = true;
90
91 bnx2x_acquire_phy_lock(bp);
92 bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
93 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
94 bnx2x_release_phy_lock(bp);
95 }
96
97 static void bnx2x_pfc_clear(struct bnx2x *bp)
98 {
99 struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
100 nig_params.pause_enable = 1;
101 #ifdef BNX2X_SAFC
102 if (bp->flags & SAFC_TX_FLAG) {
103 u32 high = 0, low = 0;
104 int i;
105
106 for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
107 if (bp->pri_map[i] == 1)
108 high |= (1 << i);
109 if (bp->pri_map[i] == 0)
110 low |= (1 << i);
111 }
112
113 nig_params.llfc_low_priority_classes = high;
114 nig_params.llfc_low_priority_classes = low;
115
116 nig_params.pause_enable = 0;
117 nig_params.llfc_enable = 1;
118 nig_params.llfc_out_en = 1;
119 }
120 #endif /* BNX2X_SAFC */
121 bnx2x_acquire_phy_lock(bp);
122 bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
123 bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
124 bnx2x_release_phy_lock(bp);
125 }
126
127 static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
128 struct dcbx_features *features,
129 u32 error)
130 {
131 u8 i = 0;
132 DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
133
134 /* PG */
135 DP(NETIF_MSG_LINK,
136 "local_mib.features.ets.enabled %x\n", features->ets.enabled);
137 for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
138 DP(NETIF_MSG_LINK,
139 "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
140 DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
141 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
142 DP(NETIF_MSG_LINK,
143 "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
144 DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
145
146 /* pfc */
147 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
148 features->pfc.pri_en_bitmap);
149 DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
150 features->pfc.pfc_caps);
151 DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
152 features->pfc.enabled);
153
154 DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
155 features->app.default_pri);
156 DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
157 features->app.tc_supported);
158 DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
159 features->app.enabled);
160 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
161 DP(NETIF_MSG_LINK,
162 "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
163 i, features->app.app_pri_tbl[i].app_id);
164 DP(NETIF_MSG_LINK,
165 "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
166 i, features->app.app_pri_tbl[i].pri_bitmap);
167 DP(NETIF_MSG_LINK,
168 "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
169 i, features->app.app_pri_tbl[i].appBitfield);
170 }
171 }
172
173 static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
174 u8 pri_bitmap,
175 u8 llfc_traf_type)
176 {
177 u32 pri = MAX_PFC_PRIORITIES;
178 u32 index = MAX_PFC_PRIORITIES - 1;
179 u32 pri_mask;
180 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
181
182 /* Choose the highest priority */
183 while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
184 pri_mask = 1 << index;
185 if (GET_FLAGS(pri_bitmap, pri_mask))
186 pri = index ;
187 index--;
188 }
189
190 if (pri < MAX_PFC_PRIORITIES)
191 ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
192 }
193
194 static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
195 struct dcbx_app_priority_feature *app,
196 u32 error) {
197 u8 index;
198 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
199
200 if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
201 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
202
203 if (app->enabled && !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) {
204
205 bp->dcbx_port_params.app.enabled = true;
206
207 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
208 ttp[index] = 0;
209
210 if (app->default_pri < MAX_PFC_PRIORITIES)
211 ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
212
213 for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
214 struct dcbx_app_priority_entry *entry =
215 app->app_pri_tbl;
216
217 if (GET_FLAGS(entry[index].appBitfield,
218 DCBX_APP_SF_ETH_TYPE) &&
219 ETH_TYPE_FCOE == entry[index].app_id)
220 bnx2x_dcbx_get_ap_priority(bp,
221 entry[index].pri_bitmap,
222 LLFC_TRAFFIC_TYPE_FCOE);
223
224 if (GET_FLAGS(entry[index].appBitfield,
225 DCBX_APP_SF_PORT) &&
226 TCP_PORT_ISCSI == entry[index].app_id)
227 bnx2x_dcbx_get_ap_priority(bp,
228 entry[index].pri_bitmap,
229 LLFC_TRAFFIC_TYPE_ISCSI);
230 }
231 } else {
232 DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
233 bp->dcbx_port_params.app.enabled = false;
234 for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
235 ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
236 }
237 }
238
239 static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
240 struct dcbx_ets_feature *ets,
241 u32 error) {
242 int i = 0;
243 u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
244 struct pg_help_data pg_help_data;
245 struct bnx2x_dcbx_cos_params *cos_params =
246 bp->dcbx_port_params.ets.cos_params;
247
248 memset(&pg_help_data, 0, sizeof(struct pg_help_data));
249
250
251 if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
252 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
253
254
255 /* Clean up old settings of ets on COS */
256 for (i = 0; i < E2_NUM_OF_COS ; i++) {
257
258 cos_params[i].pauseable = false;
259 cos_params[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
260 cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
261 cos_params[i].pri_bitmask = DCBX_PFC_PRI_GET_NON_PAUSE(bp, 0);
262 }
263
264 if (bp->dcbx_port_params.app.enabled &&
265 !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
266 ets->enabled) {
267 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
268 bp->dcbx_port_params.ets.enabled = true;
269
270 bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
271 pg_pri_orginal_spread,
272 ets->pri_pg_tbl);
273
274 bnx2x_dcbx_get_num_pg_traf_type(bp,
275 pg_pri_orginal_spread,
276 &pg_help_data);
277
278 bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
279 ets, pg_pri_orginal_spread);
280
281 } else {
282 DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
283 bp->dcbx_port_params.ets.enabled = false;
284 ets->pri_pg_tbl[0] = 0;
285
286 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
287 DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
288 }
289 }
290
291 static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
292 struct dcbx_pfc_feature *pfc, u32 error)
293 {
294
295 if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
296 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
297
298 if (bp->dcbx_port_params.app.enabled &&
299 !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR) &&
300 pfc->enabled) {
301 bp->dcbx_port_params.pfc.enabled = true;
302 bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
303 ~(pfc->pri_en_bitmap);
304 } else {
305 DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
306 bp->dcbx_port_params.pfc.enabled = false;
307 bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
308 }
309 }
310
311 static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
312 struct dcbx_features *features,
313 u32 error)
314 {
315 bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
316
317 bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
318
319 bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
320 }
321
322 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
323 static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
324 u32 *base_mib_addr,
325 u32 offset,
326 int read_mib_type)
327 {
328 int max_try_read = 0, i;
329 u32 *buff, mib_size, prefix_seq_num, suffix_seq_num;
330 struct lldp_remote_mib *remote_mib ;
331 struct lldp_local_mib *local_mib;
332
333
334 switch (read_mib_type) {
335 case DCBX_READ_LOCAL_MIB:
336 mib_size = sizeof(struct lldp_local_mib);
337 break;
338 case DCBX_READ_REMOTE_MIB:
339 mib_size = sizeof(struct lldp_remote_mib);
340 break;
341 default:
342 return 1; /*error*/
343 }
344
345 offset += BP_PORT(bp) * mib_size;
346
347 do {
348 buff = base_mib_addr;
349 for (i = 0; i < mib_size; i += 4, buff++)
350 *buff = REG_RD(bp, offset + i);
351
352 max_try_read++;
353
354 switch (read_mib_type) {
355 case DCBX_READ_LOCAL_MIB:
356 local_mib = (struct lldp_local_mib *) base_mib_addr;
357 prefix_seq_num = local_mib->prefix_seq_num;
358 suffix_seq_num = local_mib->suffix_seq_num;
359 break;
360 case DCBX_READ_REMOTE_MIB:
361 remote_mib = (struct lldp_remote_mib *) base_mib_addr;
362 prefix_seq_num = remote_mib->prefix_seq_num;
363 suffix_seq_num = remote_mib->suffix_seq_num;
364 break;
365 default:
366 return 1; /*error*/
367 }
368 } while ((prefix_seq_num != suffix_seq_num) &&
369 (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
370
371 if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
372 BNX2X_ERR("MIB could not be read\n");
373 return 1;
374 }
375
376 return 0;
377 }
378
379 static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
380 {
381 if (CHIP_IS_E2(bp)) {
382 if (BP_PORT(bp)) {
383 BNX2X_ERR("4 port mode is not supported");
384 return;
385 }
386
387 if (bp->dcbx_port_params.pfc.enabled)
388
389 /* 1. Fills up common PFC structures if required.*/
390 /* 2. Configure NIG, MAC and BRB via the elink:
391 * elink must first check if BMAC is not in reset
392 * and only then configures the BMAC
393 * Or, configure EMAC.
394 */
395 bnx2x_pfc_set(bp);
396
397 else
398 bnx2x_pfc_clear(bp);
399 }
400 }
401
402 static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
403 {
404 DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n");
405 bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
406 0 /* connectionless */,
407 0 /* dataHi is zero */,
408 0 /* dataLo is zero */,
409 1 /* common */);
410 }
411
412 static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
413 {
414 bnx2x_pfc_fw_struct_e2(bp);
415 DP(NETIF_MSG_LINK, "sending START TRAFFIC\n");
416 bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC,
417 0, /* connectionless */
418 U64_HI(bnx2x_sp_mapping(bp, pfc_config)),
419 U64_LO(bnx2x_sp_mapping(bp, pfc_config)),
420 1 /* commmon */);
421 }
422
423 static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
424 {
425 struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
426 u8 status = 0;
427
428 bnx2x_ets_disabled(&bp->link_params);
429
430 if (!ets->enabled)
431 return;
432
433 if ((ets->num_of_cos == 0) || (ets->num_of_cos > E2_NUM_OF_COS)) {
434 BNX2X_ERR("illegal num of cos= %x", ets->num_of_cos);
435 return;
436 }
437
438 /* valid COS entries */
439 if (ets->num_of_cos == 1) /* no ETS */
440 return;
441
442 /* sanity */
443 if (((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[0].strict) &&
444 (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
445 ((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[1].strict) &&
446 (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
447 BNX2X_ERR("all COS should have at least bw_limit or strict"
448 "ets->cos_params[0].strict= %x"
449 "ets->cos_params[0].bw_tbl= %x"
450 "ets->cos_params[1].strict= %x"
451 "ets->cos_params[1].bw_tbl= %x",
452 ets->cos_params[0].strict,
453 ets->cos_params[0].bw_tbl,
454 ets->cos_params[1].strict,
455 ets->cos_params[1].bw_tbl);
456 return;
457 }
458 /* If we join a group and there is bw_tbl and strict then bw rules */
459 if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
460 (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
461 u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
462 u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
463 /* Do not allow 0-100 configuration
464 * since PBF does not support it
465 * force 1-99 instead
466 */
467 if (bw_tbl_0 == 0) {
468 bw_tbl_0 = 1;
469 bw_tbl_1 = 99;
470 } else if (bw_tbl_1 == 0) {
471 bw_tbl_1 = 1;
472 bw_tbl_0 = 99;
473 }
474
475 bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
476 } else {
477 if (ets->cos_params[0].strict == BNX2X_DCBX_COS_HIGH_STRICT)
478 status = bnx2x_ets_strict(&bp->link_params, 0);
479 else if (ets->cos_params[1].strict
480 == BNX2X_DCBX_COS_HIGH_STRICT)
481 status = bnx2x_ets_strict(&bp->link_params, 1);
482
483 if (status)
484 BNX2X_ERR("update_ets_params failed\n");
485 }
486 }
487
488 static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
489 {
490 struct lldp_local_mib local_mib = {0};
491 u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
492 int rc;
493
494 DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
495
496 if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
497 BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
498 return -EINVAL;
499 }
500 rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
501 DCBX_READ_LOCAL_MIB);
502
503 if (rc) {
504 BNX2X_ERR("Faild to read local mib from FW\n");
505 return rc;
506 }
507
508 /* save features and error */
509 bp->dcbx_local_feat = local_mib.features;
510 bp->dcbx_error = local_mib.error;
511 return 0;
512 }
513
514
515 #ifdef BCM_DCBNL
516 static inline
517 u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
518 {
519 u8 pri;
520
521 /* Choose the highest priority */
522 for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
523 if (ent->pri_bitmap & (1 << pri))
524 break;
525 return pri;
526 }
527
528 static inline
529 u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
530 {
531 return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
532 DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
533 DCB_APP_IDTYPE_ETHTYPE;
534 }
535
536 static inline
537 void bnx2x_dcbx_invalidate_local_apps(struct bnx2x *bp)
538 {
539 int i;
540 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
541 bp->dcbx_local_feat.app.app_pri_tbl[i].appBitfield &=
542 ~DCBX_APP_ENTRY_VALID;
543 }
544
545 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
546 {
547 int i, err = 0;
548
549 for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
550 struct dcbx_app_priority_entry *ent =
551 &bp->dcbx_local_feat.app.app_pri_tbl[i];
552
553 if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
554 u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
555
556 /* avoid invalid user-priority */
557 if (up) {
558 struct dcb_app app;
559 app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
560 app.protocol = ent->app_id;
561 app.priority = delall ? 0 : up;
562 err = dcb_setapp(bp->dev, &app);
563 }
564 }
565 }
566 return err;
567 }
568 #endif
569
570 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
571 {
572 switch (state) {
573 case BNX2X_DCBX_STATE_NEG_RECEIVED:
574 #ifdef BCM_CNIC
575 if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
576 struct cnic_ops *c_ops;
577 struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
578 bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG;
579 cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO;
580 cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI;
581
582 rcu_read_lock();
583 c_ops = rcu_dereference(bp->cnic_ops);
584 if (c_ops) {
585 bnx2x_cnic_notify(bp, CNIC_CTL_STOP_ISCSI_CMD);
586 rcu_read_unlock();
587 return;
588 }
589 rcu_read_unlock();
590 }
591
592 /* fall through if no CNIC initialized */
593 case BNX2X_DCBX_STATE_ISCSI_STOPPED:
594 #endif
595
596 {
597 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
598 #ifdef BCM_DCBNL
599 /**
600 * Delete app tlvs from dcbnl before reading new
601 * negotiation results
602 */
603 bnx2x_dcbnl_update_applist(bp, true);
604 #endif
605 /* Read neg results if dcbx is in the FW */
606 if (bnx2x_dcbx_read_shmem_neg_results(bp))
607 return;
608
609 bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
610 bp->dcbx_error);
611
612 bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
613 bp->dcbx_error);
614
615 if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
616 #ifdef BCM_DCBNL
617 /**
618 * Add new app tlvs to dcbnl
619 */
620 bnx2x_dcbnl_update_applist(bp, false);
621 #endif
622 bnx2x_dcbx_stop_hw_tx(bp);
623 return;
624 }
625 /* fall through */
626 #ifdef BCM_DCBNL
627 /**
628 * Invalidate the local app tlvs if they are not added
629 * to the dcbnl app list to avoid deleting them from
630 * the list later on
631 */
632 bnx2x_dcbx_invalidate_local_apps(bp);
633 #endif
634 }
635 case BNX2X_DCBX_STATE_TX_PAUSED:
636 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
637 bnx2x_pfc_set_pfc(bp);
638
639 bnx2x_dcbx_update_ets_params(bp);
640 if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
641 bnx2x_dcbx_resume_hw_tx(bp);
642 return;
643 }
644 /* fall through */
645 case BNX2X_DCBX_STATE_TX_RELEASED:
646 DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
647 if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD)
648 bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
649
650 return;
651 default:
652 BNX2X_ERR("Unknown DCBX_STATE\n");
653 }
654 }
655
656
657 #define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\
658 sizeof(struct lldp_dcbx_stat))
659
660 /* calculate struct offset in array according to chip information */
661 #define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params))
662
663 #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
664 BP_PORT(bp)*sizeof(struct lldp_admin_mib))
665
666 static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp,
667 u32 dcbx_lldp_params_offset)
668 {
669 struct lldp_params lldp_params = {0};
670 u32 i = 0, *buff = NULL;
671 u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp);
672
673 DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset);
674
675 if ((bp->lldp_config_params.overwrite_settings ==
676 BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) {
677 /* Read the data first */
678 buff = (u32 *)&lldp_params;
679 for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
680 *buff = REG_RD(bp, (offset + i));
681
682 lldp_params.msg_tx_hold =
683 (u8)bp->lldp_config_params.msg_tx_hold;
684 lldp_params.msg_fast_tx_interval =
685 (u8)bp->lldp_config_params.msg_fast_tx;
686 lldp_params.tx_crd_max =
687 (u8)bp->lldp_config_params.tx_credit_max;
688 lldp_params.msg_tx_interval =
689 (u8)bp->lldp_config_params.msg_tx_interval;
690 lldp_params.tx_fast =
691 (u8)bp->lldp_config_params.tx_fast;
692
693 /* Write the data.*/
694 buff = (u32 *)&lldp_params;
695 for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
696 REG_WR(bp, (offset + i) , *buff);
697
698
699 } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
700 bp->lldp_config_params.overwrite_settings)
701 bp->lldp_config_params.overwrite_settings =
702 BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
703 }
704
705 static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
706 u32 dcbx_lldp_params_offset)
707 {
708 struct lldp_admin_mib admin_mib;
709 u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
710 u32 *buff;
711 u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
712
713 /*shortcuts*/
714 struct dcbx_features *af = &admin_mib.features;
715 struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
716
717 memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
718 buff = (u32 *)&admin_mib;
719 /* Read the data first */
720 for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
721 *buff = REG_RD(bp, (offset + i));
722
723 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
724 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
725 else
726 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
727
728 if ((BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
729 dp->overwrite_settings)) {
730 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
731 admin_mib.ver_cfg_flags |=
732 (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
733 DCBX_CEE_VERSION_MASK;
734
735 af->ets.enabled = (u8)dp->admin_ets_enable;
736
737 af->pfc.enabled = (u8)dp->admin_pfc_enable;
738
739 /* FOR IEEE dp->admin_tc_supported_tx_enable */
740 if (dp->admin_ets_configuration_tx_enable)
741 SET_FLAGS(admin_mib.ver_cfg_flags,
742 DCBX_ETS_CONFIG_TX_ENABLED);
743 else
744 RESET_FLAGS(admin_mib.ver_cfg_flags,
745 DCBX_ETS_CONFIG_TX_ENABLED);
746 /* For IEEE admin_ets_recommendation_tx_enable */
747 if (dp->admin_pfc_tx_enable)
748 SET_FLAGS(admin_mib.ver_cfg_flags,
749 DCBX_PFC_CONFIG_TX_ENABLED);
750 else
751 RESET_FLAGS(admin_mib.ver_cfg_flags,
752 DCBX_PFC_CONFIG_TX_ENABLED);
753
754 if (dp->admin_application_priority_tx_enable)
755 SET_FLAGS(admin_mib.ver_cfg_flags,
756 DCBX_APP_CONFIG_TX_ENABLED);
757 else
758 RESET_FLAGS(admin_mib.ver_cfg_flags,
759 DCBX_APP_CONFIG_TX_ENABLED);
760
761 if (dp->admin_ets_willing)
762 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
763 else
764 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
765 /* For IEEE admin_ets_reco_valid */
766 if (dp->admin_pfc_willing)
767 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
768 else
769 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
770
771 if (dp->admin_app_priority_willing)
772 SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
773 else
774 RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
775
776 for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
777 DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
778 (u8)dp->admin_configuration_bw_precentage[i]);
779
780 DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
781 i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
782 }
783
784 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
785 DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
786 (u8)dp->admin_configuration_ets_pg[i]);
787
788 DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
789 i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
790 }
791
792 /*For IEEE admin_recommendation_bw_precentage
793 *For IEEE admin_recommendation_ets_pg */
794 af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
795 for (i = 0; i < 4; i++) {
796 if (dp->admin_priority_app_table[i].valid) {
797 struct bnx2x_admin_priority_app_table *table =
798 dp->admin_priority_app_table;
799 if ((ETH_TYPE_FCOE == table[i].app_id) &&
800 (TRAFFIC_TYPE_ETH == table[i].traffic_type))
801 traf_type = FCOE_APP_IDX;
802 else if ((TCP_PORT_ISCSI == table[i].app_id) &&
803 (TRAFFIC_TYPE_PORT == table[i].traffic_type))
804 traf_type = ISCSI_APP_IDX;
805 else
806 traf_type = other_traf_type++;
807
808 af->app.app_pri_tbl[traf_type].app_id =
809 table[i].app_id;
810
811 af->app.app_pri_tbl[traf_type].pri_bitmap =
812 (u8)(1 << table[i].priority);
813
814 af->app.app_pri_tbl[traf_type].appBitfield =
815 (DCBX_APP_ENTRY_VALID);
816
817 af->app.app_pri_tbl[traf_type].appBitfield |=
818 (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
819 DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
820 }
821 }
822
823 af->app.default_pri = (u8)dp->admin_default_priority;
824
825 } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
826 dp->overwrite_settings)
827 dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
828
829 /* Write the data. */
830 buff = (u32 *)&admin_mib;
831 for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
832 REG_WR(bp, (offset + i), *buff);
833 }
834
835 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
836 {
837 if (CHIP_IS_E2(bp) && !CHIP_MODE_IS_4_PORT(bp)) {
838 bp->dcb_state = dcb_on;
839 bp->dcbx_enabled = dcbx_enabled;
840 } else {
841 bp->dcb_state = false;
842 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
843 }
844 DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
845 dcb_on ? "ON" : "OFF",
846 dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
847 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
848 dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
849 "on-chip with negotiation" : "invalid");
850 }
851
852 void bnx2x_dcbx_init_params(struct bnx2x *bp)
853 {
854 bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
855 bp->dcbx_config_params.admin_ets_willing = 1;
856 bp->dcbx_config_params.admin_pfc_willing = 1;
857 bp->dcbx_config_params.overwrite_settings = 1;
858 bp->dcbx_config_params.admin_ets_enable = 1;
859 bp->dcbx_config_params.admin_pfc_enable = 1;
860 bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
861 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
862 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
863 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
864 bp->dcbx_config_params.admin_ets_reco_valid = 1;
865 bp->dcbx_config_params.admin_app_priority_willing = 1;
866 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
867 bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
868 bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
869 bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
870 bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
871 bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
872 bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
873 bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
874 bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
875 bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
876 bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
877 bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
878 bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
879 bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
880 bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
881 bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
882 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
883 bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
884 bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
885 bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
886 bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
887 bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
888 bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
889 bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
890 bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
891 bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
892 bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
893 bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
894 bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
895 bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
896 bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
897 bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
898 bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
899 bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
900 bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
901 bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
902 bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
903 bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
904 bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
905 bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
906 bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
907 bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
908 bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
909 bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
910 bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
911 bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
912 bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
913 bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
914 bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
915 bp->dcbx_config_params.admin_default_priority =
916 bp->dcbx_config_params.admin_priority_app_table[1].priority;
917 }
918
919 void bnx2x_dcbx_init(struct bnx2x *bp)
920 {
921 u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
922
923 if (bp->dcbx_enabled <= 0)
924 return;
925
926 /* validate:
927 * chip of good for dcbx version,
928 * dcb is wanted
929 * the function is pmf
930 * shmem2 contains DCBX support fields
931 */
932 DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
933 bp->dcb_state, bp->port.pmf);
934
935 if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
936 SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
937 dcbx_lldp_params_offset =
938 SHMEM2_RD(bp, dcbx_lldp_params_offset);
939
940 DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
941 dcbx_lldp_params_offset);
942
943 if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
944 bnx2x_dcbx_lldp_updated_params(bp,
945 dcbx_lldp_params_offset);
946
947 bnx2x_dcbx_admin_mib_updated_params(bp,
948 dcbx_lldp_params_offset);
949
950 /* set default configuration BC has */
951 bnx2x_dcbx_set_params(bp,
952 BNX2X_DCBX_STATE_NEG_RECEIVED);
953
954 bnx2x_fw_command(bp,
955 DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
956 }
957 }
958 }
959
960 void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp)
961 {
962 struct priority_cos pricos[MAX_PFC_TRAFFIC_TYPES];
963 u32 i = 0, addr;
964 memset(pricos, 0, sizeof(pricos));
965 /* Default initialization */
966 for (i = 0; i < MAX_PFC_TRAFFIC_TYPES; i++)
967 pricos[i].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
968
969 /* Store per port struct to internal memory */
970 addr = BAR_XSTRORM_INTMEM +
971 XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
972 offsetof(struct cmng_struct_per_port,
973 traffic_type_to_priority_cos);
974 __storm_memset_struct(bp, addr, sizeof(pricos), (u32 *)pricos);
975
976
977 /* LLFC disabled.*/
978 REG_WR8(bp , BAR_XSTRORM_INTMEM +
979 XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
980 offsetof(struct cmng_struct_per_port, llfc_mode),
981 LLFC_MODE_NONE);
982
983 /* DCBX disabled.*/
984 REG_WR8(bp , BAR_XSTRORM_INTMEM +
985 XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
986 offsetof(struct cmng_struct_per_port, dcb_enabled),
987 DCB_DISABLED);
988 }
989
990 static void
991 bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
992 struct flow_control_configuration *pfc_fw_cfg)
993 {
994 u8 pri = 0;
995 u8 cos = 0;
996
997 DP(NETIF_MSG_LINK,
998 "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
999 DP(NETIF_MSG_LINK,
1000 "pdev->params.dcbx_port_params.pfc."
1001 "priority_non_pauseable_mask %x\n",
1002 bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
1003
1004 for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
1005 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1006 "cos_params[%d].pri_bitmask %x\n", cos,
1007 bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
1008
1009 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1010 "cos_params[%d].bw_tbl %x\n", cos,
1011 bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
1012
1013 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1014 "cos_params[%d].strict %x\n", cos,
1015 bp->dcbx_port_params.ets.cos_params[cos].strict);
1016
1017 DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
1018 "cos_params[%d].pauseable %x\n", cos,
1019 bp->dcbx_port_params.ets.cos_params[cos].pauseable);
1020 }
1021
1022 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1023 DP(NETIF_MSG_LINK,
1024 "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
1025 "priority %x\n", pri,
1026 pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
1027
1028 DP(NETIF_MSG_LINK,
1029 "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
1030 pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
1031 }
1032 }
1033
1034 /* fills help_data according to pg_info */
1035 static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
1036 u32 *pg_pri_orginal_spread,
1037 struct pg_help_data *help_data)
1038 {
1039 bool pg_found = false;
1040 u32 i, traf_type, add_traf_type, add_pg;
1041 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1042 struct pg_entry_help_data *data = help_data->data; /*shotcut*/
1043
1044 /* Set to invalid */
1045 for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
1046 data[i].pg = DCBX_ILLEGAL_PG;
1047
1048 for (add_traf_type = 0;
1049 add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
1050 pg_found = false;
1051 if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
1052 add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
1053 for (traf_type = 0;
1054 traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1055 traf_type++) {
1056 if (data[traf_type].pg == add_pg) {
1057 if (!(data[traf_type].pg_priority &
1058 (1 << ttp[add_traf_type])))
1059 data[traf_type].
1060 num_of_dif_pri++;
1061 data[traf_type].pg_priority |=
1062 (1 << ttp[add_traf_type]);
1063 pg_found = true;
1064 break;
1065 }
1066 }
1067 if (false == pg_found) {
1068 data[help_data->num_of_pg].pg = add_pg;
1069 data[help_data->num_of_pg].pg_priority =
1070 (1 << ttp[add_traf_type]);
1071 data[help_data->num_of_pg].num_of_dif_pri = 1;
1072 help_data->num_of_pg++;
1073 }
1074 }
1075 DP(NETIF_MSG_LINK,
1076 "add_traf_type %d pg_found %s num_of_pg %d\n",
1077 add_traf_type, (false == pg_found) ? "NO" : "YES",
1078 help_data->num_of_pg);
1079 }
1080 }
1081
1082 static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
1083 struct cos_help_data *cos_data,
1084 u32 pri_join_mask)
1085 {
1086 /* Only one priority than only one COS */
1087 cos_data->data[0].pausable =
1088 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1089 cos_data->data[0].pri_join_mask = pri_join_mask;
1090 cos_data->data[0].cos_bw = 100;
1091 cos_data->num_of_cos = 1;
1092 }
1093
1094 static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
1095 struct cos_entry_help_data *data,
1096 u8 pg_bw)
1097 {
1098 if (data->cos_bw == DCBX_INVALID_COS_BW)
1099 data->cos_bw = pg_bw;
1100 else
1101 data->cos_bw += pg_bw;
1102 }
1103
1104 static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
1105 struct cos_help_data *cos_data,
1106 u32 *pg_pri_orginal_spread,
1107 struct dcbx_ets_feature *ets)
1108 {
1109 u32 pri_tested = 0;
1110 u8 i = 0;
1111 u8 entry = 0;
1112 u8 pg_entry = 0;
1113 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1114
1115 cos_data->data[0].pausable = true;
1116 cos_data->data[1].pausable = false;
1117 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1118
1119 for (i = 0 ; i < num_of_pri ; i++) {
1120 pri_tested = 1 << bp->dcbx_port_params.
1121 app.traffic_type_priority[i];
1122
1123 if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
1124 cos_data->data[1].pri_join_mask |= pri_tested;
1125 entry = 1;
1126 } else {
1127 cos_data->data[0].pri_join_mask |= pri_tested;
1128 entry = 0;
1129 }
1130 pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
1131 app.traffic_type_priority[i]];
1132 /* There can be only one strict pg */
1133 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
1134 bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
1135 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
1136 else
1137 /* If we join a group and one is strict
1138 * than the bw rulls */
1139 cos_data->data[entry].strict =
1140 BNX2X_DCBX_COS_HIGH_STRICT;
1141 }
1142 if ((0 == cos_data->data[0].pri_join_mask) &&
1143 (0 == cos_data->data[1].pri_join_mask))
1144 BNX2X_ERR("dcbx error: Both groups must have priorities\n");
1145 }
1146
1147
1148 #ifndef POWER_OF_2
1149 #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
1150 #endif
1151
1152 static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp,
1153 struct pg_help_data *pg_help_data,
1154 struct cos_help_data *cos_data,
1155 u32 pri_join_mask,
1156 u8 num_of_dif_pri)
1157 {
1158 u8 i = 0;
1159 u32 pri_tested = 0;
1160 u32 pri_mask_without_pri = 0;
1161 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1162 /*debug*/
1163 if (num_of_dif_pri == 1) {
1164 bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
1165 return;
1166 }
1167 /* single priority group */
1168 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1169 /* If there are both pauseable and non-pauseable priorities,
1170 * the pauseable priorities go to the first queue and
1171 * the non-pauseable priorities go to the second queue.
1172 */
1173 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1174 /* Pauseable */
1175 cos_data->data[0].pausable = true;
1176 /* Non pauseable.*/
1177 cos_data->data[1].pausable = false;
1178
1179 if (2 == num_of_dif_pri) {
1180 cos_data->data[0].cos_bw = 50;
1181 cos_data->data[1].cos_bw = 50;
1182 }
1183
1184 if (3 == num_of_dif_pri) {
1185 if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
1186 pri_join_mask))) {
1187 cos_data->data[0].cos_bw = 33;
1188 cos_data->data[1].cos_bw = 67;
1189 } else {
1190 cos_data->data[0].cos_bw = 67;
1191 cos_data->data[1].cos_bw = 33;
1192 }
1193 }
1194
1195 } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
1196 /* If there are only pauseable priorities,
1197 * then one/two priorities go to the first queue
1198 * and one priority goes to the second queue.
1199 */
1200 if (2 == num_of_dif_pri) {
1201 cos_data->data[0].cos_bw = 50;
1202 cos_data->data[1].cos_bw = 50;
1203 } else {
1204 cos_data->data[0].cos_bw = 67;
1205 cos_data->data[1].cos_bw = 33;
1206 }
1207 cos_data->data[1].pausable = true;
1208 cos_data->data[0].pausable = true;
1209 /* All priorities except FCOE */
1210 cos_data->data[0].pri_join_mask = (pri_join_mask &
1211 ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
1212 /* Only FCOE priority.*/
1213 cos_data->data[1].pri_join_mask =
1214 (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
1215 } else
1216 /* If there are only non-pauseable priorities,
1217 * they will all go to the same queue.
1218 */
1219 bnx2x_dcbx_ets_disabled_entry_data(bp,
1220 cos_data, pri_join_mask);
1221 } else {
1222 /* priority group which is not BW limited (PG#15):*/
1223 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1224 /* If there are both pauseable and non-pauseable
1225 * priorities, the pauseable priorities go to the first
1226 * queue and the non-pauseable priorities
1227 * go to the second queue.
1228 */
1229 if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
1230 DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
1231 cos_data->data[0].strict =
1232 BNX2X_DCBX_COS_HIGH_STRICT;
1233 cos_data->data[1].strict =
1234 BNX2X_DCBX_COS_LOW_STRICT;
1235 } else {
1236 cos_data->data[0].strict =
1237 BNX2X_DCBX_COS_LOW_STRICT;
1238 cos_data->data[1].strict =
1239 BNX2X_DCBX_COS_HIGH_STRICT;
1240 }
1241 /* Pauseable */
1242 cos_data->data[0].pausable = true;
1243 /* Non pause-able.*/
1244 cos_data->data[1].pausable = false;
1245 } else {
1246 /* If there are only pauseable priorities or
1247 * only non-pauseable,* the lower priorities go
1248 * to the first queue and the higherpriorities go
1249 * to the second queue.
1250 */
1251 cos_data->data[0].pausable =
1252 cos_data->data[1].pausable =
1253 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1254
1255 for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
1256 pri_tested = 1 << bp->dcbx_port_params.
1257 app.traffic_type_priority[i];
1258 /* Remove priority tested */
1259 pri_mask_without_pri =
1260 (pri_join_mask & ((u8)(~pri_tested)));
1261 if (pri_mask_without_pri < pri_tested)
1262 break;
1263 }
1264
1265 if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
1266 BNX2X_ERR("Invalid value for pri_join_mask -"
1267 " could not find a priority\n");
1268
1269 cos_data->data[0].pri_join_mask = pri_mask_without_pri;
1270 cos_data->data[1].pri_join_mask = pri_tested;
1271 /* Both queues are strict priority,
1272 * and that with the highest priority
1273 * gets the highest strict priority in the arbiter.
1274 */
1275 cos_data->data[0].strict = BNX2X_DCBX_COS_LOW_STRICT;
1276 cos_data->data[1].strict = BNX2X_DCBX_COS_HIGH_STRICT;
1277 }
1278 }
1279 }
1280
1281 static void bnx2x_dcbx_two_pg_to_cos_params(
1282 struct bnx2x *bp,
1283 struct pg_help_data *pg_help_data,
1284 struct dcbx_ets_feature *ets,
1285 struct cos_help_data *cos_data,
1286 u32 *pg_pri_orginal_spread,
1287 u32 pri_join_mask,
1288 u8 num_of_dif_pri)
1289 {
1290 u8 i = 0;
1291 u8 pg[E2_NUM_OF_COS] = {0};
1292
1293 /* If there are both pauseable and non-pauseable priorities,
1294 * the pauseable priorities go to the first queue and
1295 * the non-pauseable priorities go to the second queue.
1296 */
1297 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
1298 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1299 pg_help_data->data[0].pg_priority) ||
1300 IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
1301 pg_help_data->data[1].pg_priority)) {
1302 /* If one PG contains both pauseable and
1303 * non-pauseable priorities then ETS is disabled.
1304 */
1305 bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
1306 pg_pri_orginal_spread, ets);
1307 bp->dcbx_port_params.ets.enabled = false;
1308 return;
1309 }
1310
1311 /* Pauseable */
1312 cos_data->data[0].pausable = true;
1313 /* Non pauseable. */
1314 cos_data->data[1].pausable = false;
1315 if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
1316 pg_help_data->data[0].pg_priority)) {
1317 /* 0 is pauseable */
1318 cos_data->data[0].pri_join_mask =
1319 pg_help_data->data[0].pg_priority;
1320 pg[0] = pg_help_data->data[0].pg;
1321 cos_data->data[1].pri_join_mask =
1322 pg_help_data->data[1].pg_priority;
1323 pg[1] = pg_help_data->data[1].pg;
1324 } else {/* 1 is pauseable */
1325 cos_data->data[0].pri_join_mask =
1326 pg_help_data->data[1].pg_priority;
1327 pg[0] = pg_help_data->data[1].pg;
1328 cos_data->data[1].pri_join_mask =
1329 pg_help_data->data[0].pg_priority;
1330 pg[1] = pg_help_data->data[0].pg;
1331 }
1332 } else {
1333 /* If there are only pauseable priorities or
1334 * only non-pauseable, each PG goes to a queue.
1335 */
1336 cos_data->data[0].pausable = cos_data->data[1].pausable =
1337 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1338 cos_data->data[0].pri_join_mask =
1339 pg_help_data->data[0].pg_priority;
1340 pg[0] = pg_help_data->data[0].pg;
1341 cos_data->data[1].pri_join_mask =
1342 pg_help_data->data[1].pg_priority;
1343 pg[1] = pg_help_data->data[1].pg;
1344 }
1345
1346 /* There can be only one strict pg */
1347 for (i = 0 ; i < E2_NUM_OF_COS; i++) {
1348 if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
1349 cos_data->data[i].cos_bw =
1350 DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
1351 else
1352 cos_data->data[i].strict = BNX2X_DCBX_COS_HIGH_STRICT;
1353 }
1354 }
1355
1356 static void bnx2x_dcbx_three_pg_to_cos_params(
1357 struct bnx2x *bp,
1358 struct pg_help_data *pg_help_data,
1359 struct dcbx_ets_feature *ets,
1360 struct cos_help_data *cos_data,
1361 u32 *pg_pri_orginal_spread,
1362 u32 pri_join_mask,
1363 u8 num_of_dif_pri)
1364 {
1365 u8 i = 0;
1366 u32 pri_tested = 0;
1367 u8 entry = 0;
1368 u8 pg_entry = 0;
1369 bool b_found_strict = false;
1370 u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
1371
1372 cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
1373 /* If there are both pauseable and non-pauseable priorities,
1374 * the pauseable priorities go to the first queue and the
1375 * non-pauseable priorities go to the second queue.
1376 */
1377 if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
1378 bnx2x_dcbx_separate_pauseable_from_non(bp,
1379 cos_data, pg_pri_orginal_spread, ets);
1380 else {
1381 /* If two BW-limited PG-s were combined to one queue,
1382 * the BW is their sum.
1383 *
1384 * If there are only pauseable priorities or only non-pauseable,
1385 * and there are both BW-limited and non-BW-limited PG-s,
1386 * the BW-limited PG/s go to one queue and the non-BW-limited
1387 * PG/s go to the second queue.
1388 *
1389 * If there are only pauseable priorities or only non-pauseable
1390 * and all are BW limited, then two priorities go to the first
1391 * queue and one priority goes to the second queue.
1392 *
1393 * We will join this two cases:
1394 * if one is BW limited it will go to the secoend queue
1395 * otherwise the last priority will get it
1396 */
1397
1398 cos_data->data[0].pausable = cos_data->data[1].pausable =
1399 IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
1400
1401 for (i = 0 ; i < num_of_pri; i++) {
1402 pri_tested = 1 << bp->dcbx_port_params.
1403 app.traffic_type_priority[i];
1404 pg_entry = (u8)pg_pri_orginal_spread[bp->
1405 dcbx_port_params.app.traffic_type_priority[i]];
1406
1407 if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
1408 entry = 0;
1409
1410 if (i == (num_of_pri-1) &&
1411 false == b_found_strict)
1412 /* last entry will be handled separately
1413 * If no priority is strict than last
1414 * enty goes to last queue.*/
1415 entry = 1;
1416 cos_data->data[entry].pri_join_mask |=
1417 pri_tested;
1418 bnx2x_dcbx_add_to_cos_bw(bp,
1419 &cos_data->data[entry],
1420 DCBX_PG_BW_GET(ets->pg_bw_tbl,
1421 pg_entry));
1422 } else {
1423 b_found_strict = true;
1424 cos_data->data[1].pri_join_mask |= pri_tested;
1425 /* If we join a group and one is strict
1426 * than the bw rulls */
1427 cos_data->data[1].strict =
1428 BNX2X_DCBX_COS_HIGH_STRICT;
1429 }
1430 }
1431 }
1432 }
1433
1434
1435 static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
1436 struct pg_help_data *help_data,
1437 struct dcbx_ets_feature *ets,
1438 u32 *pg_pri_orginal_spread)
1439 {
1440 struct cos_help_data cos_data ;
1441 u8 i = 0;
1442 u32 pri_join_mask = 0;
1443 u8 num_of_dif_pri = 0;
1444
1445 memset(&cos_data, 0, sizeof(cos_data));
1446 /* Validate the pg value */
1447 for (i = 0; i < help_data->num_of_pg ; i++) {
1448 if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
1449 DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
1450 BNX2X_ERR("Invalid pg[%d] data %x\n", i,
1451 help_data->data[i].pg);
1452 pri_join_mask |= help_data->data[i].pg_priority;
1453 num_of_dif_pri += help_data->data[i].num_of_dif_pri;
1454 }
1455
1456 /* default settings */
1457 cos_data.num_of_cos = 2;
1458 for (i = 0; i < E2_NUM_OF_COS ; i++) {
1459 cos_data.data[i].pri_join_mask = pri_join_mask;
1460 cos_data.data[i].pausable = false;
1461 cos_data.data[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
1462 cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
1463 }
1464
1465 switch (help_data->num_of_pg) {
1466 case 1:
1467
1468 bxn2x_dcbx_single_pg_to_cos_params(
1469 bp,
1470 help_data,
1471 &cos_data,
1472 pri_join_mask,
1473 num_of_dif_pri);
1474 break;
1475 case 2:
1476 bnx2x_dcbx_two_pg_to_cos_params(
1477 bp,
1478 help_data,
1479 ets,
1480 &cos_data,
1481 pg_pri_orginal_spread,
1482 pri_join_mask,
1483 num_of_dif_pri);
1484 break;
1485
1486 case 3:
1487 bnx2x_dcbx_three_pg_to_cos_params(
1488 bp,
1489 help_data,
1490 ets,
1491 &cos_data,
1492 pg_pri_orginal_spread,
1493 pri_join_mask,
1494 num_of_dif_pri);
1495
1496 break;
1497 default:
1498 BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
1499 bnx2x_dcbx_ets_disabled_entry_data(bp,
1500 &cos_data, pri_join_mask);
1501 }
1502
1503 for (i = 0; i < cos_data.num_of_cos ; i++) {
1504 struct bnx2x_dcbx_cos_params *params =
1505 &bp->dcbx_port_params.ets.cos_params[i];
1506
1507 params->pauseable = cos_data.data[i].pausable;
1508 params->strict = cos_data.data[i].strict;
1509 params->bw_tbl = cos_data.data[i].cos_bw;
1510 if (params->pauseable) {
1511 params->pri_bitmask =
1512 DCBX_PFC_PRI_GET_PAUSE(bp,
1513 cos_data.data[i].pri_join_mask);
1514 DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
1515 i, cos_data.data[i].pri_join_mask);
1516 } else {
1517 params->pri_bitmask =
1518 DCBX_PFC_PRI_GET_NON_PAUSE(bp,
1519 cos_data.data[i].pri_join_mask);
1520 DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
1521 "0x%x\n",
1522 i, cos_data.data[i].pri_join_mask);
1523 }
1524 }
1525
1526 bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
1527 }
1528
1529 static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
1530 u32 *set_configuration_ets_pg,
1531 u32 *pri_pg_tbl)
1532 {
1533 int i;
1534
1535 for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
1536 set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
1537
1538 DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
1539 i, set_configuration_ets_pg[i]);
1540 }
1541 }
1542
1543 static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp)
1544 {
1545 struct flow_control_configuration *pfc_fw_cfg = NULL;
1546 u16 pri_bit = 0;
1547 u8 cos = 0, pri = 0;
1548 struct priority_cos *tt2cos;
1549 u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
1550
1551 pfc_fw_cfg = (struct flow_control_configuration *)
1552 bnx2x_sp(bp, pfc_config);
1553 memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration));
1554
1555 /*shortcut*/
1556 tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
1557
1558 /* Fw version should be incremented each update */
1559 pfc_fw_cfg->dcb_version = ++bp->dcb_version;
1560 pfc_fw_cfg->dcb_enabled = DCB_ENABLED;
1561
1562 /* Default initialization */
1563 for (pri = 0; pri < MAX_PFC_TRAFFIC_TYPES ; pri++) {
1564 tt2cos[pri].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
1565 tt2cos[pri].cos = 0;
1566 }
1567
1568 /* Fill priority parameters */
1569 for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
1570 tt2cos[pri].priority = ttp[pri];
1571 pri_bit = 1 << tt2cos[pri].priority;
1572
1573 /* Fill COS parameters based on COS calculated to
1574 * make it more generally for future use */
1575 for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
1576 if (bp->dcbx_port_params.ets.cos_params[cos].
1577 pri_bitmask & pri_bit)
1578 tt2cos[pri].cos = cos;
1579 }
1580 bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
1581 }
1582 /* DCB netlink */
1583 #ifdef BCM_DCBNL
1584
1585 #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
1586 DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
1587
1588 static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
1589 {
1590 /* validate dcbnl call that may change HW state:
1591 * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
1592 */
1593 return bp->dcb_state && bp->dcbx_mode_uset;
1594 }
1595
1596 static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
1597 {
1598 struct bnx2x *bp = netdev_priv(netdev);
1599 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
1600 return bp->dcb_state;
1601 }
1602
1603 static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
1604 {
1605 struct bnx2x *bp = netdev_priv(netdev);
1606 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
1607
1608 bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
1609 return 0;
1610 }
1611
1612 static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
1613 u8 *perm_addr)
1614 {
1615 struct bnx2x *bp = netdev_priv(netdev);
1616 DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
1617
1618 /* first the HW mac address */
1619 memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
1620
1621 #ifdef BCM_CNIC
1622 /* second SAN address */
1623 memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
1624 #endif
1625 }
1626
1627 static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
1628 u8 prio_type, u8 pgid, u8 bw_pct,
1629 u8 up_map)
1630 {
1631 struct bnx2x *bp = netdev_priv(netdev);
1632
1633 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
1634 if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
1635 return;
1636
1637 /**
1638 * bw_pct ingnored - band-width percentage devision between user
1639 * priorities within the same group is not
1640 * standard and hence not supported
1641 *
1642 * prio_type igonred - priority levels within the same group are not
1643 * standard and hence are not supported. According
1644 * to the standard pgid 15 is dedicated to strict
1645 * prioirty traffic (on the port level).
1646 *
1647 * up_map ignored
1648 */
1649
1650 bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
1651 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1652 }
1653
1654 static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
1655 int pgid, u8 bw_pct)
1656 {
1657 struct bnx2x *bp = netdev_priv(netdev);
1658 DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
1659
1660 if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
1661 return;
1662
1663 bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
1664 bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
1665 }
1666
1667 static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
1668 u8 prio_type, u8 pgid, u8 bw_pct,
1669 u8 up_map)
1670 {
1671 struct bnx2x *bp = netdev_priv(netdev);
1672 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1673 }
1674
1675 static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
1676 int pgid, u8 bw_pct)
1677 {
1678 struct bnx2x *bp = netdev_priv(netdev);
1679 DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
1680 }
1681
1682 static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
1683 u8 *prio_type, u8 *pgid, u8 *bw_pct,
1684 u8 *up_map)
1685 {
1686 struct bnx2x *bp = netdev_priv(netdev);
1687 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
1688
1689 /**
1690 * bw_pct ingnored - band-width percentage devision between user
1691 * priorities within the same group is not
1692 * standard and hence not supported
1693 *
1694 * prio_type igonred - priority levels within the same group are not
1695 * standard and hence are not supported. According
1696 * to the standard pgid 15 is dedicated to strict
1697 * prioirty traffic (on the port level).
1698 *
1699 * up_map ignored
1700 */
1701 *up_map = *bw_pct = *prio_type = *pgid = 0;
1702
1703 if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
1704 return;
1705
1706 *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
1707 }
1708
1709 static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
1710 int pgid, u8 *bw_pct)
1711 {
1712 struct bnx2x *bp = netdev_priv(netdev);
1713 DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
1714
1715 *bw_pct = 0;
1716
1717 if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
1718 return;
1719
1720 *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
1721 }
1722
1723 static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
1724 u8 *prio_type, u8 *pgid, u8 *bw_pct,
1725 u8 *up_map)
1726 {
1727 struct bnx2x *bp = netdev_priv(netdev);
1728 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
1729
1730 *prio_type = *pgid = *bw_pct = *up_map = 0;
1731 }
1732
1733 static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
1734 int pgid, u8 *bw_pct)
1735 {
1736 struct bnx2x *bp = netdev_priv(netdev);
1737 DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
1738
1739 *bw_pct = 0;
1740 }
1741
1742 static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
1743 u8 setting)
1744 {
1745 struct bnx2x *bp = netdev_priv(netdev);
1746 DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
1747
1748 if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
1749 return;
1750
1751 bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
1752
1753 if (setting)
1754 bp->dcbx_config_params.admin_pfc_tx_enable = 1;
1755 }
1756
1757 static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
1758 u8 *setting)
1759 {
1760 struct bnx2x *bp = netdev_priv(netdev);
1761 DP(NETIF_MSG_LINK, "prio = %d\n", prio);
1762
1763 *setting = 0;
1764
1765 if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
1766 return;
1767
1768 *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
1769 }
1770
1771 static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
1772 {
1773 struct bnx2x *bp = netdev_priv(netdev);
1774 int rc = 0;
1775
1776 DP(NETIF_MSG_LINK, "SET-ALL\n");
1777
1778 if (!bnx2x_dcbnl_set_valid(bp))
1779 return 1;
1780
1781 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
1782 netdev_err(bp->dev, "Handling parity error recovery. "
1783 "Try again later\n");
1784 return 1;
1785 }
1786 if (netif_running(bp->dev)) {
1787 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
1788 rc = bnx2x_nic_load(bp, LOAD_NORMAL);
1789 }
1790 DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
1791 if (rc)
1792 return 1;
1793
1794 return 0;
1795 }
1796
1797 static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
1798 {
1799 struct bnx2x *bp = netdev_priv(netdev);
1800 u8 rval = 0;
1801
1802 if (bp->dcb_state) {
1803 switch (capid) {
1804 case DCB_CAP_ATTR_PG:
1805 *cap = true;
1806 break;
1807 case DCB_CAP_ATTR_PFC:
1808 *cap = true;
1809 break;
1810 case DCB_CAP_ATTR_UP2TC:
1811 *cap = false;
1812 break;
1813 case DCB_CAP_ATTR_PG_TCS:
1814 *cap = 0x80; /* 8 priorities for PGs */
1815 break;
1816 case DCB_CAP_ATTR_PFC_TCS:
1817 *cap = 0x80; /* 8 priorities for PFC */
1818 break;
1819 case DCB_CAP_ATTR_GSP:
1820 *cap = true;
1821 break;
1822 case DCB_CAP_ATTR_BCN:
1823 *cap = false;
1824 break;
1825 case DCB_CAP_ATTR_DCBX:
1826 *cap = BNX2X_DCBX_CAPS;
1827 default:
1828 rval = -EINVAL;
1829 break;
1830 }
1831 } else
1832 rval = -EINVAL;
1833
1834 DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
1835 return rval;
1836 }
1837
1838 static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
1839 {
1840 struct bnx2x *bp = netdev_priv(netdev);
1841 u8 rval = 0;
1842
1843 DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
1844
1845 if (bp->dcb_state) {
1846 switch (tcid) {
1847 case DCB_NUMTCS_ATTR_PG:
1848 *num = E2_NUM_OF_COS;
1849 break;
1850 case DCB_NUMTCS_ATTR_PFC:
1851 *num = E2_NUM_OF_COS;
1852 break;
1853 default:
1854 rval = -EINVAL;
1855 break;
1856 }
1857 } else
1858 rval = -EINVAL;
1859
1860 return rval;
1861 }
1862
1863 static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
1864 {
1865 struct bnx2x *bp = netdev_priv(netdev);
1866 DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
1867 return -EINVAL;
1868 }
1869
1870 static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
1871 {
1872 struct bnx2x *bp = netdev_priv(netdev);
1873 DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
1874
1875 if (!bp->dcb_state)
1876 return 0;
1877
1878 return bp->dcbx_local_feat.pfc.enabled;
1879 }
1880
1881 static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
1882 {
1883 struct bnx2x *bp = netdev_priv(netdev);
1884 DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
1885
1886 if (!bnx2x_dcbnl_set_valid(bp))
1887 return;
1888
1889 bp->dcbx_config_params.admin_pfc_tx_enable =
1890 bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
1891 }
1892
1893 static void bnx2x_admin_app_set_ent(
1894 struct bnx2x_admin_priority_app_table *app_ent,
1895 u8 idtype, u16 idval, u8 up)
1896 {
1897 app_ent->valid = 1;
1898
1899 switch (idtype) {
1900 case DCB_APP_IDTYPE_ETHTYPE:
1901 app_ent->traffic_type = TRAFFIC_TYPE_ETH;
1902 break;
1903 case DCB_APP_IDTYPE_PORTNUM:
1904 app_ent->traffic_type = TRAFFIC_TYPE_PORT;
1905 break;
1906 default:
1907 break; /* never gets here */
1908 }
1909 app_ent->app_id = idval;
1910 app_ent->priority = up;
1911 }
1912
1913 static bool bnx2x_admin_app_is_equal(
1914 struct bnx2x_admin_priority_app_table *app_ent,
1915 u8 idtype, u16 idval)
1916 {
1917 if (!app_ent->valid)
1918 return false;
1919
1920 switch (idtype) {
1921 case DCB_APP_IDTYPE_ETHTYPE:
1922 if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
1923 return false;
1924 break;
1925 case DCB_APP_IDTYPE_PORTNUM:
1926 if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
1927 return false;
1928 break;
1929 default:
1930 return false;
1931 }
1932 if (app_ent->app_id != idval)
1933 return false;
1934
1935 return true;
1936 }
1937
1938 static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
1939 {
1940 int i, ff;
1941
1942 /* iterate over the app entries looking for idtype and idval */
1943 for (i = 0, ff = -1; i < 4; i++) {
1944 struct bnx2x_admin_priority_app_table *app_ent =
1945 &bp->dcbx_config_params.admin_priority_app_table[i];
1946 if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
1947 break;
1948
1949 if (ff < 0 && !app_ent->valid)
1950 ff = i;
1951 }
1952 if (i < 4)
1953 /* if found overwrite up */
1954 bp->dcbx_config_params.
1955 admin_priority_app_table[i].priority = up;
1956 else if (ff >= 0)
1957 /* not found use first-free */
1958 bnx2x_admin_app_set_ent(
1959 &bp->dcbx_config_params.admin_priority_app_table[ff],
1960 idtype, idval, up);
1961 else
1962 /* app table is full */
1963 return -EBUSY;
1964
1965 /* up configured, if not 0 make sure feature is enabled */
1966 if (up)
1967 bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
1968
1969 return 0;
1970 }
1971
1972 static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
1973 u16 idval, u8 up)
1974 {
1975 struct bnx2x *bp = netdev_priv(netdev);
1976
1977 DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
1978 idtype, idval, up);
1979
1980 if (!bnx2x_dcbnl_set_valid(bp))
1981 return -EINVAL;
1982
1983 /* verify idtype */
1984 switch (idtype) {
1985 case DCB_APP_IDTYPE_ETHTYPE:
1986 case DCB_APP_IDTYPE_PORTNUM:
1987 break;
1988 default:
1989 return -EINVAL;
1990 }
1991 return bnx2x_set_admin_app_up(bp, idtype, idval, up);
1992 }
1993
1994 static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
1995 {
1996 struct bnx2x *bp = netdev_priv(netdev);
1997 u8 state;
1998
1999 state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
2000
2001 if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
2002 state |= DCB_CAP_DCBX_STATIC;
2003
2004 return state;
2005 }
2006
2007 static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
2008 {
2009 struct bnx2x *bp = netdev_priv(netdev);
2010 DP(NETIF_MSG_LINK, "state = %02x\n", state);
2011
2012 /* set dcbx mode */
2013
2014 if ((state & BNX2X_DCBX_CAPS) != state) {
2015 BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
2016 "capabilities\n", state);
2017 return 1;
2018 }
2019
2020 if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
2021 BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
2022 return 1;
2023 }
2024
2025 if (state & DCB_CAP_DCBX_STATIC)
2026 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
2027 else
2028 bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
2029
2030 bp->dcbx_mode_uset = true;
2031 return 0;
2032 }
2033
2034
2035 static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
2036 u8 *flags)
2037 {
2038 struct bnx2x *bp = netdev_priv(netdev);
2039 u8 rval = 0;
2040
2041 DP(NETIF_MSG_LINK, "featid %d\n", featid);
2042
2043 if (bp->dcb_state) {
2044 *flags = 0;
2045 switch (featid) {
2046 case DCB_FEATCFG_ATTR_PG:
2047 if (bp->dcbx_local_feat.ets.enabled)
2048 *flags |= DCB_FEATCFG_ENABLE;
2049 if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
2050 *flags |= DCB_FEATCFG_ERROR;
2051 break;
2052 case DCB_FEATCFG_ATTR_PFC:
2053 if (bp->dcbx_local_feat.pfc.enabled)
2054 *flags |= DCB_FEATCFG_ENABLE;
2055 if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
2056 DCBX_LOCAL_PFC_MISMATCH))
2057 *flags |= DCB_FEATCFG_ERROR;
2058 break;
2059 case DCB_FEATCFG_ATTR_APP:
2060 if (bp->dcbx_local_feat.app.enabled)
2061 *flags |= DCB_FEATCFG_ENABLE;
2062 if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
2063 DCBX_LOCAL_APP_MISMATCH))
2064 *flags |= DCB_FEATCFG_ERROR;
2065 break;
2066 default:
2067 rval = -EINVAL;
2068 break;
2069 }
2070 } else
2071 rval = -EINVAL;
2072
2073 return rval;
2074 }
2075
2076 static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
2077 u8 flags)
2078 {
2079 struct bnx2x *bp = netdev_priv(netdev);
2080 u8 rval = 0;
2081
2082 DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
2083
2084 /* ignore the 'advertise' flag */
2085 if (bnx2x_dcbnl_set_valid(bp)) {
2086 switch (featid) {
2087 case DCB_FEATCFG_ATTR_PG:
2088 bp->dcbx_config_params.admin_ets_enable =
2089 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2090 bp->dcbx_config_params.admin_ets_willing =
2091 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2092 break;
2093 case DCB_FEATCFG_ATTR_PFC:
2094 bp->dcbx_config_params.admin_pfc_enable =
2095 flags & DCB_FEATCFG_ENABLE ? 1 : 0;
2096 bp->dcbx_config_params.admin_pfc_willing =
2097 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2098 break;
2099 case DCB_FEATCFG_ATTR_APP:
2100 /* ignore enable, always enabled */
2101 bp->dcbx_config_params.admin_app_priority_willing =
2102 flags & DCB_FEATCFG_WILLING ? 1 : 0;
2103 break;
2104 default:
2105 rval = -EINVAL;
2106 break;
2107 }
2108 } else
2109 rval = -EINVAL;
2110
2111 return rval;
2112 }
2113
2114 const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
2115 .getstate = bnx2x_dcbnl_get_state,
2116 .setstate = bnx2x_dcbnl_set_state,
2117 .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
2118 .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
2119 .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
2120 .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
2121 .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
2122 .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
2123 .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
2124 .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
2125 .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
2126 .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
2127 .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
2128 .setall = bnx2x_dcbnl_set_all,
2129 .getcap = bnx2x_dcbnl_get_cap,
2130 .getnumtcs = bnx2x_dcbnl_get_numtcs,
2131 .setnumtcs = bnx2x_dcbnl_set_numtcs,
2132 .getpfcstate = bnx2x_dcbnl_get_pfc_state,
2133 .setpfcstate = bnx2x_dcbnl_set_pfc_state,
2134 .setapp = bnx2x_dcbnl_set_app_up,
2135 .getdcbx = bnx2x_dcbnl_get_dcbx,
2136 .setdcbx = bnx2x_dcbnl_set_dcbx,
2137 .getfeatcfg = bnx2x_dcbnl_get_featcfg,
2138 .setfeatcfg = bnx2x_dcbnl_set_featcfg,
2139 };
2140
2141 #endif /* BCM_DCBNL */