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sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / qlcnic / qlcnic_ctx.c
blobbab041a5c75872c568128caabf5a9858be916136
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9
10 static u32
11 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
12 {
13 u32 rsp;
14 int timeout = 0;
15
16 do {
17 /* give atleast 1ms for firmware to respond */
18 msleep(1);
19
20 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
21 return QLCNIC_CDRP_RSP_TIMEOUT;
22
23 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
24 } while (!QLCNIC_CDRP_IS_RSP(rsp));
25
26 return rsp;
27 }
28
29 u32
30 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
31 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
32 {
33 u32 rsp;
34 u32 signature;
35 u32 rcode = QLCNIC_RCODE_SUCCESS;
36 struct pci_dev *pdev = adapter->pdev;
37
38 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
39
40 /* Acquire semaphore before accessing CRB */
41 if (qlcnic_api_lock(adapter))
42 return QLCNIC_RCODE_TIMEOUT;
43
44 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
45 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
46 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
47 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
48 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
49
50 rsp = qlcnic_poll_rsp(adapter);
51
52 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
53 dev_err(&pdev->dev, "card response timeout.\n");
54 rcode = QLCNIC_RCODE_TIMEOUT;
55 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
56 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
57 dev_err(&pdev->dev, "failed card response code:0x%x\n",
58 rcode);
59 }
60
61 /* Release semaphore */
62 qlcnic_api_unlock(adapter);
63
64 return rcode;
65 }
66
67 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u16 temp_size)
68 {
69 uint64_t sum = 0;
70 int count = temp_size / sizeof(uint32_t);
71 while (count-- > 0)
72 sum += *temp_buffer++;
73 while (sum >> 32)
74 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
75 return ~sum;
76 }
77
78 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
79 {
80 int err, i;
81 u16 temp_size;
82 void *tmp_addr;
83 u32 version, csum, *template, *tmp_buf;
84 struct qlcnic_hardware_context *ahw;
85 struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
86 dma_addr_t tmp_addr_t = 0;
87
88 ahw = adapter->ahw;
89 err = qlcnic_issue_cmd(adapter,
90 adapter->ahw->pci_func,
91 adapter->fw_hal_version,
92 0,
93 0,
94 0,
95 QLCNIC_CDRP_CMD_TEMP_SIZE);
96 if (err != QLCNIC_RCODE_SUCCESS) {
97 err = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
98 dev_err(&adapter->pdev->dev,
99 "Failed to get template size %d\n", err);
100 err = -EIO;
101 return err;
102 }
103 version = QLCRD32(adapter, QLCNIC_ARG3_CRB_OFFSET);
104 temp_size = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
105 if (!temp_size)
106 return -EIO;
107
108 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
109 &tmp_addr_t, GFP_KERNEL);
110 if (!tmp_addr) {
111 dev_err(&adapter->pdev->dev,
112 "Can't get memory for FW dump template\n");
113 return -ENOMEM;
114 }
115 err = qlcnic_issue_cmd(adapter,
116 adapter->ahw->pci_func,
117 adapter->fw_hal_version,
118 LSD(tmp_addr_t),
119 MSD(tmp_addr_t),
120 temp_size,
121 QLCNIC_CDRP_CMD_GET_TEMP_HDR);
122
123 if (err != QLCNIC_RCODE_SUCCESS) {
124 dev_err(&adapter->pdev->dev,
125 "Failed to get mini dump template header %d\n", err);
126 err = -EIO;
127 goto error;
128 }
129 tmp_tmpl = (struct qlcnic_dump_template_hdr *) tmp_addr;
130 csum = qlcnic_temp_checksum((uint32_t *) tmp_addr, temp_size);
131 if (csum) {
132 dev_err(&adapter->pdev->dev,
133 "Template header checksum validation failed\n");
134 err = -EIO;
135 goto error;
136 }
137 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
138 if (!ahw->fw_dump.tmpl_hdr) {
139 err = -EIO;
140 goto error;
141 }
142 tmp_buf = (u32 *) tmp_addr;
143 template = (u32 *) ahw->fw_dump.tmpl_hdr;
144 for (i = 0; i < temp_size/sizeof(u32); i++)
145 *template++ = __le32_to_cpu(*tmp_buf++);
146
147 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
148 if (tmpl_hdr->cap_mask > QLCNIC_DUMP_MASK_DEF &&
149 tmpl_hdr->cap_mask <= QLCNIC_DUMP_MASK_MAX)
150 tmpl_hdr->drv_cap_mask = tmpl_hdr->cap_mask;
151 else
152 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
153 error:
154 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
155 return err;
156 }
157
158 int
159 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
160 {
161 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
162
163 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
164 if (qlcnic_issue_cmd(adapter,
165 adapter->ahw->pci_func,
166 adapter->fw_hal_version,
167 recv_ctx->context_id,
168 mtu,
169 0,
170 QLCNIC_CDRP_CMD_SET_MTU)) {
171
172 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
173 return -EIO;
174 }
175 }
176
177 return 0;
178 }
179
180 static int
181 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
182 {
183 void *addr;
184 struct qlcnic_hostrq_rx_ctx *prq;
185 struct qlcnic_cardrsp_rx_ctx *prsp;
186 struct qlcnic_hostrq_rds_ring *prq_rds;
187 struct qlcnic_hostrq_sds_ring *prq_sds;
188 struct qlcnic_cardrsp_rds_ring *prsp_rds;
189 struct qlcnic_cardrsp_sds_ring *prsp_sds;
190 struct qlcnic_host_rds_ring *rds_ring;
191 struct qlcnic_host_sds_ring *sds_ring;
192
193 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
194 u64 phys_addr;
195
196 u8 i, nrds_rings, nsds_rings;
197 size_t rq_size, rsp_size;
198 u32 cap, reg, val, reg2;
199 int err;
200
201 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
202
203 nrds_rings = adapter->max_rds_rings;
204 nsds_rings = adapter->max_sds_rings;
205
206 rq_size =
207 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
208 nsds_rings);
209 rsp_size =
210 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
211 nsds_rings);
212
213 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
214 &hostrq_phys_addr, GFP_KERNEL);
215 if (addr == NULL)
216 return -ENOMEM;
217 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
218
219 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
220 &cardrsp_phys_addr, GFP_KERNEL);
221 if (addr == NULL) {
222 err = -ENOMEM;
223 goto out_free_rq;
224 }
225 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
226
227 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
228
229 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
230 | QLCNIC_CAP0_VALIDOFF);
231 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
232
233 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
234 msix_handler);
235 prq->txrx_sds_binding = nsds_rings - 1;
236
237 prq->capabilities[0] = cpu_to_le32(cap);
238 prq->host_int_crb_mode =
239 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
240 prq->host_rds_crb_mode =
241 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
242
243 prq->num_rds_rings = cpu_to_le16(nrds_rings);
244 prq->num_sds_rings = cpu_to_le16(nsds_rings);
245 prq->rds_ring_offset = 0;
246
247 val = le32_to_cpu(prq->rds_ring_offset) +
248 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
249 prq->sds_ring_offset = cpu_to_le32(val);
250
251 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
252 le32_to_cpu(prq->rds_ring_offset));
253
254 for (i = 0; i < nrds_rings; i++) {
255
256 rds_ring = &recv_ctx->rds_rings[i];
257 rds_ring->producer = 0;
258
259 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
260 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
261 prq_rds[i].ring_kind = cpu_to_le32(i);
262 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
263 }
264
265 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
266 le32_to_cpu(prq->sds_ring_offset));
267
268 for (i = 0; i < nsds_rings; i++) {
269
270 sds_ring = &recv_ctx->sds_rings[i];
271 sds_ring->consumer = 0;
272 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
273
274 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
275 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
276 prq_sds[i].msi_index = cpu_to_le16(i);
277 }
278
279 phys_addr = hostrq_phys_addr;
280 err = qlcnic_issue_cmd(adapter,
281 adapter->ahw->pci_func,
282 adapter->fw_hal_version,
283 (u32)(phys_addr >> 32),
284 (u32)(phys_addr & 0xffffffff),
285 rq_size,
286 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
287 if (err) {
288 dev_err(&adapter->pdev->dev,
289 "Failed to create rx ctx in firmware%d\n", err);
290 goto out_free_rsp;
291 }
292
293
294 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
295 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
296
297 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
298 rds_ring = &recv_ctx->rds_rings[i];
299
300 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
301 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
302 }
303
304 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
305 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
306
307 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
308 sds_ring = &recv_ctx->sds_rings[i];
309
310 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
311 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
312
313 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
314 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
315 }
316
317 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
318 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
319 recv_ctx->virt_port = prsp->virt_port;
320
321 out_free_rsp:
322 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
323 cardrsp_phys_addr);
324 out_free_rq:
325 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
326 return err;
327 }
328
329 static void
330 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
331 {
332 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
333
334 if (qlcnic_issue_cmd(adapter,
335 adapter->ahw->pci_func,
336 adapter->fw_hal_version,
337 recv_ctx->context_id,
338 QLCNIC_DESTROY_CTX_RESET,
339 0,
340 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
341
342 dev_err(&adapter->pdev->dev,
343 "Failed to destroy rx ctx in firmware\n");
344 }
345
346 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
347 }
348
349 static int
350 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
351 {
352 struct qlcnic_hostrq_tx_ctx *prq;
353 struct qlcnic_hostrq_cds_ring *prq_cds;
354 struct qlcnic_cardrsp_tx_ctx *prsp;
355 void *rq_addr, *rsp_addr;
356 size_t rq_size, rsp_size;
357 u32 temp;
358 int err;
359 u64 phys_addr;
360 dma_addr_t rq_phys_addr, rsp_phys_addr;
361 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
362
363 /* reset host resources */
364 tx_ring->producer = 0;
365 tx_ring->sw_consumer = 0;
366 *(tx_ring->hw_consumer) = 0;
367
368 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
369 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
370 &rq_phys_addr, GFP_KERNEL);
371 if (!rq_addr)
372 return -ENOMEM;
373
374 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
375 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
376 &rsp_phys_addr, GFP_KERNEL);
377 if (!rsp_addr) {
378 err = -ENOMEM;
379 goto out_free_rq;
380 }
381
382 memset(rq_addr, 0, rq_size);
383 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
384
385 memset(rsp_addr, 0, rsp_size);
386 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
387
388 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
389
390 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
391 QLCNIC_CAP0_LSO);
392 prq->capabilities[0] = cpu_to_le32(temp);
393
394 prq->host_int_crb_mode =
395 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
396
397 prq->interrupt_ctl = 0;
398 prq->msi_index = 0;
399 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
400
401 prq_cds = &prq->cds_ring;
402
403 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
404 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
405
406 phys_addr = rq_phys_addr;
407 err = qlcnic_issue_cmd(adapter,
408 adapter->ahw->pci_func,
409 adapter->fw_hal_version,
410 (u32)(phys_addr >> 32),
411 ((u32)phys_addr & 0xffffffff),
412 rq_size,
413 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
414
415 if (err == QLCNIC_RCODE_SUCCESS) {
416 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
417 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
418
419 adapter->tx_context_id =
420 le16_to_cpu(prsp->context_id);
421 } else {
422 dev_err(&adapter->pdev->dev,
423 "Failed to create tx ctx in firmware%d\n", err);
424 err = -EIO;
425 }
426
427 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
428 rsp_phys_addr);
429
430 out_free_rq:
431 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
432
433 return err;
434 }
435
436 static void
437 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
438 {
439 if (qlcnic_issue_cmd(adapter,
440 adapter->ahw->pci_func,
441 adapter->fw_hal_version,
442 adapter->tx_context_id,
443 QLCNIC_DESTROY_CTX_RESET,
444 0,
445 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
446
447 dev_err(&adapter->pdev->dev,
448 "Failed to destroy tx ctx in firmware\n");
449 }
450 }
451
452 int
453 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
454 {
455 return qlcnic_issue_cmd(adapter,
456 adapter->ahw->pci_func,
457 adapter->fw_hal_version,
458 config,
459 0,
460 0,
461 QLCNIC_CDRP_CMD_CONFIG_PORT);
462 }
463
464 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
465 {
466 void *addr;
467 int err;
468 int ring;
469 struct qlcnic_recv_context *recv_ctx;
470 struct qlcnic_host_rds_ring *rds_ring;
471 struct qlcnic_host_sds_ring *sds_ring;
472 struct qlcnic_host_tx_ring *tx_ring;
473
474 struct pci_dev *pdev = adapter->pdev;
475
476 recv_ctx = adapter->recv_ctx;
477 tx_ring = adapter->tx_ring;
478
479 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
480 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
481 if (tx_ring->hw_consumer == NULL) {
482 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
483 return -ENOMEM;
484 }
485
486 /* cmd desc ring */
487 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
488 &tx_ring->phys_addr, GFP_KERNEL);
489
490 if (addr == NULL) {
491 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
492 err = -ENOMEM;
493 goto err_out_free;
494 }
495
496 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
497
498 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
499 rds_ring = &recv_ctx->rds_rings[ring];
500 addr = dma_alloc_coherent(&adapter->pdev->dev,
501 RCV_DESC_RINGSIZE(rds_ring),
502 &rds_ring->phys_addr, GFP_KERNEL);
503 if (addr == NULL) {
504 dev_err(&pdev->dev,
505 "failed to allocate rds ring [%d]\n", ring);
506 err = -ENOMEM;
507 goto err_out_free;
508 }
509 rds_ring->desc_head = (struct rcv_desc *)addr;
510
511 }
512
513 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
514 sds_ring = &recv_ctx->sds_rings[ring];
515
516 addr = dma_alloc_coherent(&adapter->pdev->dev,
517 STATUS_DESC_RINGSIZE(sds_ring),
518 &sds_ring->phys_addr, GFP_KERNEL);
519 if (addr == NULL) {
520 dev_err(&pdev->dev,
521 "failed to allocate sds ring [%d]\n", ring);
522 err = -ENOMEM;
523 goto err_out_free;
524 }
525 sds_ring->desc_head = (struct status_desc *)addr;
526 }
527
528 return 0;
529
530 err_out_free:
531 qlcnic_free_hw_resources(adapter);
532 return err;
533 }
534
535
536 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
537 {
538 int err;
539
540 if (adapter->flags & QLCNIC_NEED_FLR) {
541 pci_reset_function(adapter->pdev);
542 adapter->flags &= ~QLCNIC_NEED_FLR;
543 }
544
545 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
546 if (err)
547 return err;
548
549 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
550 if (err) {
551 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
552 return err;
553 }
554
555 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
556 return 0;
557 }
558
559 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
560 {
561 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
562 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
563 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
564
565 /* Allow dma queues to drain after context reset */
566 msleep(20);
567 }
568 }
569
570 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
571 {
572 struct qlcnic_recv_context *recv_ctx;
573 struct qlcnic_host_rds_ring *rds_ring;
574 struct qlcnic_host_sds_ring *sds_ring;
575 struct qlcnic_host_tx_ring *tx_ring;
576 int ring;
577
578 recv_ctx = adapter->recv_ctx;
579
580 tx_ring = adapter->tx_ring;
581 if (tx_ring->hw_consumer != NULL) {
582 dma_free_coherent(&adapter->pdev->dev,
583 sizeof(u32),
584 tx_ring->hw_consumer,
585 tx_ring->hw_cons_phys_addr);
586 tx_ring->hw_consumer = NULL;
587 }
588
589 if (tx_ring->desc_head != NULL) {
590 dma_free_coherent(&adapter->pdev->dev,
591 TX_DESC_RINGSIZE(tx_ring),
592 tx_ring->desc_head, tx_ring->phys_addr);
593 tx_ring->desc_head = NULL;
594 }
595
596 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
597 rds_ring = &recv_ctx->rds_rings[ring];
598
599 if (rds_ring->desc_head != NULL) {
600 dma_free_coherent(&adapter->pdev->dev,
601 RCV_DESC_RINGSIZE(rds_ring),
602 rds_ring->desc_head,
603 rds_ring->phys_addr);
604 rds_ring->desc_head = NULL;
605 }
606 }
607
608 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
609 sds_ring = &recv_ctx->sds_rings[ring];
610
611 if (sds_ring->desc_head != NULL) {
612 dma_free_coherent(&adapter->pdev->dev,
613 STATUS_DESC_RINGSIZE(sds_ring),
614 sds_ring->desc_head,
615 sds_ring->phys_addr);
616 sds_ring->desc_head = NULL;
617 }
618 }
619 }
620
621
622 /* Get MAC address of a NIC partition */
623 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
624 {
625 int err;
626 u32 arg1;
627
628 arg1 = adapter->ahw->pci_func | BIT_8;
629 err = qlcnic_issue_cmd(adapter,
630 adapter->ahw->pci_func,
631 adapter->fw_hal_version,
632 arg1,
633 0,
634 0,
635 QLCNIC_CDRP_CMD_MAC_ADDRESS);
636
637 if (err == QLCNIC_RCODE_SUCCESS)
638 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
639 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
640 else {
641 dev_err(&adapter->pdev->dev,
642 "Failed to get mac address%d\n", err);
643 err = -EIO;
644 }
645
646 return err;
647 }
648
649 /* Get info of a NIC partition */
650 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
651 struct qlcnic_info *npar_info, u8 func_id)
652 {
653 int err;
654 dma_addr_t nic_dma_t;
655 struct qlcnic_info *nic_info;
656 void *nic_info_addr;
657 size_t nic_size = sizeof(struct qlcnic_info);
658
659 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
660 &nic_dma_t, GFP_KERNEL);
661 if (!nic_info_addr)
662 return -ENOMEM;
663 memset(nic_info_addr, 0, nic_size);
664
665 nic_info = (struct qlcnic_info *) nic_info_addr;
666 err = qlcnic_issue_cmd(adapter,
667 adapter->ahw->pci_func,
668 adapter->fw_hal_version,
669 MSD(nic_dma_t),
670 LSD(nic_dma_t),
671 (func_id << 16 | nic_size),
672 QLCNIC_CDRP_CMD_GET_NIC_INFO);
673
674 if (err == QLCNIC_RCODE_SUCCESS) {
675 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
676 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
677 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
678 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
679 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
680 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
681 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
682 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
683 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
684 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
685
686 dev_info(&adapter->pdev->dev,
687 "phy port: %d switch_mode: %d,\n"
688 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
689 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
690 npar_info->phys_port, npar_info->switch_mode,
691 npar_info->max_tx_ques, npar_info->max_rx_ques,
692 npar_info->min_tx_bw, npar_info->max_tx_bw,
693 npar_info->max_mtu, npar_info->capabilities);
694 } else {
695 dev_err(&adapter->pdev->dev,
696 "Failed to get nic info%d\n", err);
697 err = -EIO;
698 }
699
700 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
701 nic_dma_t);
702 return err;
703 }
704
705 /* Configure a NIC partition */
706 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
707 {
708 int err = -EIO;
709 dma_addr_t nic_dma_t;
710 void *nic_info_addr;
711 struct qlcnic_info *nic_info;
712 size_t nic_size = sizeof(struct qlcnic_info);
713
714 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
715 return err;
716
717 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
718 &nic_dma_t, GFP_KERNEL);
719 if (!nic_info_addr)
720 return -ENOMEM;
721
722 memset(nic_info_addr, 0, nic_size);
723 nic_info = (struct qlcnic_info *)nic_info_addr;
724
725 nic_info->pci_func = cpu_to_le16(nic->pci_func);
726 nic_info->op_mode = cpu_to_le16(nic->op_mode);
727 nic_info->phys_port = cpu_to_le16(nic->phys_port);
728 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
729 nic_info->capabilities = cpu_to_le32(nic->capabilities);
730 nic_info->max_mac_filters = nic->max_mac_filters;
731 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
732 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
733 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
734 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
735
736 err = qlcnic_issue_cmd(adapter,
737 adapter->ahw->pci_func,
738 adapter->fw_hal_version,
739 MSD(nic_dma_t),
740 LSD(nic_dma_t),
741 ((nic->pci_func << 16) | nic_size),
742 QLCNIC_CDRP_CMD_SET_NIC_INFO);
743
744 if (err != QLCNIC_RCODE_SUCCESS) {
745 dev_err(&adapter->pdev->dev,
746 "Failed to set nic info%d\n", err);
747 err = -EIO;
748 }
749
750 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
751 nic_dma_t);
752 return err;
753 }
754
755 /* Get PCI Info of a partition */
756 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
757 struct qlcnic_pci_info *pci_info)
758 {
759 int err = 0, i;
760 dma_addr_t pci_info_dma_t;
761 struct qlcnic_pci_info *npar;
762 void *pci_info_addr;
763 size_t npar_size = sizeof(struct qlcnic_pci_info);
764 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
765
766 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
767 &pci_info_dma_t, GFP_KERNEL);
768 if (!pci_info_addr)
769 return -ENOMEM;
770 memset(pci_info_addr, 0, pci_size);
771
772 npar = (struct qlcnic_pci_info *) pci_info_addr;
773 err = qlcnic_issue_cmd(adapter,
774 adapter->ahw->pci_func,
775 adapter->fw_hal_version,
776 MSD(pci_info_dma_t),
777 LSD(pci_info_dma_t),
778 pci_size,
779 QLCNIC_CDRP_CMD_GET_PCI_INFO);
780
781 if (err == QLCNIC_RCODE_SUCCESS) {
782 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
783 pci_info->id = le16_to_cpu(npar->id);
784 pci_info->active = le16_to_cpu(npar->active);
785 pci_info->type = le16_to_cpu(npar->type);
786 pci_info->default_port =
787 le16_to_cpu(npar->default_port);
788 pci_info->tx_min_bw =
789 le16_to_cpu(npar->tx_min_bw);
790 pci_info->tx_max_bw =
791 le16_to_cpu(npar->tx_max_bw);
792 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
793 }
794 } else {
795 dev_err(&adapter->pdev->dev,
796 "Failed to get PCI Info%d\n", err);
797 err = -EIO;
798 }
799
800 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
801 pci_info_dma_t);
802 return err;
803 }
804
805 /* Configure eSwitch for port mirroring */
806 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
807 u8 enable_mirroring, u8 pci_func)
808 {
809 int err = -EIO;
810 u32 arg1;
811
812 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
813 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
814 return err;
815
816 arg1 = id | (enable_mirroring ? BIT_4 : 0);
817 arg1 |= pci_func << 8;
818
819 err = qlcnic_issue_cmd(adapter,
820 adapter->ahw->pci_func,
821 adapter->fw_hal_version,
822 arg1,
823 0,
824 0,
825 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
826
827 if (err != QLCNIC_RCODE_SUCCESS) {
828 dev_err(&adapter->pdev->dev,
829 "Failed to configure port mirroring%d on eswitch:%d\n",
830 pci_func, id);
831 } else {
832 dev_info(&adapter->pdev->dev,
833 "Configured eSwitch %d for port mirroring:%d\n",
834 id, pci_func);
835 }
836
837 return err;
838 }
839
840 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
841 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
842
843 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
844 struct __qlcnic_esw_statistics *stats;
845 dma_addr_t stats_dma_t;
846 void *stats_addr;
847 u32 arg1;
848 int err;
849
850 if (esw_stats == NULL)
851 return -ENOMEM;
852
853 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
854 func != adapter->ahw->pci_func) {
855 dev_err(&adapter->pdev->dev,
856 "Not privilege to query stats for func=%d", func);
857 return -EIO;
858 }
859
860 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
861 &stats_dma_t, GFP_KERNEL);
862 if (!stats_addr) {
863 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
864 return -ENOMEM;
865 }
866 memset(stats_addr, 0, stats_size);
867
868 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
869 arg1 |= rx_tx << 15 | stats_size << 16;
870
871 err = qlcnic_issue_cmd(adapter,
872 adapter->ahw->pci_func,
873 adapter->fw_hal_version,
874 arg1,
875 MSD(stats_dma_t),
876 LSD(stats_dma_t),
877 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
878
879 if (!err) {
880 stats = (struct __qlcnic_esw_statistics *)stats_addr;
881 esw_stats->context_id = le16_to_cpu(stats->context_id);
882 esw_stats->version = le16_to_cpu(stats->version);
883 esw_stats->size = le16_to_cpu(stats->size);
884 esw_stats->multicast_frames =
885 le64_to_cpu(stats->multicast_frames);
886 esw_stats->broadcast_frames =
887 le64_to_cpu(stats->broadcast_frames);
888 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
889 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
890 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
891 esw_stats->errors = le64_to_cpu(stats->errors);
892 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
893 }
894
895 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
896 stats_dma_t);
897 return err;
898 }
899
900 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
901 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
902
903 struct __qlcnic_esw_statistics port_stats;
904 u8 i;
905 int ret = -EIO;
906
907 if (esw_stats == NULL)
908 return -ENOMEM;
909 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
910 return -EIO;
911 if (adapter->npars == NULL)
912 return -EIO;
913
914 memset(esw_stats, 0, sizeof(u64));
915 esw_stats->unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
916 esw_stats->multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
917 esw_stats->broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
918 esw_stats->dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
919 esw_stats->errors = QLCNIC_ESW_STATS_NOT_AVAIL;
920 esw_stats->local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
921 esw_stats->numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;
922 esw_stats->context_id = eswitch;
923
924 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
925 if (adapter->npars[i].phy_port != eswitch)
926 continue;
927
928 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
929 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
930 continue;
931
932 esw_stats->size = port_stats.size;
933 esw_stats->version = port_stats.version;
934 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
935 port_stats.unicast_frames);
936 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
937 port_stats.multicast_frames);
938 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
939 port_stats.broadcast_frames);
940 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
941 port_stats.dropped_frames);
942 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
943 port_stats.errors);
944 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
945 port_stats.local_frames);
946 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
947 port_stats.numbytes);
948 ret = 0;
949 }
950 return ret;
951 }
952
953 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
954 const u8 port, const u8 rx_tx)
955 {
956
957 u32 arg1;
958
959 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
960 return -EIO;
961
962 if (func_esw == QLCNIC_STATS_PORT) {
963 if (port >= QLCNIC_MAX_PCI_FUNC)
964 goto err_ret;
965 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
966 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
967 goto err_ret;
968 } else {
969 goto err_ret;
970 }
971
972 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
973 goto err_ret;
974
975 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
976 arg1 |= BIT_14 | rx_tx << 15;
977
978 return qlcnic_issue_cmd(adapter,
979 adapter->ahw->pci_func,
980 adapter->fw_hal_version,
981 arg1,
982 0,
983 0,
984 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
985
986 err_ret:
987 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
988 "rx_ctx=%d\n", func_esw, port, rx_tx);
989 return -EIO;
990 }
991
992 static int
993 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
994 u32 *arg1, u32 *arg2)
995 {
996 int err = -EIO;
997 u8 pci_func;
998 pci_func = (*arg1 >> 8);
999 err = qlcnic_issue_cmd(adapter,
1000 adapter->ahw->pci_func,
1001 adapter->fw_hal_version,
1002 *arg1,
1003 0,
1004 0,
1005 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
1006
1007 if (err == QLCNIC_RCODE_SUCCESS) {
1008 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
1009 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
1010 dev_info(&adapter->pdev->dev,
1011 "eSwitch port config for pci func %d\n", pci_func);
1012 } else {
1013 dev_err(&adapter->pdev->dev,
1014 "Failed to get eswitch port config for pci func %d\n",
1015 pci_func);
1016 }
1017 return err;
1018 }
1019 /* Configure eSwitch port
1020 op_mode = 0 for setting default port behavior
1021 op_mode = 1 for setting vlan id
1022 op_mode = 2 for deleting vlan id
1023 op_type = 0 for vlan_id
1024 op_type = 1 for port vlan_id
1025 */
1026 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1027 struct qlcnic_esw_func_cfg *esw_cfg)
1028 {
1029 int err = -EIO;
1030 u32 arg1, arg2 = 0;
1031 u8 pci_func;
1032
1033 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1034 return err;
1035 pci_func = esw_cfg->pci_func;
1036 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
1037 arg1 |= (pci_func << 8);
1038
1039 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1040 return err;
1041 arg1 &= ~(0x0ff << 8);
1042 arg1 |= (pci_func << 8);
1043 arg1 &= ~(BIT_2 | BIT_3);
1044 switch (esw_cfg->op_mode) {
1045 case QLCNIC_PORT_DEFAULTS:
1046 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1047 arg2 |= (BIT_0 | BIT_1);
1048 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1049 arg2 |= (BIT_2 | BIT_3);
1050 if (!(esw_cfg->discard_tagged))
1051 arg1 &= ~BIT_4;
1052 if (!(esw_cfg->promisc_mode))
1053 arg1 &= ~BIT_6;
1054 if (!(esw_cfg->mac_override))
1055 arg1 &= ~BIT_7;
1056 if (!(esw_cfg->mac_anti_spoof))
1057 arg2 &= ~BIT_0;
1058 if (!(esw_cfg->offload_flags & BIT_0))
1059 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1060 if (!(esw_cfg->offload_flags & BIT_1))
1061 arg2 &= ~BIT_2;
1062 if (!(esw_cfg->offload_flags & BIT_2))
1063 arg2 &= ~BIT_3;
1064 break;
1065 case QLCNIC_ADD_VLAN:
1066 arg1 |= (BIT_2 | BIT_5);
1067 arg1 |= (esw_cfg->vlan_id << 16);
1068 break;
1069 case QLCNIC_DEL_VLAN:
1070 arg1 |= (BIT_3 | BIT_5);
1071 arg1 &= ~(0x0ffff << 16);
1072 break;
1073 default:
1074 return err;
1075 }
1076
1077 err = qlcnic_issue_cmd(adapter,
1078 adapter->ahw->pci_func,
1079 adapter->fw_hal_version,
1080 arg1,
1081 arg2,
1082 0,
1083 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1084
1085 if (err != QLCNIC_RCODE_SUCCESS) {
1086 dev_err(&adapter->pdev->dev,
1087 "Failed to configure eswitch pci func %d\n", pci_func);
1088 } else {
1089 dev_info(&adapter->pdev->dev,
1090 "Configured eSwitch for pci func %d\n", pci_func);
1091 }
1092
1093 return err;
1094 }
1095
1096 int
1097 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1098 struct qlcnic_esw_func_cfg *esw_cfg)
1099 {
1100 u32 arg1, arg2;
1101 u8 phy_port;
1102 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1103 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1104 else
1105 phy_port = adapter->physical_port;
1106 arg1 = phy_port;
1107 arg1 |= (esw_cfg->pci_func << 8);
1108 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1109 return -EIO;
1110
1111 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1112 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1113 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1114 esw_cfg->mac_override = !!(arg1 & BIT_7);
1115 esw_cfg->vlan_id = LSW(arg1 >> 16);
1116 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1117 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1118
1119 return 0;
1120 }