1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2010 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/pci.h>
12 #include <linux/tcp.h>
15 #include <linux/ipv6.h>
16 #include <linux/slab.h>
18 #include <linux/if_ether.h>
19 #include <linux/highmem.h>
20 #include "net_driver.h"
23 #include "workarounds.h"
26 * TX descriptor ring full threshold
28 * The tx_queue descriptor ring fill-level must fall below this value
29 * before we restart the netif queue
31 #define EFX_TXQ_THRESHOLD(_efx) ((_efx)->txq_entries / 2u)
33 static void efx_dequeue_buffer(struct efx_tx_queue
*tx_queue
,
34 struct efx_tx_buffer
*buffer
)
36 if (buffer
->unmap_len
) {
37 struct pci_dev
*pci_dev
= tx_queue
->efx
->pci_dev
;
38 dma_addr_t unmap_addr
= (buffer
->dma_addr
+ buffer
->len
-
40 if (buffer
->unmap_single
)
41 pci_unmap_single(pci_dev
, unmap_addr
, buffer
->unmap_len
,
44 pci_unmap_page(pci_dev
, unmap_addr
, buffer
->unmap_len
,
46 buffer
->unmap_len
= 0;
47 buffer
->unmap_single
= false;
51 dev_kfree_skb_any((struct sk_buff
*) buffer
->skb
);
53 netif_vdbg(tx_queue
->efx
, tx_done
, tx_queue
->efx
->net_dev
,
54 "TX queue %d transmission id %x complete\n",
55 tx_queue
->queue
, tx_queue
->read_count
);
60 * struct efx_tso_header - a DMA mapped buffer for packet headers
61 * @next: Linked list of free ones.
62 * The list is protected by the TX queue lock.
63 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
64 * @dma_addr: The DMA address of the header below.
66 * This controls the memory used for a TSO header. Use TSOH_DATA()
67 * to find the packet header data. Use TSOH_SIZE() to calculate the
68 * total size required for a given packet header length. TSO headers
69 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
71 struct efx_tso_header
{
73 struct efx_tso_header
*next
;
79 static int efx_enqueue_skb_tso(struct efx_tx_queue
*tx_queue
,
81 static void efx_fini_tso(struct efx_tx_queue
*tx_queue
);
82 static void efx_tsoh_heap_free(struct efx_tx_queue
*tx_queue
,
83 struct efx_tso_header
*tsoh
);
85 static void efx_tsoh_free(struct efx_tx_queue
*tx_queue
,
86 struct efx_tx_buffer
*buffer
)
89 if (likely(!buffer
->tsoh
->unmap_len
)) {
90 buffer
->tsoh
->next
= tx_queue
->tso_headers_free
;
91 tx_queue
->tso_headers_free
= buffer
->tsoh
;
93 efx_tsoh_heap_free(tx_queue
, buffer
->tsoh
);
100 static inline unsigned
101 efx_max_tx_len(struct efx_nic
*efx
, dma_addr_t dma_addr
)
103 /* Depending on the NIC revision, we can use descriptor
104 * lengths up to 8K or 8K-1. However, since PCI Express
105 * devices must split read requests at 4K boundaries, there is
106 * little benefit from using descriptors that cross those
107 * boundaries and we keep things simple by not doing so.
109 unsigned len
= (~dma_addr
& 0xfff) + 1;
111 /* Work around hardware bug for unaligned buffers. */
112 if (EFX_WORKAROUND_5391(efx
) && (dma_addr
& 0xf))
113 len
= min_t(unsigned, len
, 512 - (dma_addr
& 0xf));
119 * Add a socket buffer to a TX queue
121 * This maps all fragments of a socket buffer for DMA and adds them to
122 * the TX queue. The queue's insert pointer will be incremented by
123 * the number of fragments in the socket buffer.
125 * If any DMA mapping fails, any mapped fragments will be unmapped,
126 * the queue's insert pointer will be restored to its original value.
128 * This function is split out from efx_hard_start_xmit to allow the
129 * loopback test to direct packets via specific TX queues.
131 * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
132 * You must hold netif_tx_lock() to call this function.
134 netdev_tx_t
efx_enqueue_skb(struct efx_tx_queue
*tx_queue
, struct sk_buff
*skb
)
136 struct efx_nic
*efx
= tx_queue
->efx
;
137 struct pci_dev
*pci_dev
= efx
->pci_dev
;
138 struct efx_tx_buffer
*buffer
;
139 skb_frag_t
*fragment
;
142 unsigned int len
, unmap_len
= 0, fill_level
, insert_ptr
;
143 dma_addr_t dma_addr
, unmap_addr
= 0;
144 unsigned int dma_len
;
147 netdev_tx_t rc
= NETDEV_TX_OK
;
149 EFX_BUG_ON_PARANOID(tx_queue
->write_count
!= tx_queue
->insert_count
);
151 if (skb_shinfo(skb
)->gso_size
)
152 return efx_enqueue_skb_tso(tx_queue
, skb
);
154 /* Get size of the initial fragment */
155 len
= skb_headlen(skb
);
157 /* Pad if necessary */
158 if (EFX_WORKAROUND_15592(efx
) && skb
->len
<= 32) {
159 EFX_BUG_ON_PARANOID(skb
->data_len
);
161 if (skb_pad(skb
, len
- skb
->len
))
165 fill_level
= tx_queue
->insert_count
- tx_queue
->old_read_count
;
166 q_space
= efx
->txq_entries
- 1 - fill_level
;
168 /* Map for DMA. Use pci_map_single rather than pci_map_page
169 * since this is more efficient on machines with sparse
173 dma_addr
= pci_map_single(pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
175 /* Process all fragments */
177 if (unlikely(pci_dma_mapping_error(pci_dev
, dma_addr
)))
180 /* Store fields for marking in the per-fragment final
183 unmap_addr
= dma_addr
;
185 /* Add to TX queue, splitting across DMA boundaries */
187 if (unlikely(q_space
-- <= 0)) {
188 /* It might be that completions have
189 * happened since the xmit path last
190 * checked. Update the xmit path's
191 * copy of read_count.
193 netif_tx_stop_queue(tx_queue
->core_txq
);
194 /* This memory barrier protects the
195 * change of queue state from the access
198 tx_queue
->old_read_count
=
199 ACCESS_ONCE(tx_queue
->read_count
);
200 fill_level
= (tx_queue
->insert_count
201 - tx_queue
->old_read_count
);
202 q_space
= efx
->txq_entries
- 1 - fill_level
;
203 if (unlikely(q_space
-- <= 0)) {
208 if (likely(!efx
->loopback_selftest
))
209 netif_tx_start_queue(
213 insert_ptr
= tx_queue
->insert_count
& tx_queue
->ptr_mask
;
214 buffer
= &tx_queue
->buffer
[insert_ptr
];
215 efx_tsoh_free(tx_queue
, buffer
);
216 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
217 EFX_BUG_ON_PARANOID(buffer
->skb
);
218 EFX_BUG_ON_PARANOID(buffer
->len
);
219 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
220 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
222 dma_len
= efx_max_tx_len(efx
, dma_addr
);
223 if (likely(dma_len
>= len
))
226 /* Fill out per descriptor fields */
227 buffer
->len
= dma_len
;
228 buffer
->dma_addr
= dma_addr
;
231 ++tx_queue
->insert_count
;
234 /* Transfer ownership of the unmapping to the final buffer */
235 buffer
->unmap_single
= unmap_single
;
236 buffer
->unmap_len
= unmap_len
;
239 /* Get address and size of next fragment */
240 if (i
>= skb_shinfo(skb
)->nr_frags
)
242 fragment
= &skb_shinfo(skb
)->frags
[i
];
243 len
= fragment
->size
;
244 page
= fragment
->page
;
245 page_offset
= fragment
->page_offset
;
248 unmap_single
= false;
249 dma_addr
= pci_map_page(pci_dev
, page
, page_offset
, len
,
253 /* Transfer ownership of the skb to the final buffer */
255 buffer
->continuation
= false;
257 /* Pass off to hardware */
258 efx_nic_push_buffers(tx_queue
);
263 netif_err(efx
, tx_err
, efx
->net_dev
,
264 " TX queue %d could not map skb with %d bytes %d "
265 "fragments for DMA\n", tx_queue
->queue
, skb
->len
,
266 skb_shinfo(skb
)->nr_frags
+ 1);
268 /* Mark the packet as transmitted, and free the SKB ourselves */
269 dev_kfree_skb_any(skb
);
272 /* Work backwards until we hit the original insert pointer value */
273 while (tx_queue
->insert_count
!= tx_queue
->write_count
) {
274 --tx_queue
->insert_count
;
275 insert_ptr
= tx_queue
->insert_count
& tx_queue
->ptr_mask
;
276 buffer
= &tx_queue
->buffer
[insert_ptr
];
277 efx_dequeue_buffer(tx_queue
, buffer
);
281 /* Free the fragment we were mid-way through pushing */
284 pci_unmap_single(pci_dev
, unmap_addr
, unmap_len
,
287 pci_unmap_page(pci_dev
, unmap_addr
, unmap_len
,
294 /* Remove packets from the TX queue
296 * This removes packets from the TX queue, up to and including the
299 static void efx_dequeue_buffers(struct efx_tx_queue
*tx_queue
,
302 struct efx_nic
*efx
= tx_queue
->efx
;
303 unsigned int stop_index
, read_ptr
;
305 stop_index
= (index
+ 1) & tx_queue
->ptr_mask
;
306 read_ptr
= tx_queue
->read_count
& tx_queue
->ptr_mask
;
308 while (read_ptr
!= stop_index
) {
309 struct efx_tx_buffer
*buffer
= &tx_queue
->buffer
[read_ptr
];
310 if (unlikely(buffer
->len
== 0)) {
311 netif_err(efx
, tx_err
, efx
->net_dev
,
312 "TX queue %d spurious TX completion id %x\n",
313 tx_queue
->queue
, read_ptr
);
314 efx_schedule_reset(efx
, RESET_TYPE_TX_SKIP
);
318 efx_dequeue_buffer(tx_queue
, buffer
);
319 buffer
->continuation
= true;
322 ++tx_queue
->read_count
;
323 read_ptr
= tx_queue
->read_count
& tx_queue
->ptr_mask
;
327 /* Initiate a packet transmission. We use one channel per CPU
328 * (sharing when we have more CPUs than channels). On Falcon, the TX
329 * completion events will be directed back to the CPU that transmitted
330 * the packet, which should be cache-efficient.
332 * Context: non-blocking.
333 * Note that returning anything other than NETDEV_TX_OK will cause the
334 * OS to free the skb.
336 netdev_tx_t
efx_hard_start_xmit(struct sk_buff
*skb
,
337 struct net_device
*net_dev
)
339 struct efx_nic
*efx
= netdev_priv(net_dev
);
340 struct efx_tx_queue
*tx_queue
;
341 unsigned index
, type
;
343 EFX_WARN_ON_PARANOID(!netif_device_present(net_dev
));
345 index
= skb_get_queue_mapping(skb
);
346 type
= skb
->ip_summed
== CHECKSUM_PARTIAL
? EFX_TXQ_TYPE_OFFLOAD
: 0;
347 if (index
>= efx
->n_tx_channels
) {
348 index
-= efx
->n_tx_channels
;
349 type
|= EFX_TXQ_TYPE_HIGHPRI
;
351 tx_queue
= efx_get_tx_queue(efx
, index
, type
);
353 return efx_enqueue_skb(tx_queue
, skb
);
356 void efx_init_tx_queue_core_txq(struct efx_tx_queue
*tx_queue
)
358 struct efx_nic
*efx
= tx_queue
->efx
;
360 /* Must be inverse of queue lookup in efx_hard_start_xmit() */
362 netdev_get_tx_queue(efx
->net_dev
,
363 tx_queue
->queue
/ EFX_TXQ_TYPES
+
364 ((tx_queue
->queue
& EFX_TXQ_TYPE_HIGHPRI
) ?
365 efx
->n_tx_channels
: 0));
368 int efx_setup_tc(struct net_device
*net_dev
, u8 num_tc
)
370 struct efx_nic
*efx
= netdev_priv(net_dev
);
371 struct efx_channel
*channel
;
372 struct efx_tx_queue
*tx_queue
;
376 if (efx_nic_rev(efx
) < EFX_REV_FALCON_B0
|| num_tc
> EFX_MAX_TX_TC
)
379 if (num_tc
== net_dev
->num_tc
)
382 for (tc
= 0; tc
< num_tc
; tc
++) {
383 net_dev
->tc_to_txq
[tc
].offset
= tc
* efx
->n_tx_channels
;
384 net_dev
->tc_to_txq
[tc
].count
= efx
->n_tx_channels
;
387 if (num_tc
> net_dev
->num_tc
) {
388 /* Initialise high-priority queues as necessary */
389 efx_for_each_channel(channel
, efx
) {
390 efx_for_each_possible_channel_tx_queue(tx_queue
,
392 if (!(tx_queue
->queue
& EFX_TXQ_TYPE_HIGHPRI
))
394 if (!tx_queue
->buffer
) {
395 rc
= efx_probe_tx_queue(tx_queue
);
399 if (!tx_queue
->initialised
)
400 efx_init_tx_queue(tx_queue
);
401 efx_init_tx_queue_core_txq(tx_queue
);
405 /* Reduce number of classes before number of queues */
406 net_dev
->num_tc
= num_tc
;
409 rc
= netif_set_real_num_tx_queues(net_dev
,
410 max_t(int, num_tc
, 1) *
415 /* Do not destroy high-priority queues when they become
416 * unused. We would have to flush them first, and it is
417 * fairly difficult to flush a subset of TX queues. Leave
418 * it to efx_fini_channels().
421 net_dev
->num_tc
= num_tc
;
425 void efx_xmit_done(struct efx_tx_queue
*tx_queue
, unsigned int index
)
428 struct efx_nic
*efx
= tx_queue
->efx
;
430 EFX_BUG_ON_PARANOID(index
> tx_queue
->ptr_mask
);
432 efx_dequeue_buffers(tx_queue
, index
);
434 /* See if we need to restart the netif queue. This barrier
435 * separates the update of read_count from the test of the
438 if (unlikely(netif_tx_queue_stopped(tx_queue
->core_txq
)) &&
439 likely(efx
->port_enabled
) &&
440 likely(netif_device_present(efx
->net_dev
))) {
441 fill_level
= tx_queue
->insert_count
- tx_queue
->read_count
;
442 if (fill_level
< EFX_TXQ_THRESHOLD(efx
)) {
443 EFX_BUG_ON_PARANOID(!efx_dev_registered(efx
));
444 netif_tx_wake_queue(tx_queue
->core_txq
);
448 /* Check whether the hardware queue is now empty */
449 if ((int)(tx_queue
->read_count
- tx_queue
->old_write_count
) >= 0) {
450 tx_queue
->old_write_count
= ACCESS_ONCE(tx_queue
->write_count
);
451 if (tx_queue
->read_count
== tx_queue
->old_write_count
) {
453 tx_queue
->empty_read_count
=
454 tx_queue
->read_count
| EFX_EMPTY_COUNT_VALID
;
459 int efx_probe_tx_queue(struct efx_tx_queue
*tx_queue
)
461 struct efx_nic
*efx
= tx_queue
->efx
;
462 unsigned int entries
;
465 /* Create the smallest power-of-two aligned ring */
466 entries
= max(roundup_pow_of_two(efx
->txq_entries
), EFX_MIN_DMAQ_SIZE
);
467 EFX_BUG_ON_PARANOID(entries
> EFX_MAX_DMAQ_SIZE
);
468 tx_queue
->ptr_mask
= entries
- 1;
470 netif_dbg(efx
, probe
, efx
->net_dev
,
471 "creating TX queue %d size %#x mask %#x\n",
472 tx_queue
->queue
, efx
->txq_entries
, tx_queue
->ptr_mask
);
474 /* Allocate software ring */
475 tx_queue
->buffer
= kzalloc(entries
* sizeof(*tx_queue
->buffer
),
477 if (!tx_queue
->buffer
)
479 for (i
= 0; i
<= tx_queue
->ptr_mask
; ++i
)
480 tx_queue
->buffer
[i
].continuation
= true;
482 /* Allocate hardware ring */
483 rc
= efx_nic_probe_tx(tx_queue
);
490 kfree(tx_queue
->buffer
);
491 tx_queue
->buffer
= NULL
;
495 void efx_init_tx_queue(struct efx_tx_queue
*tx_queue
)
497 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
498 "initialising TX queue %d\n", tx_queue
->queue
);
500 tx_queue
->insert_count
= 0;
501 tx_queue
->write_count
= 0;
502 tx_queue
->old_write_count
= 0;
503 tx_queue
->read_count
= 0;
504 tx_queue
->old_read_count
= 0;
505 tx_queue
->empty_read_count
= 0 | EFX_EMPTY_COUNT_VALID
;
507 /* Set up TX descriptor ring */
508 efx_nic_init_tx(tx_queue
);
510 tx_queue
->initialised
= true;
513 void efx_release_tx_buffers(struct efx_tx_queue
*tx_queue
)
515 struct efx_tx_buffer
*buffer
;
517 if (!tx_queue
->buffer
)
520 /* Free any buffers left in the ring */
521 while (tx_queue
->read_count
!= tx_queue
->write_count
) {
522 buffer
= &tx_queue
->buffer
[tx_queue
->read_count
& tx_queue
->ptr_mask
];
523 efx_dequeue_buffer(tx_queue
, buffer
);
524 buffer
->continuation
= true;
527 ++tx_queue
->read_count
;
531 void efx_fini_tx_queue(struct efx_tx_queue
*tx_queue
)
533 if (!tx_queue
->initialised
)
536 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
537 "shutting down TX queue %d\n", tx_queue
->queue
);
539 tx_queue
->initialised
= false;
541 /* Flush TX queue, remove descriptor ring */
542 efx_nic_fini_tx(tx_queue
);
544 efx_release_tx_buffers(tx_queue
);
546 /* Free up TSO header cache */
547 efx_fini_tso(tx_queue
);
550 void efx_remove_tx_queue(struct efx_tx_queue
*tx_queue
)
552 if (!tx_queue
->buffer
)
555 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
556 "destroying TX queue %d\n", tx_queue
->queue
);
557 efx_nic_remove_tx(tx_queue
);
559 kfree(tx_queue
->buffer
);
560 tx_queue
->buffer
= NULL
;
564 /* Efx TCP segmentation acceleration.
566 * Why? Because by doing it here in the driver we can go significantly
567 * faster than the GSO.
569 * Requires TX checksum offload support.
572 /* Number of bytes inserted at the start of a TSO header buffer,
573 * similar to NET_IP_ALIGN.
575 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
576 #define TSOH_OFFSET 0
578 #define TSOH_OFFSET NET_IP_ALIGN
581 #define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
583 /* Total size of struct efx_tso_header, buffer and padding */
584 #define TSOH_SIZE(hdr_len) \
585 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
587 /* Size of blocks on free list. Larger blocks must be allocated from
590 #define TSOH_STD_SIZE 128
592 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
593 #define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
594 #define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
595 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
596 #define SKB_IPV6_OFF(skb) PTR_DIFF(ipv6_hdr(skb), (skb)->data)
599 * struct tso_state - TSO state for an SKB
600 * @out_len: Remaining length in current segment
601 * @seqnum: Current sequence number
602 * @ipv4_id: Current IPv4 ID, host endian
603 * @packet_space: Remaining space in current packet
604 * @dma_addr: DMA address of current position
605 * @in_len: Remaining length in current SKB fragment
606 * @unmap_len: Length of SKB fragment
607 * @unmap_addr: DMA address of SKB fragment
608 * @unmap_single: DMA single vs page mapping flag
609 * @protocol: Network protocol (after any VLAN header)
610 * @header_len: Number of bytes of header
611 * @full_packet_size: Number of bytes to put in each outgoing segment
613 * The state used during segmentation. It is put into this data structure
614 * just to make it easy to pass into inline functions.
617 /* Output position */
621 unsigned packet_space
;
627 dma_addr_t unmap_addr
;
632 int full_packet_size
;
637 * Verify that our various assumptions about sk_buffs and the conditions
638 * under which TSO will be attempted hold true. Return the protocol number.
640 static __be16
efx_tso_check_protocol(struct sk_buff
*skb
)
642 __be16 protocol
= skb
->protocol
;
644 EFX_BUG_ON_PARANOID(((struct ethhdr
*)skb
->data
)->h_proto
!=
646 if (protocol
== htons(ETH_P_8021Q
)) {
647 /* Find the encapsulated protocol; reset network header
648 * and transport header based on that. */
649 struct vlan_ethhdr
*veh
= (struct vlan_ethhdr
*)skb
->data
;
650 protocol
= veh
->h_vlan_encapsulated_proto
;
651 skb_set_network_header(skb
, sizeof(*veh
));
652 if (protocol
== htons(ETH_P_IP
))
653 skb_set_transport_header(skb
, sizeof(*veh
) +
654 4 * ip_hdr(skb
)->ihl
);
655 else if (protocol
== htons(ETH_P_IPV6
))
656 skb_set_transport_header(skb
, sizeof(*veh
) +
657 sizeof(struct ipv6hdr
));
660 if (protocol
== htons(ETH_P_IP
)) {
661 EFX_BUG_ON_PARANOID(ip_hdr(skb
)->protocol
!= IPPROTO_TCP
);
663 EFX_BUG_ON_PARANOID(protocol
!= htons(ETH_P_IPV6
));
664 EFX_BUG_ON_PARANOID(ipv6_hdr(skb
)->nexthdr
!= NEXTHDR_TCP
);
666 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb
), skb
->data
)
667 + (tcp_hdr(skb
)->doff
<< 2u)) >
675 * Allocate a page worth of efx_tso_header structures, and string them
676 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
678 static int efx_tsoh_block_alloc(struct efx_tx_queue
*tx_queue
)
681 struct pci_dev
*pci_dev
= tx_queue
->efx
->pci_dev
;
682 struct efx_tso_header
*tsoh
;
686 base_kva
= pci_alloc_consistent(pci_dev
, PAGE_SIZE
, &dma_addr
);
687 if (base_kva
== NULL
) {
688 netif_err(tx_queue
->efx
, tx_err
, tx_queue
->efx
->net_dev
,
689 "Unable to allocate page for TSO headers\n");
693 /* pci_alloc_consistent() allocates pages. */
694 EFX_BUG_ON_PARANOID(dma_addr
& (PAGE_SIZE
- 1u));
696 for (kva
= base_kva
; kva
< base_kva
+ PAGE_SIZE
; kva
+= TSOH_STD_SIZE
) {
697 tsoh
= (struct efx_tso_header
*)kva
;
698 tsoh
->dma_addr
= dma_addr
+ (TSOH_BUFFER(tsoh
) - base_kva
);
699 tsoh
->next
= tx_queue
->tso_headers_free
;
700 tx_queue
->tso_headers_free
= tsoh
;
707 /* Free up a TSO header, and all others in the same page. */
708 static void efx_tsoh_block_free(struct efx_tx_queue
*tx_queue
,
709 struct efx_tso_header
*tsoh
,
710 struct pci_dev
*pci_dev
)
712 struct efx_tso_header
**p
;
713 unsigned long base_kva
;
716 base_kva
= (unsigned long)tsoh
& PAGE_MASK
;
717 base_dma
= tsoh
->dma_addr
& PAGE_MASK
;
719 p
= &tx_queue
->tso_headers_free
;
721 if (((unsigned long)*p
& PAGE_MASK
) == base_kva
)
727 pci_free_consistent(pci_dev
, PAGE_SIZE
, (void *)base_kva
, base_dma
);
730 static struct efx_tso_header
*
731 efx_tsoh_heap_alloc(struct efx_tx_queue
*tx_queue
, size_t header_len
)
733 struct efx_tso_header
*tsoh
;
735 tsoh
= kmalloc(TSOH_SIZE(header_len
), GFP_ATOMIC
| GFP_DMA
);
739 tsoh
->dma_addr
= pci_map_single(tx_queue
->efx
->pci_dev
,
740 TSOH_BUFFER(tsoh
), header_len
,
742 if (unlikely(pci_dma_mapping_error(tx_queue
->efx
->pci_dev
,
748 tsoh
->unmap_len
= header_len
;
753 efx_tsoh_heap_free(struct efx_tx_queue
*tx_queue
, struct efx_tso_header
*tsoh
)
755 pci_unmap_single(tx_queue
->efx
->pci_dev
,
756 tsoh
->dma_addr
, tsoh
->unmap_len
,
762 * efx_tx_queue_insert - push descriptors onto the TX queue
763 * @tx_queue: Efx TX queue
764 * @dma_addr: DMA address of fragment
765 * @len: Length of fragment
766 * @final_buffer: The final buffer inserted into the queue
768 * Push descriptors onto the TX queue. Return 0 on success or 1 if
771 static int efx_tx_queue_insert(struct efx_tx_queue
*tx_queue
,
772 dma_addr_t dma_addr
, unsigned len
,
773 struct efx_tx_buffer
**final_buffer
)
775 struct efx_tx_buffer
*buffer
;
776 struct efx_nic
*efx
= tx_queue
->efx
;
777 unsigned dma_len
, fill_level
, insert_ptr
;
780 EFX_BUG_ON_PARANOID(len
<= 0);
782 fill_level
= tx_queue
->insert_count
- tx_queue
->old_read_count
;
783 /* -1 as there is no way to represent all descriptors used */
784 q_space
= efx
->txq_entries
- 1 - fill_level
;
787 if (unlikely(q_space
-- <= 0)) {
788 /* It might be that completions have happened
789 * since the xmit path last checked. Update
790 * the xmit path's copy of read_count.
792 netif_tx_stop_queue(tx_queue
->core_txq
);
793 /* This memory barrier protects the change of
794 * queue state from the access of read_count. */
796 tx_queue
->old_read_count
=
797 ACCESS_ONCE(tx_queue
->read_count
);
798 fill_level
= (tx_queue
->insert_count
799 - tx_queue
->old_read_count
);
800 q_space
= efx
->txq_entries
- 1 - fill_level
;
801 if (unlikely(q_space
-- <= 0)) {
802 *final_buffer
= NULL
;
806 netif_tx_start_queue(tx_queue
->core_txq
);
809 insert_ptr
= tx_queue
->insert_count
& tx_queue
->ptr_mask
;
810 buffer
= &tx_queue
->buffer
[insert_ptr
];
811 ++tx_queue
->insert_count
;
813 EFX_BUG_ON_PARANOID(tx_queue
->insert_count
-
814 tx_queue
->read_count
>=
817 efx_tsoh_free(tx_queue
, buffer
);
818 EFX_BUG_ON_PARANOID(buffer
->len
);
819 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
820 EFX_BUG_ON_PARANOID(buffer
->skb
);
821 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
822 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
824 buffer
->dma_addr
= dma_addr
;
826 dma_len
= efx_max_tx_len(efx
, dma_addr
);
828 /* If there is enough space to send then do so */
832 buffer
->len
= dma_len
; /* Don't set the other members */
837 EFX_BUG_ON_PARANOID(!len
);
839 *final_buffer
= buffer
;
845 * Put a TSO header into the TX queue.
847 * This is special-cased because we know that it is small enough to fit in
848 * a single fragment, and we know it doesn't cross a page boundary. It
849 * also allows us to not worry about end-of-packet etc.
851 static void efx_tso_put_header(struct efx_tx_queue
*tx_queue
,
852 struct efx_tso_header
*tsoh
, unsigned len
)
854 struct efx_tx_buffer
*buffer
;
856 buffer
= &tx_queue
->buffer
[tx_queue
->insert_count
& tx_queue
->ptr_mask
];
857 efx_tsoh_free(tx_queue
, buffer
);
858 EFX_BUG_ON_PARANOID(buffer
->len
);
859 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
860 EFX_BUG_ON_PARANOID(buffer
->skb
);
861 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
862 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
864 buffer
->dma_addr
= tsoh
->dma_addr
;
867 ++tx_queue
->insert_count
;
871 /* Remove descriptors put into a tx_queue. */
872 static void efx_enqueue_unwind(struct efx_tx_queue
*tx_queue
)
874 struct efx_tx_buffer
*buffer
;
875 dma_addr_t unmap_addr
;
877 /* Work backwards until we hit the original insert pointer value */
878 while (tx_queue
->insert_count
!= tx_queue
->write_count
) {
879 --tx_queue
->insert_count
;
880 buffer
= &tx_queue
->buffer
[tx_queue
->insert_count
&
882 efx_tsoh_free(tx_queue
, buffer
);
883 EFX_BUG_ON_PARANOID(buffer
->skb
);
884 if (buffer
->unmap_len
) {
885 unmap_addr
= (buffer
->dma_addr
+ buffer
->len
-
887 if (buffer
->unmap_single
)
888 pci_unmap_single(tx_queue
->efx
->pci_dev
,
889 unmap_addr
, buffer
->unmap_len
,
892 pci_unmap_page(tx_queue
->efx
->pci_dev
,
893 unmap_addr
, buffer
->unmap_len
,
895 buffer
->unmap_len
= 0;
898 buffer
->continuation
= true;
903 /* Parse the SKB header and initialise state. */
904 static void tso_start(struct tso_state
*st
, const struct sk_buff
*skb
)
906 /* All ethernet/IP/TCP headers combined size is TCP header size
907 * plus offset of TCP header relative to start of packet.
909 st
->header_len
= ((tcp_hdr(skb
)->doff
<< 2u)
910 + PTR_DIFF(tcp_hdr(skb
), skb
->data
));
911 st
->full_packet_size
= st
->header_len
+ skb_shinfo(skb
)->gso_size
;
913 if (st
->protocol
== htons(ETH_P_IP
))
914 st
->ipv4_id
= ntohs(ip_hdr(skb
)->id
);
917 st
->seqnum
= ntohl(tcp_hdr(skb
)->seq
);
919 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->urg
);
920 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->syn
);
921 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->rst
);
923 st
->packet_space
= st
->full_packet_size
;
924 st
->out_len
= skb
->len
- st
->header_len
;
926 st
->unmap_single
= false;
929 static int tso_get_fragment(struct tso_state
*st
, struct efx_nic
*efx
,
932 st
->unmap_addr
= pci_map_page(efx
->pci_dev
, frag
->page
,
933 frag
->page_offset
, frag
->size
,
935 if (likely(!pci_dma_mapping_error(efx
->pci_dev
, st
->unmap_addr
))) {
936 st
->unmap_single
= false;
937 st
->unmap_len
= frag
->size
;
938 st
->in_len
= frag
->size
;
939 st
->dma_addr
= st
->unmap_addr
;
945 static int tso_get_head_fragment(struct tso_state
*st
, struct efx_nic
*efx
,
946 const struct sk_buff
*skb
)
948 int hl
= st
->header_len
;
949 int len
= skb_headlen(skb
) - hl
;
951 st
->unmap_addr
= pci_map_single(efx
->pci_dev
, skb
->data
+ hl
,
952 len
, PCI_DMA_TODEVICE
);
953 if (likely(!pci_dma_mapping_error(efx
->pci_dev
, st
->unmap_addr
))) {
954 st
->unmap_single
= true;
957 st
->dma_addr
= st
->unmap_addr
;
965 * tso_fill_packet_with_fragment - form descriptors for the current fragment
966 * @tx_queue: Efx TX queue
967 * @skb: Socket buffer
970 * Form descriptors for the current fragment, until we reach the end
971 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
972 * space in @tx_queue.
974 static int tso_fill_packet_with_fragment(struct efx_tx_queue
*tx_queue
,
975 const struct sk_buff
*skb
,
976 struct tso_state
*st
)
978 struct efx_tx_buffer
*buffer
;
979 int n
, end_of_packet
, rc
;
983 if (st
->packet_space
== 0)
986 EFX_BUG_ON_PARANOID(st
->in_len
<= 0);
987 EFX_BUG_ON_PARANOID(st
->packet_space
<= 0);
989 n
= min(st
->in_len
, st
->packet_space
);
991 st
->packet_space
-= n
;
995 rc
= efx_tx_queue_insert(tx_queue
, st
->dma_addr
, n
, &buffer
);
996 if (likely(rc
== 0)) {
997 if (st
->out_len
== 0)
998 /* Transfer ownership of the skb */
1001 end_of_packet
= st
->out_len
== 0 || st
->packet_space
== 0;
1002 buffer
->continuation
= !end_of_packet
;
1004 if (st
->in_len
== 0) {
1005 /* Transfer ownership of the pci mapping */
1006 buffer
->unmap_len
= st
->unmap_len
;
1007 buffer
->unmap_single
= st
->unmap_single
;
1018 * tso_start_new_packet - generate a new header and prepare for the new packet
1019 * @tx_queue: Efx TX queue
1020 * @skb: Socket buffer
1023 * Generate a new header and prepare for the new packet. Return 0 on
1024 * success, or -1 if failed to alloc header.
1026 static int tso_start_new_packet(struct efx_tx_queue
*tx_queue
,
1027 const struct sk_buff
*skb
,
1028 struct tso_state
*st
)
1030 struct efx_tso_header
*tsoh
;
1031 struct tcphdr
*tsoh_th
;
1035 /* Allocate a DMA-mapped header buffer. */
1036 if (likely(TSOH_SIZE(st
->header_len
) <= TSOH_STD_SIZE
)) {
1037 if (tx_queue
->tso_headers_free
== NULL
) {
1038 if (efx_tsoh_block_alloc(tx_queue
))
1041 EFX_BUG_ON_PARANOID(!tx_queue
->tso_headers_free
);
1042 tsoh
= tx_queue
->tso_headers_free
;
1043 tx_queue
->tso_headers_free
= tsoh
->next
;
1044 tsoh
->unmap_len
= 0;
1046 tx_queue
->tso_long_headers
++;
1047 tsoh
= efx_tsoh_heap_alloc(tx_queue
, st
->header_len
);
1048 if (unlikely(!tsoh
))
1052 header
= TSOH_BUFFER(tsoh
);
1053 tsoh_th
= (struct tcphdr
*)(header
+ SKB_TCP_OFF(skb
));
1055 /* Copy and update the headers. */
1056 memcpy(header
, skb
->data
, st
->header_len
);
1058 tsoh_th
->seq
= htonl(st
->seqnum
);
1059 st
->seqnum
+= skb_shinfo(skb
)->gso_size
;
1060 if (st
->out_len
> skb_shinfo(skb
)->gso_size
) {
1061 /* This packet will not finish the TSO burst. */
1062 ip_length
= st
->full_packet_size
- ETH_HDR_LEN(skb
);
1066 /* This packet will be the last in the TSO burst. */
1067 ip_length
= st
->header_len
- ETH_HDR_LEN(skb
) + st
->out_len
;
1068 tsoh_th
->fin
= tcp_hdr(skb
)->fin
;
1069 tsoh_th
->psh
= tcp_hdr(skb
)->psh
;
1072 if (st
->protocol
== htons(ETH_P_IP
)) {
1073 struct iphdr
*tsoh_iph
=
1074 (struct iphdr
*)(header
+ SKB_IPV4_OFF(skb
));
1076 tsoh_iph
->tot_len
= htons(ip_length
);
1078 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
1079 tsoh_iph
->id
= htons(st
->ipv4_id
);
1082 struct ipv6hdr
*tsoh_iph
=
1083 (struct ipv6hdr
*)(header
+ SKB_IPV6_OFF(skb
));
1085 tsoh_iph
->payload_len
= htons(ip_length
- sizeof(*tsoh_iph
));
1088 st
->packet_space
= skb_shinfo(skb
)->gso_size
;
1089 ++tx_queue
->tso_packets
;
1091 /* Form a descriptor for this header. */
1092 efx_tso_put_header(tx_queue
, tsoh
, st
->header_len
);
1099 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
1100 * @tx_queue: Efx TX queue
1101 * @skb: Socket buffer
1103 * Context: You must hold netif_tx_lock() to call this function.
1105 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1106 * @skb was not enqueued. In all cases @skb is consumed. Return
1107 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1109 static int efx_enqueue_skb_tso(struct efx_tx_queue
*tx_queue
,
1110 struct sk_buff
*skb
)
1112 struct efx_nic
*efx
= tx_queue
->efx
;
1113 int frag_i
, rc
, rc2
= NETDEV_TX_OK
;
1114 struct tso_state state
;
1116 /* Find the packet protocol and sanity-check it */
1117 state
.protocol
= efx_tso_check_protocol(skb
);
1119 EFX_BUG_ON_PARANOID(tx_queue
->write_count
!= tx_queue
->insert_count
);
1121 tso_start(&state
, skb
);
1123 /* Assume that skb header area contains exactly the headers, and
1124 * all payload is in the frag list.
1126 if (skb_headlen(skb
) == state
.header_len
) {
1127 /* Grab the first payload fragment. */
1128 EFX_BUG_ON_PARANOID(skb_shinfo(skb
)->nr_frags
< 1);
1130 rc
= tso_get_fragment(&state
, efx
,
1131 skb_shinfo(skb
)->frags
+ frag_i
);
1135 rc
= tso_get_head_fragment(&state
, efx
, skb
);
1141 if (tso_start_new_packet(tx_queue
, skb
, &state
) < 0)
1145 rc
= tso_fill_packet_with_fragment(tx_queue
, skb
, &state
);
1147 rc2
= NETDEV_TX_BUSY
;
1151 /* Move onto the next fragment? */
1152 if (state
.in_len
== 0) {
1153 if (++frag_i
>= skb_shinfo(skb
)->nr_frags
)
1154 /* End of payload reached. */
1156 rc
= tso_get_fragment(&state
, efx
,
1157 skb_shinfo(skb
)->frags
+ frag_i
);
1162 /* Start at new packet? */
1163 if (state
.packet_space
== 0 &&
1164 tso_start_new_packet(tx_queue
, skb
, &state
) < 0)
1168 /* Pass off to hardware */
1169 efx_nic_push_buffers(tx_queue
);
1171 tx_queue
->tso_bursts
++;
1172 return NETDEV_TX_OK
;
1175 netif_err(efx
, tx_err
, efx
->net_dev
,
1176 "Out of memory for TSO headers, or PCI mapping error\n");
1177 dev_kfree_skb_any(skb
);
1180 /* Free the DMA mapping we were in the process of writing out */
1181 if (state
.unmap_len
) {
1182 if (state
.unmap_single
)
1183 pci_unmap_single(efx
->pci_dev
, state
.unmap_addr
,
1184 state
.unmap_len
, PCI_DMA_TODEVICE
);
1186 pci_unmap_page(efx
->pci_dev
, state
.unmap_addr
,
1187 state
.unmap_len
, PCI_DMA_TODEVICE
);
1190 efx_enqueue_unwind(tx_queue
);
1196 * Free up all TSO datastructures associated with tx_queue. This
1197 * routine should be called only once the tx_queue is both empty and
1198 * will no longer be used.
1200 static void efx_fini_tso(struct efx_tx_queue
*tx_queue
)
1204 if (tx_queue
->buffer
) {
1205 for (i
= 0; i
<= tx_queue
->ptr_mask
; ++i
)
1206 efx_tsoh_free(tx_queue
, &tx_queue
->buffer
[i
]);
1209 while (tx_queue
->tso_headers_free
!= NULL
)
1210 efx_tsoh_block_free(tx_queue
, tx_queue
->tso_headers_free
,
1211 tx_queue
->efx
->pci_dev
);