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sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / usb / smsc95xx.c
blobf74f3ce7152630fc7adaf43cc6ce107fc8dd6214
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include <linux/slab.h>
32 #include "smsc95xx.h"
33
34 #define SMSC_CHIPNAME "smsc95xx"
35 #define SMSC_DRIVER_VERSION "1.0.4"
36 #define HS_USB_PKT_SIZE (512)
37 #define FS_USB_PKT_SIZE (64)
38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40 #define DEFAULT_BULK_IN_DELAY (0x00002000)
41 #define MAX_SINGLE_PACKET_SIZE (2048)
42 #define LAN95XX_EEPROM_MAGIC (0x9500)
43 #define EEPROM_MAC_OFFSET (0x01)
44 #define DEFAULT_TX_CSUM_ENABLE (true)
45 #define DEFAULT_RX_CSUM_ENABLE (true)
46 #define SMSC95XX_INTERNAL_PHY_ID (1)
47 #define SMSC95XX_TX_OVERHEAD (8)
48 #define SMSC95XX_TX_OVERHEAD_CSUM (12)
49
50 struct smsc95xx_priv {
51 u32 mac_cr;
52 u32 hash_hi;
53 u32 hash_lo;
54 spinlock_t mac_cr_lock;
55 };
56
57 struct usb_context {
58 struct usb_ctrlrequest req;
59 struct usbnet *dev;
60 };
61
62 static int turbo_mode = true;
63 module_param(turbo_mode, bool, 0644);
64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
65
66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
67 {
68 u32 *buf = kmalloc(4, GFP_KERNEL);
69 int ret;
70
71 BUG_ON(!dev);
72
73 if (!buf)
74 return -ENOMEM;
75
76 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
77 USB_VENDOR_REQUEST_READ_REGISTER,
78 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
79 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
80
81 if (unlikely(ret < 0))
82 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
83
84 le32_to_cpus(buf);
85 *data = *buf;
86 kfree(buf);
87
88 return ret;
89 }
90
91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
92 {
93 u32 *buf = kmalloc(4, GFP_KERNEL);
94 int ret;
95
96 BUG_ON(!dev);
97
98 if (!buf)
99 return -ENOMEM;
100
101 *buf = data;
102 cpu_to_le32s(buf);
103
104 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
105 USB_VENDOR_REQUEST_WRITE_REGISTER,
106 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
107 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
108
109 if (unlikely(ret < 0))
110 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
111
112 kfree(buf);
113
114 return ret;
115 }
116
117 /* Loop until the read is completed with timeout
118 * called with phy_mutex held */
119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
120 {
121 unsigned long start_time = jiffies;
122 u32 val;
123
124 do {
125 smsc95xx_read_reg(dev, MII_ADDR, &val);
126 if (!(val & MII_BUSY_))
127 return 0;
128 } while (!time_after(jiffies, start_time + HZ));
129
130 return -EIO;
131 }
132
133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
134 {
135 struct usbnet *dev = netdev_priv(netdev);
136 u32 val, addr;
137
138 mutex_lock(&dev->phy_mutex);
139
140 /* confirm MII not busy */
141 if (smsc95xx_phy_wait_not_busy(dev)) {
142 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
143 mutex_unlock(&dev->phy_mutex);
144 return -EIO;
145 }
146
147 /* set the address, index & direction (read from PHY) */
148 phy_id &= dev->mii.phy_id_mask;
149 idx &= dev->mii.reg_num_mask;
150 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
151 smsc95xx_write_reg(dev, MII_ADDR, addr);
152
153 if (smsc95xx_phy_wait_not_busy(dev)) {
154 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
155 mutex_unlock(&dev->phy_mutex);
156 return -EIO;
157 }
158
159 smsc95xx_read_reg(dev, MII_DATA, &val);
160
161 mutex_unlock(&dev->phy_mutex);
162
163 return (u16)(val & 0xFFFF);
164 }
165
166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
167 int regval)
168 {
169 struct usbnet *dev = netdev_priv(netdev);
170 u32 val, addr;
171
172 mutex_lock(&dev->phy_mutex);
173
174 /* confirm MII not busy */
175 if (smsc95xx_phy_wait_not_busy(dev)) {
176 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
177 mutex_unlock(&dev->phy_mutex);
178 return;
179 }
180
181 val = regval;
182 smsc95xx_write_reg(dev, MII_DATA, val);
183
184 /* set the address, index & direction (write to PHY) */
185 phy_id &= dev->mii.phy_id_mask;
186 idx &= dev->mii.reg_num_mask;
187 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
188 smsc95xx_write_reg(dev, MII_ADDR, addr);
189
190 if (smsc95xx_phy_wait_not_busy(dev))
191 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
192
193 mutex_unlock(&dev->phy_mutex);
194 }
195
196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
197 {
198 unsigned long start_time = jiffies;
199 u32 val;
200
201 do {
202 smsc95xx_read_reg(dev, E2P_CMD, &val);
203 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
204 break;
205 udelay(40);
206 } while (!time_after(jiffies, start_time + HZ));
207
208 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
209 netdev_warn(dev->net, "EEPROM read operation timeout\n");
210 return -EIO;
211 }
212
213 return 0;
214 }
215
216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
217 {
218 unsigned long start_time = jiffies;
219 u32 val;
220
221 do {
222 smsc95xx_read_reg(dev, E2P_CMD, &val);
223
224 if (!(val & E2P_CMD_BUSY_))
225 return 0;
226
227 udelay(40);
228 } while (!time_after(jiffies, start_time + HZ));
229
230 netdev_warn(dev->net, "EEPROM is busy\n");
231 return -EIO;
232 }
233
234 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
235 u8 *data)
236 {
237 u32 val;
238 int i, ret;
239
240 BUG_ON(!dev);
241 BUG_ON(!data);
242
243 ret = smsc95xx_eeprom_confirm_not_busy(dev);
244 if (ret)
245 return ret;
246
247 for (i = 0; i < length; i++) {
248 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
249 smsc95xx_write_reg(dev, E2P_CMD, val);
250
251 ret = smsc95xx_wait_eeprom(dev);
252 if (ret < 0)
253 return ret;
254
255 smsc95xx_read_reg(dev, E2P_DATA, &val);
256
257 data[i] = val & 0xFF;
258 offset++;
259 }
260
261 return 0;
262 }
263
264 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
265 u8 *data)
266 {
267 u32 val;
268 int i, ret;
269
270 BUG_ON(!dev);
271 BUG_ON(!data);
272
273 ret = smsc95xx_eeprom_confirm_not_busy(dev);
274 if (ret)
275 return ret;
276
277 /* Issue write/erase enable command */
278 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
279 smsc95xx_write_reg(dev, E2P_CMD, val);
280
281 ret = smsc95xx_wait_eeprom(dev);
282 if (ret < 0)
283 return ret;
284
285 for (i = 0; i < length; i++) {
286
287 /* Fill data register */
288 val = data[i];
289 smsc95xx_write_reg(dev, E2P_DATA, val);
290
291 /* Send "write" command */
292 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
293 smsc95xx_write_reg(dev, E2P_CMD, val);
294
295 ret = smsc95xx_wait_eeprom(dev);
296 if (ret < 0)
297 return ret;
298
299 offset++;
300 }
301
302 return 0;
303 }
304
305 static void smsc95xx_async_cmd_callback(struct urb *urb)
306 {
307 struct usb_context *usb_context = urb->context;
308 struct usbnet *dev = usb_context->dev;
309 int status = urb->status;
310
311 if (status < 0)
312 netdev_warn(dev->net, "async callback failed with %d\n", status);
313
314 kfree(usb_context);
315 usb_free_urb(urb);
316 }
317
318 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
319 {
320 struct usb_context *usb_context;
321 int status;
322 struct urb *urb;
323 const u16 size = 4;
324
325 urb = usb_alloc_urb(0, GFP_ATOMIC);
326 if (!urb) {
327 netdev_warn(dev->net, "Error allocating URB\n");
328 return -ENOMEM;
329 }
330
331 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
332 if (usb_context == NULL) {
333 netdev_warn(dev->net, "Error allocating control msg\n");
334 usb_free_urb(urb);
335 return -ENOMEM;
336 }
337
338 usb_context->req.bRequestType =
339 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
340 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
341 usb_context->req.wValue = 00;
342 usb_context->req.wIndex = cpu_to_le16(index);
343 usb_context->req.wLength = cpu_to_le16(size);
344
345 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
346 (void *)&usb_context->req, data, size,
347 smsc95xx_async_cmd_callback,
348 (void *)usb_context);
349
350 status = usb_submit_urb(urb, GFP_ATOMIC);
351 if (status < 0) {
352 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
353 status);
354 kfree(usb_context);
355 usb_free_urb(urb);
356 }
357
358 return status;
359 }
360
361 /* returns hash bit number for given MAC address
362 * example:
363 * 01 00 5E 00 00 01 -> returns bit number 31 */
364 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
365 {
366 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
367 }
368
369 static void smsc95xx_set_multicast(struct net_device *netdev)
370 {
371 struct usbnet *dev = netdev_priv(netdev);
372 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
373 unsigned long flags;
374
375 pdata->hash_hi = 0;
376 pdata->hash_lo = 0;
377
378 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
379
380 if (dev->net->flags & IFF_PROMISC) {
381 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
382 pdata->mac_cr |= MAC_CR_PRMS_;
383 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
384 } else if (dev->net->flags & IFF_ALLMULTI) {
385 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
386 pdata->mac_cr |= MAC_CR_MCPAS_;
387 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
388 } else if (!netdev_mc_empty(dev->net)) {
389 struct netdev_hw_addr *ha;
390
391 pdata->mac_cr |= MAC_CR_HPFILT_;
392 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
393
394 netdev_for_each_mc_addr(ha, netdev) {
395 u32 bitnum = smsc95xx_hash(ha->addr);
396 u32 mask = 0x01 << (bitnum & 0x1F);
397 if (bitnum & 0x20)
398 pdata->hash_hi |= mask;
399 else
400 pdata->hash_lo |= mask;
401 }
402
403 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
404 pdata->hash_hi, pdata->hash_lo);
405 } else {
406 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
407 pdata->mac_cr &=
408 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
409 }
410
411 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
412
413 /* Initiate async writes, as we can't wait for completion here */
414 smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
415 smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
416 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
417 }
418
419 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
420 u16 lcladv, u16 rmtadv)
421 {
422 u32 flow, afc_cfg = 0;
423
424 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
425 if (ret < 0) {
426 netdev_warn(dev->net, "error reading AFC_CFG\n");
427 return;
428 }
429
430 if (duplex == DUPLEX_FULL) {
431 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
432
433 if (cap & FLOW_CTRL_RX)
434 flow = 0xFFFF0002;
435 else
436 flow = 0;
437
438 if (cap & FLOW_CTRL_TX)
439 afc_cfg |= 0xF;
440 else
441 afc_cfg &= ~0xF;
442
443 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
444 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
445 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
446 } else {
447 netif_dbg(dev, link, dev->net, "half duplex\n");
448 flow = 0;
449 afc_cfg |= 0xF;
450 }
451
452 smsc95xx_write_reg(dev, FLOW, flow);
453 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
454 }
455
456 static int smsc95xx_link_reset(struct usbnet *dev)
457 {
458 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
459 struct mii_if_info *mii = &dev->mii;
460 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
461 unsigned long flags;
462 u16 lcladv, rmtadv;
463 u32 intdata;
464
465 /* clear interrupt status */
466 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
467 intdata = 0xFFFFFFFF;
468 smsc95xx_write_reg(dev, INT_STS, intdata);
469
470 mii_check_media(mii, 1, 1);
471 mii_ethtool_gset(&dev->mii, &ecmd);
472 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
473 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
474
475 netif_dbg(dev, link, dev->net,
476 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
477 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
478
479 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
480 if (ecmd.duplex != DUPLEX_FULL) {
481 pdata->mac_cr &= ~MAC_CR_FDPX_;
482 pdata->mac_cr |= MAC_CR_RCVOWN_;
483 } else {
484 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
485 pdata->mac_cr |= MAC_CR_FDPX_;
486 }
487 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
488
489 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
490
491 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
492
493 return 0;
494 }
495
496 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
497 {
498 u32 intdata;
499
500 if (urb->actual_length != 4) {
501 netdev_warn(dev->net, "unexpected urb length %d\n",
502 urb->actual_length);
503 return;
504 }
505
506 memcpy(&intdata, urb->transfer_buffer, 4);
507 le32_to_cpus(&intdata);
508
509 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
510
511 if (intdata & INT_ENP_PHY_INT_)
512 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
513 else
514 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
515 intdata);
516 }
517
518 /* Enable or disable Tx & Rx checksum offload engines */
519 static int smsc95xx_set_features(struct net_device *netdev, u32 features)
520 {
521 struct usbnet *dev = netdev_priv(netdev);
522 u32 read_buf;
523 int ret;
524
525 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
526 if (ret < 0) {
527 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
528 return ret;
529 }
530
531 if (features & NETIF_F_HW_CSUM)
532 read_buf |= Tx_COE_EN_;
533 else
534 read_buf &= ~Tx_COE_EN_;
535
536 if (features & NETIF_F_RXCSUM)
537 read_buf |= Rx_COE_EN_;
538 else
539 read_buf &= ~Rx_COE_EN_;
540
541 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
542 if (ret < 0) {
543 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
544 return ret;
545 }
546
547 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
548 return 0;
549 }
550
551 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
552 {
553 return MAX_EEPROM_SIZE;
554 }
555
556 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
557 struct ethtool_eeprom *ee, u8 *data)
558 {
559 struct usbnet *dev = netdev_priv(netdev);
560
561 ee->magic = LAN95XX_EEPROM_MAGIC;
562
563 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
564 }
565
566 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
567 struct ethtool_eeprom *ee, u8 *data)
568 {
569 struct usbnet *dev = netdev_priv(netdev);
570
571 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
572 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
573 ee->magic);
574 return -EINVAL;
575 }
576
577 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
578 }
579
580 static const struct ethtool_ops smsc95xx_ethtool_ops = {
581 .get_link = usbnet_get_link,
582 .nway_reset = usbnet_nway_reset,
583 .get_drvinfo = usbnet_get_drvinfo,
584 .get_msglevel = usbnet_get_msglevel,
585 .set_msglevel = usbnet_set_msglevel,
586 .get_settings = usbnet_get_settings,
587 .set_settings = usbnet_set_settings,
588 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
589 .get_eeprom = smsc95xx_ethtool_get_eeprom,
590 .set_eeprom = smsc95xx_ethtool_set_eeprom,
591 };
592
593 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
594 {
595 struct usbnet *dev = netdev_priv(netdev);
596
597 if (!netif_running(netdev))
598 return -EINVAL;
599
600 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
601 }
602
603 static void smsc95xx_init_mac_address(struct usbnet *dev)
604 {
605 /* try reading mac address from EEPROM */
606 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
607 dev->net->dev_addr) == 0) {
608 if (is_valid_ether_addr(dev->net->dev_addr)) {
609 /* eeprom values are valid so use them */
610 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
611 return;
612 }
613 }
614
615 /* no eeprom, or eeprom values are invalid. generate random MAC */
616 random_ether_addr(dev->net->dev_addr);
617 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n");
618 }
619
620 static int smsc95xx_set_mac_address(struct usbnet *dev)
621 {
622 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
623 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
624 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
625 int ret;
626
627 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
628 if (ret < 0) {
629 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
630 return ret;
631 }
632
633 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
634 if (ret < 0) {
635 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
636 return ret;
637 }
638
639 return 0;
640 }
641
642 /* starts the TX path */
643 static void smsc95xx_start_tx_path(struct usbnet *dev)
644 {
645 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
646 unsigned long flags;
647 u32 reg_val;
648
649 /* Enable Tx at MAC */
650 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
651 pdata->mac_cr |= MAC_CR_TXEN_;
652 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
653
654 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
655
656 /* Enable Tx at SCSRs */
657 reg_val = TX_CFG_ON_;
658 smsc95xx_write_reg(dev, TX_CFG, reg_val);
659 }
660
661 /* Starts the Receive path */
662 static void smsc95xx_start_rx_path(struct usbnet *dev)
663 {
664 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
665 unsigned long flags;
666
667 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
668 pdata->mac_cr |= MAC_CR_RXEN_;
669 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
670
671 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
672 }
673
674 static int smsc95xx_phy_initialize(struct usbnet *dev)
675 {
676 int bmcr, timeout = 0;
677
678 /* Initialize MII structure */
679 dev->mii.dev = dev->net;
680 dev->mii.mdio_read = smsc95xx_mdio_read;
681 dev->mii.mdio_write = smsc95xx_mdio_write;
682 dev->mii.phy_id_mask = 0x1f;
683 dev->mii.reg_num_mask = 0x1f;
684 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
685
686 /* reset phy and wait for reset to complete */
687 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
688
689 do {
690 msleep(10);
691 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
692 timeout++;
693 } while ((bmcr & BMCR_RESET) && (timeout < 100));
694
695 if (timeout >= 100) {
696 netdev_warn(dev->net, "timeout on PHY Reset");
697 return -EIO;
698 }
699
700 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
701 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
702 ADVERTISE_PAUSE_ASYM);
703
704 /* read to clear */
705 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
706
707 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
708 PHY_INT_MASK_DEFAULT_);
709 mii_nway_restart(&dev->mii);
710
711 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
712 return 0;
713 }
714
715 static int smsc95xx_reset(struct usbnet *dev)
716 {
717 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
718 u32 read_buf, write_buf, burst_cap;
719 int ret = 0, timeout;
720
721 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
722
723 write_buf = HW_CFG_LRST_;
724 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
725 if (ret < 0) {
726 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
727 ret);
728 return ret;
729 }
730
731 timeout = 0;
732 do {
733 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
734 if (ret < 0) {
735 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
736 return ret;
737 }
738 msleep(10);
739 timeout++;
740 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
741
742 if (timeout >= 100) {
743 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
744 return ret;
745 }
746
747 write_buf = PM_CTL_PHY_RST_;
748 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
749 if (ret < 0) {
750 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
751 return ret;
752 }
753
754 timeout = 0;
755 do {
756 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
757 if (ret < 0) {
758 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
759 return ret;
760 }
761 msleep(10);
762 timeout++;
763 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
764
765 if (timeout >= 100) {
766 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
767 return ret;
768 }
769
770 ret = smsc95xx_set_mac_address(dev);
771 if (ret < 0)
772 return ret;
773
774 netif_dbg(dev, ifup, dev->net,
775 "MAC Address: %pM\n", dev->net->dev_addr);
776
777 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
778 if (ret < 0) {
779 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
780 return ret;
781 }
782
783 netif_dbg(dev, ifup, dev->net,
784 "Read Value from HW_CFG : 0x%08x\n", read_buf);
785
786 read_buf |= HW_CFG_BIR_;
787
788 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
789 if (ret < 0) {
790 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
791 ret);
792 return ret;
793 }
794
795 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
796 if (ret < 0) {
797 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
798 return ret;
799 }
800 netif_dbg(dev, ifup, dev->net,
801 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
802 read_buf);
803
804 if (!turbo_mode) {
805 burst_cap = 0;
806 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
807 } else if (dev->udev->speed == USB_SPEED_HIGH) {
808 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
809 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
810 } else {
811 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
812 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
813 }
814
815 netif_dbg(dev, ifup, dev->net,
816 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
817
818 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
819 if (ret < 0) {
820 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
821 return ret;
822 }
823
824 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
825 if (ret < 0) {
826 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
827 return ret;
828 }
829 netif_dbg(dev, ifup, dev->net,
830 "Read Value from BURST_CAP after writing: 0x%08x\n",
831 read_buf);
832
833 read_buf = DEFAULT_BULK_IN_DELAY;
834 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
835 if (ret < 0) {
836 netdev_warn(dev->net, "ret = %d\n", ret);
837 return ret;
838 }
839
840 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
841 if (ret < 0) {
842 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
843 return ret;
844 }
845 netif_dbg(dev, ifup, dev->net,
846 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
847 read_buf);
848
849 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
850 if (ret < 0) {
851 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
852 return ret;
853 }
854 netif_dbg(dev, ifup, dev->net,
855 "Read Value from HW_CFG: 0x%08x\n", read_buf);
856
857 if (turbo_mode)
858 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
859
860 read_buf &= ~HW_CFG_RXDOFF_;
861
862 /* set Rx data offset=2, Make IP header aligns on word boundary. */
863 read_buf |= NET_IP_ALIGN << 9;
864
865 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
866 if (ret < 0) {
867 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
868 ret);
869 return ret;
870 }
871
872 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
873 if (ret < 0) {
874 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
875 return ret;
876 }
877 netif_dbg(dev, ifup, dev->net,
878 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
879
880 write_buf = 0xFFFFFFFF;
881 ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
882 if (ret < 0) {
883 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
884 ret);
885 return ret;
886 }
887
888 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
889 if (ret < 0) {
890 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
891 return ret;
892 }
893 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
894
895 /* Configure GPIO pins as LED outputs */
896 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
897 LED_GPIO_CFG_FDX_LED;
898 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
899 if (ret < 0) {
900 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
901 ret);
902 return ret;
903 }
904
905 /* Init Tx */
906 write_buf = 0;
907 ret = smsc95xx_write_reg(dev, FLOW, write_buf);
908 if (ret < 0) {
909 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
910 return ret;
911 }
912
913 read_buf = AFC_CFG_DEFAULT;
914 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
915 if (ret < 0) {
916 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
917 return ret;
918 }
919
920 /* Don't need mac_cr_lock during initialisation */
921 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
922 if (ret < 0) {
923 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
924 return ret;
925 }
926
927 /* Init Rx */
928 /* Set Vlan */
929 write_buf = (u32)ETH_P_8021Q;
930 ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
931 if (ret < 0) {
932 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
933 return ret;
934 }
935
936 /* Enable or disable checksum offload engines */
937 smsc95xx_set_features(dev->net, dev->net->features);
938
939 smsc95xx_set_multicast(dev->net);
940
941 if (smsc95xx_phy_initialize(dev) < 0)
942 return -EIO;
943
944 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
945 if (ret < 0) {
946 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
947 return ret;
948 }
949
950 /* enable PHY interrupts */
951 read_buf |= INT_EP_CTL_PHY_INT_;
952
953 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
954 if (ret < 0) {
955 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
956 return ret;
957 }
958
959 smsc95xx_start_tx_path(dev);
960 smsc95xx_start_rx_path(dev);
961
962 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
963 return 0;
964 }
965
966 static const struct net_device_ops smsc95xx_netdev_ops = {
967 .ndo_open = usbnet_open,
968 .ndo_stop = usbnet_stop,
969 .ndo_start_xmit = usbnet_start_xmit,
970 .ndo_tx_timeout = usbnet_tx_timeout,
971 .ndo_change_mtu = usbnet_change_mtu,
972 .ndo_set_mac_address = eth_mac_addr,
973 .ndo_validate_addr = eth_validate_addr,
974 .ndo_do_ioctl = smsc95xx_ioctl,
975 .ndo_set_multicast_list = smsc95xx_set_multicast,
976 .ndo_set_features = smsc95xx_set_features,
977 };
978
979 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
980 {
981 struct smsc95xx_priv *pdata = NULL;
982 int ret;
983
984 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
985
986 ret = usbnet_get_endpoints(dev, intf);
987 if (ret < 0) {
988 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
989 return ret;
990 }
991
992 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
993 GFP_KERNEL);
994
995 pdata = (struct smsc95xx_priv *)(dev->data[0]);
996 if (!pdata) {
997 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
998 return -ENOMEM;
999 }
1000
1001 spin_lock_init(&pdata->mac_cr_lock);
1002
1003 if (DEFAULT_TX_CSUM_ENABLE)
1004 dev->net->features |= NETIF_F_HW_CSUM;
1005 if (DEFAULT_RX_CSUM_ENABLE)
1006 dev->net->features |= NETIF_F_RXCSUM;
1007
1008 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1009
1010 smsc95xx_init_mac_address(dev);
1011
1012 /* Init all registers */
1013 ret = smsc95xx_reset(dev);
1014
1015 dev->net->netdev_ops = &smsc95xx_netdev_ops;
1016 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1017 dev->net->flags |= IFF_MULTICAST;
1018 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1019 return 0;
1020 }
1021
1022 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1023 {
1024 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1025 if (pdata) {
1026 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1027 kfree(pdata);
1028 pdata = NULL;
1029 dev->data[0] = 0;
1030 }
1031 }
1032
1033 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1034 {
1035 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1036 skb->ip_summed = CHECKSUM_COMPLETE;
1037 skb_trim(skb, skb->len - 2);
1038 }
1039
1040 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1041 {
1042 while (skb->len > 0) {
1043 u32 header, align_count;
1044 struct sk_buff *ax_skb;
1045 unsigned char *packet;
1046 u16 size;
1047
1048 memcpy(&header, skb->data, sizeof(header));
1049 le32_to_cpus(&header);
1050 skb_pull(skb, 4 + NET_IP_ALIGN);
1051 packet = skb->data;
1052
1053 /* get the packet length */
1054 size = (u16)((header & RX_STS_FL_) >> 16);
1055 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1056
1057 if (unlikely(header & RX_STS_ES_)) {
1058 netif_dbg(dev, rx_err, dev->net,
1059 "Error header=0x%08x\n", header);
1060 dev->net->stats.rx_errors++;
1061 dev->net->stats.rx_dropped++;
1062
1063 if (header & RX_STS_CRC_) {
1064 dev->net->stats.rx_crc_errors++;
1065 } else {
1066 if (header & (RX_STS_TL_ | RX_STS_RF_))
1067 dev->net->stats.rx_frame_errors++;
1068
1069 if ((header & RX_STS_LE_) &&
1070 (!(header & RX_STS_FT_)))
1071 dev->net->stats.rx_length_errors++;
1072 }
1073 } else {
1074 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1075 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1076 netif_dbg(dev, rx_err, dev->net,
1077 "size err header=0x%08x\n", header);
1078 return 0;
1079 }
1080
1081 /* last frame in this batch */
1082 if (skb->len == size) {
1083 if (dev->net->features & NETIF_F_RXCSUM)
1084 smsc95xx_rx_csum_offload(skb);
1085 skb_trim(skb, skb->len - 4); /* remove fcs */
1086 skb->truesize = size + sizeof(struct sk_buff);
1087
1088 return 1;
1089 }
1090
1091 ax_skb = skb_clone(skb, GFP_ATOMIC);
1092 if (unlikely(!ax_skb)) {
1093 netdev_warn(dev->net, "Error allocating skb\n");
1094 return 0;
1095 }
1096
1097 ax_skb->len = size;
1098 ax_skb->data = packet;
1099 skb_set_tail_pointer(ax_skb, size);
1100
1101 if (dev->net->features & NETIF_F_RXCSUM)
1102 smsc95xx_rx_csum_offload(ax_skb);
1103 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1104 ax_skb->truesize = size + sizeof(struct sk_buff);
1105
1106 usbnet_skb_return(dev, ax_skb);
1107 }
1108
1109 skb_pull(skb, size);
1110
1111 /* padding bytes before the next frame starts */
1112 if (skb->len)
1113 skb_pull(skb, align_count);
1114 }
1115
1116 if (unlikely(skb->len < 0)) {
1117 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1118 return 0;
1119 }
1120
1121 return 1;
1122 }
1123
1124 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1125 {
1126 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1127 u16 high_16 = low_16 + skb->csum_offset;
1128 return (high_16 << 16) | low_16;
1129 }
1130
1131 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1132 struct sk_buff *skb, gfp_t flags)
1133 {
1134 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
1135 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1136 u32 tx_cmd_a, tx_cmd_b;
1137
1138 /* We do not advertise SG, so skbs should be already linearized */
1139 BUG_ON(skb_shinfo(skb)->nr_frags);
1140
1141 if (skb_headroom(skb) < overhead) {
1142 struct sk_buff *skb2 = skb_copy_expand(skb,
1143 overhead, 0, flags);
1144 dev_kfree_skb_any(skb);
1145 skb = skb2;
1146 if (!skb)
1147 return NULL;
1148 }
1149
1150 if (csum) {
1151 if (skb->len <= 45) {
1152 /* workaround - hardware tx checksum does not work
1153 * properly with extremely small packets */
1154 long csstart = skb_checksum_start_offset(skb);
1155 __wsum calc = csum_partial(skb->data + csstart,
1156 skb->len - csstart, 0);
1157 *((__sum16 *)(skb->data + csstart
1158 + skb->csum_offset)) = csum_fold(calc);
1159
1160 csum = false;
1161 } else {
1162 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1163 skb_push(skb, 4);
1164 memcpy(skb->data, &csum_preamble, 4);
1165 }
1166 }
1167
1168 skb_push(skb, 4);
1169 tx_cmd_b = (u32)(skb->len - 4);
1170 if (csum)
1171 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1172 cpu_to_le32s(&tx_cmd_b);
1173 memcpy(skb->data, &tx_cmd_b, 4);
1174
1175 skb_push(skb, 4);
1176 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1177 TX_CMD_A_LAST_SEG_;
1178 cpu_to_le32s(&tx_cmd_a);
1179 memcpy(skb->data, &tx_cmd_a, 4);
1180
1181 return skb;
1182 }
1183
1184 static const struct driver_info smsc95xx_info = {
1185 .description = "smsc95xx USB 2.0 Ethernet",
1186 .bind = smsc95xx_bind,
1187 .unbind = smsc95xx_unbind,
1188 .link_reset = smsc95xx_link_reset,
1189 .reset = smsc95xx_reset,
1190 .rx_fixup = smsc95xx_rx_fixup,
1191 .tx_fixup = smsc95xx_tx_fixup,
1192 .status = smsc95xx_status,
1193 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1194 };
1195
1196 static const struct usb_device_id products[] = {
1197 {
1198 /* SMSC9500 USB Ethernet Device */
1199 USB_DEVICE(0x0424, 0x9500),
1200 .driver_info = (unsigned long) &smsc95xx_info,
1201 },
1202 {
1203 /* SMSC9505 USB Ethernet Device */
1204 USB_DEVICE(0x0424, 0x9505),
1205 .driver_info = (unsigned long) &smsc95xx_info,
1206 },
1207 {
1208 /* SMSC9500A USB Ethernet Device */
1209 USB_DEVICE(0x0424, 0x9E00),
1210 .driver_info = (unsigned long) &smsc95xx_info,
1211 },
1212 {
1213 /* SMSC9505A USB Ethernet Device */
1214 USB_DEVICE(0x0424, 0x9E01),
1215 .driver_info = (unsigned long) &smsc95xx_info,
1216 },
1217 {
1218 /* SMSC9512/9514 USB Hub & Ethernet Device */
1219 USB_DEVICE(0x0424, 0xec00),
1220 .driver_info = (unsigned long) &smsc95xx_info,
1221 },
1222 {
1223 /* SMSC9500 USB Ethernet Device (SAL10) */
1224 USB_DEVICE(0x0424, 0x9900),
1225 .driver_info = (unsigned long) &smsc95xx_info,
1226 },
1227 {
1228 /* SMSC9505 USB Ethernet Device (SAL10) */
1229 USB_DEVICE(0x0424, 0x9901),
1230 .driver_info = (unsigned long) &smsc95xx_info,
1231 },
1232 {
1233 /* SMSC9500A USB Ethernet Device (SAL10) */
1234 USB_DEVICE(0x0424, 0x9902),
1235 .driver_info = (unsigned long) &smsc95xx_info,
1236 },
1237 {
1238 /* SMSC9505A USB Ethernet Device (SAL10) */
1239 USB_DEVICE(0x0424, 0x9903),
1240 .driver_info = (unsigned long) &smsc95xx_info,
1241 },
1242 {
1243 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1244 USB_DEVICE(0x0424, 0x9904),
1245 .driver_info = (unsigned long) &smsc95xx_info,
1246 },
1247 {
1248 /* SMSC9500A USB Ethernet Device (HAL) */
1249 USB_DEVICE(0x0424, 0x9905),
1250 .driver_info = (unsigned long) &smsc95xx_info,
1251 },
1252 {
1253 /* SMSC9505A USB Ethernet Device (HAL) */
1254 USB_DEVICE(0x0424, 0x9906),
1255 .driver_info = (unsigned long) &smsc95xx_info,
1256 },
1257 {
1258 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1259 USB_DEVICE(0x0424, 0x9907),
1260 .driver_info = (unsigned long) &smsc95xx_info,
1261 },
1262 {
1263 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1264 USB_DEVICE(0x0424, 0x9908),
1265 .driver_info = (unsigned long) &smsc95xx_info,
1266 },
1267 {
1268 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1269 USB_DEVICE(0x0424, 0x9909),
1270 .driver_info = (unsigned long) &smsc95xx_info,
1271 },
1272 {
1273 /* SMSC LAN9530 USB Ethernet Device */
1274 USB_DEVICE(0x0424, 0x9530),
1275 .driver_info = (unsigned long) &smsc95xx_info,
1276 },
1277 {
1278 /* SMSC LAN9730 USB Ethernet Device */
1279 USB_DEVICE(0x0424, 0x9730),
1280 .driver_info = (unsigned long) &smsc95xx_info,
1281 },
1282 {
1283 /* SMSC LAN89530 USB Ethernet Device */
1284 USB_DEVICE(0x0424, 0x9E08),
1285 .driver_info = (unsigned long) &smsc95xx_info,
1286 },
1287 { }, /* END */
1288 };
1289 MODULE_DEVICE_TABLE(usb, products);
1290
1291 static struct usb_driver smsc95xx_driver = {
1292 .name = "smsc95xx",
1293 .id_table = products,
1294 .probe = usbnet_probe,
1295 .suspend = usbnet_suspend,
1296 .resume = usbnet_resume,
1297 .disconnect = usbnet_disconnect,
1298 };
1299
1300 static int __init smsc95xx_init(void)
1301 {
1302 return usb_register(&smsc95xx_driver);
1303 }
1304 module_init(smsc95xx_init);
1305
1306 static void __exit smsc95xx_exit(void)
1307 {
1308 usb_deregister(&smsc95xx_driver);
1309 }
1310 module_exit(smsc95xx_exit);
1311
1312 MODULE_AUTHOR("Nancy Lin");
1313 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1314 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1315 MODULE_LICENSE("GPL");